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| Number | Title | Issue Date |
| 7809750 | Data management apparatus that controls a data storage apparatus by transmitting command of structured document format A data management apparatus connected to a data storage apparatus via a network manages the data storage apparatus by transmitting a command of structured document format such as the extensible markup language format and receiving the information related to the exec... | 10/05/2010 |
| 7739557 | Method, system and program product for autonomous error recovery for memory devices An autonomous error recovery approach is provided for a memory device of a computing system. In response to a request for data, addressed data and associated control information of the memory device are tested for error. If error is detected, the contents of an addr... | 06/15/2010 |
| 7444275 | Multi-variable polynomial modeling techniques for use in integrated circuit design Techniques are disclosed for modeling a cell of an integrated circuit design. In one aspect of the invention, a full-space polynomial model is fit to cell information comprising measured data points associated with one or more independent variables such as voltage s... | 10/28/2008 |
| 7444268 | Method and apparatus for identifying a drift in a quantized signal in a computer system One embodiment of the present invention provides a system that identifies a drift in a signal in a computer system. During operation, the system receives a sequence of quantized signal values of the signal. Next, the system generates a statistical distribution based... | 10/28/2008 |
| 7401277 | Semiconductor integrated circuit and scan test method therefor A method for performing scan test on a semiconductor integrated circuit including at least two blocks to be tested. The method includes isolating each of the at least two blocks to be tested exclusively from further blocks; and supplying a plurality of scan clocks h... | 07/15/2008 |
| 7380152 | Daisy chained multi-device system and operating method A multi-device system having a daisy chain system bus structure and related method of operation are disclosed. A reference signal having a defined oscillation period is communicated around the daisy chain bus structure. Total signal transmission time around the dais... | 05/27/2008 |
| 7355384 | Apparatus, method, and computer program product for monitoring and controlling a microcomputer using a single existing pin A method, apparatus, and computer program product are disclosed for monitoring and controlling a device using only one input/output (I/O) communication pin of the device. The pin is configured to be used to both transmit and receive data. Logical ones are generated ... | 04/08/2008 |
| 7353435 | Storage device system and signal transmission method for storage device system The storage device system comprises: a plurality of signal transmission paths connected respectively to a plurality of installed storage devices; a plurality of system side communications sections for transmitting and receiving signals respectively to and from the p... | 04/01/2008 |
| 7334059 | Multiple burst protocol device controller Multiple burst memory access handling protocols may be implemented at the hardware level or evaluated and selected during design of the hardware. The appropriate burst protocol may be selectable based on burst characteristics such as burst types and the identity of ... | 02/19/2008 |
| 7324971 | Blind perturbation encryption method for protecting financial position information while providing risk transparency A method for protecting investment position information during risk or performance evaluation, comprising the steps of: sending position name information and corresponding position quantity information from a sender to a calculation agent by way of one or more inter... | 01/29/2008 |
| 7310695 | Port adapter for high-bandwidth bus A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and t... | 12/18/2007 |
| 7293205 | Electronic control unit In an electronic control unit, a control constant stored in a program memory is transmitted to a data memory via a serial communication circuit. First control circuit section (master station) and second control circuit section (substation) mutually communicate throu... | 11/06/2007 |
| 7293209 | Split L2 latch with glitch free programmable delay A programmable delay circuit that delays the C2 clock signal by a variable amount that allows the output from the L1 latch to be captured even when there is a large delta between the L1 latch and its L2 latch. This allows the C2 si... | 11/06/2007 |
| 7271363 | Portable microwave plasma systems including a supply line for gas and microwaves Portable microwave plasma systems including supply lines for providing microwaves and gas flow are disclosed. The supply line includes at least one gas line or conduit and a microwave coaxial cable. A portable microwave plasma system includes a microwave source, a w... | 09/18/2007 |
| 7266086 | ARQ parameter negotiation in a data packet transmission system using link adaptation A method for transmitting data packets between a transmitter and a receiver unit in a communication system is described. For transmitting data packets a transmission mode is selected from a plurality of available transmission modes and an automatic repeat request fo... | 09/04/2007 |
| 7260219 | Recordable storage medium with protected data area The invention relates to a method of storing data on a rewritable data storage medium, to a corresponding storage medium, to a corresponding recording apparatus and to a corresponding playback apparatus. Copy-protective measures require that on rewritable storage me... | 08/21/2007 |
| 7251765 | Semiconductor integrated circuit and method for testing a semiconductor integrated circuit A semiconductor integrated circuit includes a first delay circuit generating a first delay clock; a second delay circuit generating a second delay clock; a first register registering a value of a first delay of the first delay clock; a second register registering a ... | 07/31/2007 |
| 7249185 | Methods, devices and software for redundant transmission of voice data over a packet network connection established according to an unreliable communication protocol Methods, devices, and software are provided for generating and sending data packets that contain redundant voice data over VoIP connections made under an unreliable network protocol. The redundant data is packaged either in redundant data packets, or in expanded ori... | 07/24/2007 |
| 7246299 | Data recording medium, data recording method, and data recording apparatus, including additional recording features With data of four symbols (FIG. 11A), a parity of two symbols (FIG. 11B) is created. These six symbols are EFM-modulated. Each symbol of eight bits is converted into a pattern of 14 bits (FIG. 11C). In a pit/land sequence formed on a disc (FIG. ... | 07/17/2007 |
| 7231573 | Delay management system A delay management system in a computer system includes a delay manager and a first storage element that stores a delay time. The delay manager is configured to receive a series of delay values and respond to each delay value in the series of delay values by providi... | 06/12/2007 |
| 7210078 | Error bit method and circuitry for oscillation-based characterization A method for evaluating an output of a sequential circuit 2 by storing a series of output pulses from the sequential circuit 2 and determining whether the output pulses 4 toggled as desired. Also a circuit 1 for evaluating an output 4 | 04/24/2007 |
| 7205912 | Structured set partitioning and multilevel coding for partial response channels A method and apparatus for channel coding useful for recording channel and other communications applications. The proposed channel coding method is actualized via structured set partition (SSP) in conjunction with multilevel coding (MLC) and offers performance gains... | 04/17/2007 |
| 7191080 | Separation of a random component of jitter and a deterministic component of jitter A random component of jitter and a deterministic component of jitter are separated. A measured jitter distribution is obtained. A form is selected for a selected component of jitter. The selected component of jitter is either the random component of jitter or the de... | 03/13/2007 |
| 7184484 | Method and apparatus for serial data communication A method and an apparatus for serial data communication employs a data transmission process which transmits data from one control unit to the another control unit and at the same time checks a reception confirmation signal on each number of the data by transmitting ... | 02/27/2007 |
| 7177430 | Digital entroping for digital audio reproductions The present invention provides a system and method for introducing white noises into a digital audio signal so that there is progressive and cumulative degradation in audio quality after each successive reproduction of the audio sound signal in a fashion analogous t... | 02/13/2007 |
| 7178087 | Read-only record carrier with recordable area in subcode channel A method of providing a read-only record carrier on which user data can be recorded at predetermined recordable positions of subcode frames of a subcode channel after mastering of said record carrier, includes the steps of setting the subcode symbols at said predete... | 02/13/2007 |
| 7170907 | Dynamic alignment for data on a parallel bus A method, apparatus, and computer-readable media for aligning n data signals received over a parallel bus, each of the n data signals comprising a training pattern, wherein n is at least two, comprises delaying each of the n data signals in accordance with a corresp... | 01/30/2007 |
| 7161885 | Copy-protected compact disc and method for producing same The present application relates to a copy-protected compact disc and a method for producing the optical disc and preventing unauthorized copying. The contents of at least one of the lead-in items in the optical disc are altered so that it is no longer uniform, there... | 01/09/2007 |
| 7148787 | Remote keyless entry circuit having transient pulse suppression A remote keyless entry (RKE) circuit (100) and method reduces the amount of current draw by duty cycling the RKE circuit (100) to ensure that a microcontroller (104) in the RKE circuit (100) is awakened only when needed to evaluate RF dat... | 12/12/2006 |
| 7136778 | Method for non-invasive performance monitoring and tuning A non-invasive method, system, and computer product for monitoring I/O performance without using the RIO bus. When executing a performance benchmark run in a remote I/O drawer, the system logs into a bulk power controller, wherein the bulk power controller provides ... | 11/14/2006 |
| 7127644 | Method and arrangement for concealing errors A method of concealing errors in a single bit bitstream comprises low pass filtering the bitstream, replacing the low pass filtered signal during an error by a low frequency approximation of the signal and subsequently converting the signal by a ΣΔ-modulator into ... | 10/24/2006 |
| 7124263 | Memory controller, semiconductor integrated circuit, and method for controlling a memory A memory controller includes a state generator configured to generate a plurality of state information signals in response to command requests associated with a plurality of banks in a memory. An enable signal generator is configured to generate a plurality of enabl... | 10/17/2006 |
| 7111102 | Port adapter for high-bandwidth bus A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and t... | 09/19/2006 |
| 7100067 | Data transmission error reduction via automatic data sampling timing adjustment A data transmission error reduction circuit is formed including a delay circuit, a detection circuit and a control circuit. In one embodiment, the delay circuit includes n delay element and multiplexor pairs, selectively employable to apply an aggregate amount of ti... | 08/29/2006 |
| 7089440 | Skew compensation for a multi-agent shared bus A data processing system includes first, second, and third agents connected to a shared bus. The third agent is able to receive information via the shared bus from the first agent or from the second agent. The third agent includes a skew compensation circuit to dete... | 08/08/2006 |
| 7084680 | Method and apparatus for timing domain crossing A timing domain crossing apparatus and method of transferring signals between timing domains are disclosed. A receiver samples a data signal with a sample clock in a first timing domain. The sampled data signal is expanded to a plurality of expansion signals, which ... | 08/01/2006 |
| 7043687 | Document/message management A computer implemented method, apparatus and software for automatically transforming data between Electronic Data Interchange (EDI) formats. For generating EDI documents or messages, a source data model with EDI related data is received. Data is transferred from met... | 05/09/2006 |
| 7024611 | Method and apparatus for time efficient retransmission using symbol accumulation An efficient retransmission of data using symbol accumulation wherein a first set of data symbols is encoded, producing a first set of encoded symbols and a second set of encoded symbols. The first set of encoded symbols is then transmitted in a first frame. A secon... | 04/04/2006 |
| 7002856 | Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions A semiconductor integrated circuit comprises a semiconductor chip, a power supply terminal provided on the semiconductor chip for receiving a voltage from an external power supply source, an internal circuit provided on the semiconductor chip, a power supply circuit... | 02/21/2006 |
| 6970391 | Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions A semiconductor integrated circuit comprises a semiconductor chip, a power supply terminal provided on the semiconductor chip for receiving a voltage from an external power supply source, an internal circuit provided on the semiconductor chip, a power supply circuit... | 11/29/2005 |
