...that while attempting to develop a super strong glue, 3M employee Spencer Silver accidentally developed a glue that was so weak it would barely hold two pieces of paper together? However, his colleague Art Fry needed the glue. Fry sang with his church choir and marked the pages of his hymnal with small scraps of paper that often fell out. He used Silver's glue to hold the papers in place. Today we call this invention Post-it Notes.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8086910 | Monitoring software thread execution The invention is directed to monitoring execution of software threads, particularly by detecting a lockup or stall in execution of a software thread and initiating a remedial action in response. Advantageously, some embodiments of the invention automatically detect ... | 12/27/2011 |
| 8078921 | System including a plurality of data storage devices connected via network and data storage device used therefor Embodiments of the present invention help improve the process for updating parities accompanied by the writing process. According to one embodiment, a host controller transmits a write command and new data to a hard disk drive (HDD). The HDD reads old data at a regi... | 12/13/2011 |
| 8074122 | Program failure recovery A program failure is detected during programming of a memory device. When the program failure is detected, a transfer of the contents of a register of the memory device to a first location of a memory of the memory device is stopped. First data that remains in the r... | 12/06/2011 |
| 8046628 | Failure recovery memory devices and methods Memory devices and methods are described that include serially chained memory devices. In one or more of the configurations shown, a serial chain of memory devices includes a number of memory devices, and an error recovery device at an end of the chain. In one confi... | 10/25/2011 |
| 7996731 | Error detection in high-speed asymmetric interfaces A system and method for detecting errors in high-speed asymmetric interfaces are described. Embodiments include transmitting digital data between a first system component and a second system component over a bidirectional interface, wherein the first component is si... | 08/09/2011 |
| 7958406 | Verifying a record as part of an operation to modify the record Provided are a method, system and article of manufacture for verifying a record as part of an operation to modify the record. A search request is received to determine whether a record matches a value. A first component executes the search request to determine if th... | 06/07/2011 |
| 7886201 | Decoder architecture for optimized error management in streaming multimedia A method and apparatus for multi-layer integration for use in error recovery is disclosed. An error is detected in a multimedia data based on a first layer protocol and the detected error in the multimedia data is concealed based on a second layer protocol. In one a... | 02/08/2011 |
| 7877647 | Correcting a target address in parallel with determining whether the target address was received in error As disclosed herein, an interface for a device adapted to couple to an interconnect may comprise decode and error check logic and a plurality of decode logic units. The decode and error check logic may receive error check bits and a target address from the interconn... | 01/25/2011 |
| 7873878 | Data integrity validation in storage systems A data storage method comprises storing first data in at least a first data chunk, wherein the first data chunk is a logical representation of one or more sectors on at least a first disk drive in a storage system; storing first metadata, associated with the first d... | 01/18/2011 |
| 7844865 | Bus module for connection to a bus system and use of such a bus module in an AS-i bus system Disclosed is a bus module that can be connected to a bus system and comprises means for outputting safety-relevant signals in the form of repeated unambiguous code sequences. The bus module further comprises a first and second arithmetic unit with means for executin... | 11/30/2010 |
| 7809994 | Error correction coding for multiple-sector pages in flash memory devices A flash memory system, including a flash memory device and a controller, and having improved efficiency error correction coding (ECC), is disclosed. Each page in the flash memory device has the capacity to store multiple sectors' worth of data. However, partial page... | 10/05/2010 |
| 7793164 | Error codes for products An example system and method for generating an error code involve detecting an error condition of a product and generating an error code by combining information indicative of the detected error condition with an identifier associated with, the product. ... | 09/07/2010 |
| 7783934 | Program failure recovery A program failure is detected during programming of a memory device. When the program failure is detected, a transfer of the contents of a register of the memory device to a first location of a memory of the memory device is stopped. First data that remains in the r... | 08/24/2010 |
| 7757130 | Computer system having raid control function and raid control method RAID control of multiple hard disk drives in a computer system includes performing a fault-tolerant data computing operation for a written data. The timing for performing the fault-tolerant data computing operation is determined by accessing a data stored in one of ... | 07/13/2010 |
| 7752505 | Method and apparatus for detection of data errors in tag arrays A method for detecting errors in a tag array includes accessing the tag array with an index, retrieving at least one tag from the tag array, and computing a parity bit based on the expected tag. ... | 07/06/2010 |
| 7721160 | System for protecting data during high-speed bidirectional communication between a master device and a slave device A system for protecting data during high-speed bidirectional communication between a master device and a slave device. The master device may control data transfer between the master device and the slave device. In addition, the master device may perform a read reque... | 05/18/2010 |
| 7716537 | Information processing apparatus and error correction method According to one embodiment, a memory interface module is configured to read one of instructions stored in a memory in accordance with a memory address designated by a fetch request issued from a processor. An error detection module is configured to detect an error ... | 05/11/2010 |
| 7707463 | Implementing directory organization to selectively optimize performance or reliability A method, and apparatus are provided for implementing a directory organization to selectively optimize performance or reliability in a computer system. A directory includes a user selected operational modes including a performance mode and a reliability mode. In the... | 04/27/2010 |
| 7546492 | Remotely repairing files by hierarchical and segmented cyclic redundancy checks A method, comprising: recursively generating a sequence of sections of check codes of a local corrupted file to produce a local repair file; selectively retrieving at least one part of a remote repair file and at least one part of a remote original file, based on di... | 06/09/2009 |
| 7516371 | ECC control apparatus An ECC control apparatus is to be connected between a host and a memory. The apparatus comprises a first input/output circuit, a detecting circuit, a code-generating circuit, a code-inserting circuit, a second input/output circuit. The first input/output circuit inp... | 04/07/2009 |
| 7480836 | Monitoring error-handler vector in architected memory A computer system provides a vector monitor for monitoring a first instance of an error-handling vector in architected memory. The monitoring can involve repeatedly comparing the first instance with a second instance of the vector so as to detect a mismatch, should ... | 01/20/2009 |
| 7454668 | Techniques for data signature and protection against lost writes Described are techniques for verifying data. A write operation request for writing to a first data block is received. A first copy of an identifier for said first data block in a memory is updated. A second copy of the identifier for the first data block is updated.... | 11/18/2008 |
| 7441159 | Detecting low-level data corruption Checksum values are used to detect low-level data corruption. I/O operations, such as, for example, read operations and write operations, cause data blocks to pass through a number of low-level drivers when the data blocks are transferred between an operating system... | 10/21/2008 |
| 7437593 | Apparatus, system, and method for managing errors in prefetched data An apparatus, system, and method are provided for managing errors in prefetched data. The apparatus, system, and method identify prefetched data that contains an uncorrectable error. In addition, the apparatus, system, and method initiate an error recovery process o... | 10/14/2008 |
| 7424648 | Nonvolatile memory system, nonvolatile memory device, data read method, and data read program A nonvolatile memory device has a controller and flash memory. The flash memory stores user data and an error correcting code for correcting an error in the user data. When there is a read command from the outside, the user data and error correcting code are read fr... | 09/09/2008 |
| 7415041 | Method and apparatus for decoding data in a wireless communication system A communication system is provided that utilizes an apriori knowledge of padding when decoding a received frame and when allocating power to a transmitted frame. In one embodiment, a receiver utilizes an apriori knowledge of padding in decoding a received frame. Whe... | 08/19/2008 |
| 7401255 | Mechanisms for recovering data from a backup by comparing transformed data to identify altered memory blocks Mechanisms for efficiently restoring one or more memory blocks of a primary computing system. In order to restore a backup memory block, the primary system accesses transformed data that represents a result of a deterministic many-to-one mapping function, such as a ... | 07/15/2008 |
| 7401267 | Program failure recovery Methods and apparatus are provided. A method of operating a memory device includes detecting a programming failure at a first location of a memory array, preserving data within the memory device when the program failure is detected, programming a second location of ... | 07/15/2008 |
| 7395525 | Method and apparatus for displaying computer program errors as hypertext According to one embodiment a method and apparatus for displaying the path of a computer program error as a sequence of hypertext documents in a computer system having a display is disclosed. The method includes displaying a first function in the control-flow path o... | 07/01/2008 |
| 7392436 | Program failure recovery A method of operating a memory device when a program failure occurs is provided. The method includes preserving first data within the memory device and reconstructing second data originally intended for programming the memory device before the program failure from t... | 06/24/2008 |
| 7383384 | Providing multiple faults protection for an array of storage devices A data storage system including an array of storage devices and a storage controller is provided. The array of storage devices is configured to store information in the form of a plurality of stripes. The storage controller is configured to write a plurality of code... | 06/03/2008 |
| 7380132 | Data recording method and apparatus, data record medium and data reproducing method and apparatus An input is ciphered in at least one of a sector forming circuit 13, a scrambling circuit 14, a header appendage circuit 15, an error correction encoding circuit 16, a modulation circuit 17 and a synchronization appendage circuit | 05/27/2008 |
| 7376863 | Apparatus, system, and method for error checking and recovery of transmitted data in a SCSI environment An apparatus, system, and method are disclosed for data error checking and recovery in a data storage device. A redundancy check module creates a redundancy check for data on a data storage device in a SCSI End-to-End Checking Standard environment and a redundancy c... | 05/20/2008 |
| 7370230 | Methods and structure for error correction in a processor pipeline Methods and structures for an improved processor pipeline to eliminate the effect of correctable soft errors on processor/memory pipeline performance. Features and aspects hereof provide that the pipeline is extended by the addition of one or more information correc... | 05/06/2008 |
| 7363573 | Method and apparatus for a dedicated cyclic redundancy check block within a device A dedicated Cyclic Redundancy Check (CRC) block within an Integrated circuit IC), for example, a Programmable Logic Device (PLD), allows direct access to the CRC block from within the programmable logic of the IC. Accessibility to the CRC block is achieved from any ... | 04/22/2008 |
| 7360015 | Preventing storage of streaming accesses in a cache In one embodiment of the present invention, a method may include determining whether requested information is part of a streaming access, and directly writing the requested information from a storage device to a memory if the requested information is part of the str... | 04/15/2008 |
| 7356687 | Association of security parameters for a collection of related streaming protocols In a client-server system employing protocols such as RTP (real-time protocol), RTCP (real-time control protocol) and RTSP (real-time streaming protocol) for communicating real-time data stream, a method for using the same security parameters to secure by encryption... | 04/08/2008 |
| 7353445 | Cache error handling in a multithreaded/multi-core processor In one embodiment, a processor comprises a cache shared by a plurality of threads in execution by the processor, an error detection unit coupled to the cache, and a fetch control unit. The error detection unit is configured to detect an error in data output by the c... | 04/01/2008 |
| 7353400 | Secure program execution depending on predictable error correction A CPU is provided with an ability to modify its operation, with respect to error correction, as a programmable feature. An error correction scheme is selected to be performed by the error correcting circuit. The compiled program may have intentionally introduced err... | 04/01/2008 |
| 7353432 | Maintaining high data integrity A protection domain for a set of errors is defined using an association between data and first integrity metadata to protect data traversing an input/output datapath. The datapath has a storage device as one endpoint and a first generation integrity point for a host... | 04/01/2008 |