Did You Know...
...that in the early 1940s GE engineer James Wright was charged with a task of utmost importance to the war effort: develop a cheap substitute for rubber that could be used to produce tires, gas masks and a whole host of military gear. Wright tackled the task diligently -- and wound up inventing Silly Putty.
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| Number | Title | Issue Date |
| 7617417 | Method for reading input/output port data A method for reading input/output port data is provided. In the present method, a write trap procedure is enabled so that the data is stored in a buffer first when there is data to be written in the input/output port. Then, a read trap procedure is enabled so that t... | 11/10/2009 |
| 7617416 | System, method, and apparatus for firmware code-coverage in complex system on chip Presented herein is a system, method, and apparatus for firmware code-coverage in complex system on chip. A circuit for analyzing code coverage of firmware by test inputs comprises an input and a memory. The input receives an address from a code address bus. The mem... | 11/10/2009 |
| 7587636 | Unit test generalization A computer system provides a test program and one or more unit tests, such as a traditional unit test and or a parameterized unit test. The system also includes a constraint solver, a theorem prover, an implementation under test, a symbolic executor, a generalizor, ... | 09/08/2009 |
| 7584382 | Method and system for troubleshooting a misconfiguration of a computer system based on configurations of other computer systems A method and system for identifying a configuration parameter of a “sick” computer system that is at fault for causing an undesired behavior based on analysis of configuration parameters from other computer systems is provided. In one embodiment, a troubleshooti... | 09/01/2009 |
| 7519865 | Systems and methods for identifying incomplete transactions In one embodiment, a system and method for identifying incomplete transactions includes identifying termination of a test case run on a processor verification system, examining a pending transaction list to identify incomplete transactions, and examining at least on... | 04/14/2009 |
| 7502966 | Testcase generation via a pool of parameter files A current parameter file is periodically selected at random from an active pool, and testcases are generated and executed from the current parameter file against a device, where the execution of the testcases against the device hits events generated by the device ov... | 03/10/2009 |
| 7484124 | Method and system for fault protection in communication networks, related network and computer program product A method of providing fault protection of special purpose devices included in at least one communication network and performing respective functions, includes the steps of providing a set of general purpose devices adapted to be configured to perform the respective ... | 01/27/2009 |
| 7464296 | System and method for identifying failure candidates in a semiconductor apparatus A failure candidates identifying system has a tree structure in which input patterns selected from a failure dictionary are set as nodes. The failure candidates identifying system comprises a failure candidates searching tree in which an input pattern does not exist... | 12/09/2008 |
| 7454659 | Distributed systems in test environments A method, system and computer program product is disclosed for conducting a test in a distributed fashion in a test environment. A host or client may define a test for testing units under test to evaluate the parameters and characteristics of the units under test. T... | 11/18/2008 |
| 7444574 | Stimulus extraction and sequence generation for an electric device under test A method and system that utilizes a graphical interface that enables a user to select and capture building blocks of a Device Under Test (DUT) test scenario from a previously run test case or from multiple stimulation results. Each of these extracted building block ... | 10/28/2008 |
| 7440866 | System and method for validating an input/output voltage of a target system A target interface system for interfacing selected components of a communication system and methods for manufacturing and using same. Being reconfigurable to support an extensive range of conventional input/output technologies, the target interface system downloads ... | 10/21/2008 |
| 7434101 | Highly specialized scenarios in random test generation Improvements in functional verification of a design are achieved by providing a test template that specifies test parameters directed to a function of the design. An exemption mode of operation is associated with a portion of the template, in which constraints and v... | 10/07/2008 |
| 7412623 | State machine simulator for testing computer systems A method for simulating running a software application having a plurality of processes on a computer system being tested. The method includes providing a number of work daemons on the test system, with the number being chosen to be substantially equal to the number ... | 08/12/2008 |
| 7409591 | Method and system for managing programs for web service system A program managing method in a web service system for providing a web service for testing a message which has been changed in response to a change made in interface definition information comprises steps for judging as to whether or not an error occurs when an acces... | 08/05/2008 |
| 7401259 | System and method for scenario generation in a distributed system A system and method may emulate scenarios for testing a distributed system. The distributed system may include a plurality of nodes, each having one or more resources. The system may include a resource driver for each type of the one or more resources in the distrib... | 07/15/2008 |
| 7392431 | Emulation system with peripherals recording emulation frame when stop generated In-circuit-emulation of an integrated circuit includes a digital data processor capable of executing program instructions. A first debug event is detected during normal program execution. The causes the in-circuit-emulation to suspend program execution except for re... | 06/24/2008 |
| 7386763 | Proactive systemic scheduler for resource limited test systems An apparatus having a proactive systemic scheduler connected with a network testing system. The scheduler receives a list of tests to be run on the network test system during a testing interval, as well as available test baseline information for the tests to be run.... | 06/10/2008 |
| 7380170 | Testing measurements Embodiments of the invention include an arbiter facility included in a test script. The arbiter facility includes properties defining a method for evaluating the status of a step or process, a method for evaluating verification point results and the steps to execute... | 05/27/2008 |
| 7373550 | Generation of a computer program to test for correct operation of a data processing apparatus Software built in self test computer programs 12 are generated using a genetic algorithm 14 technique. A fault simulator 20 is used to simulate candidate software built in self test computer programs and compare the simulated execution, such to ... | 05/13/2008 |
| 7373623 | Method and apparatus for locating circuit deviations A system and method for locating circuit deviations or circuit faults in a circuit in respect of a reference circuit. The circuit and the reference circuit are respectively describable by signal-flow graphs, the signal-flow graphs being composed of a multiplicity of... | 05/13/2008 |
| 7370308 | Integrated circuit analysis method and program product A method for analyzing integrated circuits (IC's) has steps of dividing the circuit into a plurality of individual blocks that are linked together. Each block is comprised of a plurality of latches and paths connecting the latches. The blocks are compressed by remov... | 05/06/2008 |
| 7370320 | System and method for debugging programs run in a variety of environments A system and method allows a debugging tool to operate in an environment differently from an expected environment of an application being debugged, yet allows the application to be debugged in an environment in which it is expected to operate. Debugging commands are... | 05/06/2008 |
| 7370325 | Eager evaluation of tasks in a workflow system An object-focused workflow system for processing a received object in accordance with a declarative workflow specification. The specification includes modules and attributes, where module execution results in the evaluation of attributes, and may include the initiat... | 05/06/2008 |
| 7366951 | Method and apparatus for test program generation based on an instruction set description of a processor A method and apparatus for generating processor test programs using a formal description of the processor's instruction set. An instruction set for a processor is formally described using a language such as ISDL. The formal description of the instruction set identif... | 04/29/2008 |
| 7366944 | Increasing software fault tolerance by employing surprise-removal paths The subject invention relates to systems and methods for automatic recovery from errors in a computing environment. A system is provided to facilitate failure recovery in the computing system. The system includes at least one driver component that enumerates at leas... | 04/29/2008 |
| 7367001 | Method, system and computer program product for verification of digital designs using case-splitting via constrained internal signals A method of verifying a digital design is disclosed. The method comprises generating a reference model for a first digital design and creating an operational model for a second digital design, wherein the first digital design and the second digital design are intend... | 04/29/2008 |
| 7367017 | Method and apparatus for analyzing machine control sequences A graphical user interface (GUI) is provided that enables machine control sequences and the results of their execution to be easily and expediently analyzed. Logic is configured to execute GUI generation code and GUI user interaction handling code, and control a dis... | 04/29/2008 |
| 7366952 | Interconnect condition detection using test pattern in idle packets In some embodiments, a receiver can receive from an interconnect information packets and idle packets, where one or more of the idle packets includes a test pattern. A condition detector can detect a condition of the interconnect in response to the test pattern. Oth... | 04/29/2008 |
| 7363343 | Computer networks for providing peer to peer remote data storage and collaboration Computer networks for brokering the transmission of data between remote computers for purposes of redundancy or collaboration. A service brokers the transfer of data between an initiating computer and a destination device, thereby establishing a peer-to-peer archite... | 04/22/2008 |
| 7363616 | Systems and methods for prioritized data-driven software testing Systems and methods for a test harness that are provided that allow for effective control over both the data records and the test methods that are used in a software test run. Data records and/or test methods can be associated with a priority, such that a level of p... | 04/22/2008 |
| 7363620 | Non-linear execution of application program instructions for application program obfuscation Obfuscating an application program comprises reading a first application program, determining an application program instruction location permutation that transforms the first application program into an obfuscated application program having at least one application... | 04/22/2008 |
| 7360116 | Built-in self test circuit A built-in self test circuit (BIST circuit) in an LSI includes a verification test pattern generator for generating verification test pattern which is used for verifying the connections in the LSI including the BIST circuit in the design stage thereof, and another t... | 04/15/2008 |
| 7360184 | Method and apparatus for scenario search based random generation of functional test suites A method of describing a set of tests capable of being performed on a device under test (DUT) is disclosed. The method includes identifying a scenario space of the DUT. ... | 04/15/2008 |
| 7356710 | Security message authentication control instruction A method, system and computer program product for computing a message authentication code for data in storage of a computing environment. An instruction specifies a unit of storage for which an authentication code is to be computed. An computing operation computes a... | 04/08/2008 |
| 7356736 | Simulated computer system for monitoring of software performance A system S is defined which is capable of simulating a computer (virtual computer, VC) for the purpose of software performance monitoring. The system is implemented as a set of software modules (SM) that can be exchanged to change the behavior of the VC. The VC is d... | 04/08/2008 |
| 7356443 | Systems and methods for analyzing the selection of measurements of a communication network Representative embodiments are directed to systems and methods for analyzing the selection of measurements of events associated with a communications network. In one embodiment, the selection of measurements includes creating a representation of a network. After the... | 04/08/2008 |
| 7353162 | Scalable reconfigurable prototyping system and method A method and a system provide a reconfigurable platform for designing and emulating a user design. The method and system facilitates design and emulation of a system-on-a-chip type user design. The netlist of a user design may be included with netlists from customiz... | 04/01/2008 |
| 7353499 | Multiple instruction dispatch tables for application program obfuscation Obfuscating an application program comprises reading an application program comprising code, determining multiple dispatch tables associated with the application program, transforming the application program into application program code configured to utilize the di... | 04/01/2008 |
| 7353159 | Method for parallel simulation on a single microprocessor using meta-models The present invention generally relates to hardware development and design, and in particular it relates to a method for simulating hardware. A meta model (22) is compiled for integrating a plurality of n different instantiations (12A, . . . 12N... | 04/01/2008 |
| 7353157 | Circuit simulation A system, method, and apparatus select state variables for, build state equations of, and simulate time-domain operation of an electronic circuit. The circuit is modeled with three branch types (inductor, resistor, voltage source in series; capacitor, resistor, curr... | 04/01/2008 |