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| Number | Title | Issue Date |
| 8190941 | Field control system The field control system includes: a field device; a field controller which is connected to a control network and which executes a computation processing for controlling the field device according to a given control cycle while executing a data communication between... | 05/29/2012 |
| 8171328 | State history storage for synchronizing redundant processors Embodiments of an invention for synchronizing redundant processors using state history are disclosed. In one embodiment, an apparatus includes two processors, state storage for each processor, and control logic. Each processor is to execute the same instructions. Th... | 05/01/2012 |
| 8156364 | Synchronized parallel processing of rows of data with dependencies by determining start time for processors A method (which can be computer implemented) for processing a plurality of adjacent rows of data units, using a plurality of parallel processors, given (i) a predetermined processing order, and (ii) a specified inter-row dependency structure, includes the steps of d... | 04/10/2012 |
| 8078899 | Asynchronous conversion circuitry apparatus, systems, and methods Apparatus, systems, and methods operate to receive a sufficient number of asynchronous input tokens at the inputs of an asynchronous apparatus to conduct a specified processing operation, some of the tokens decoded to determine an operation type associated with the ... | 12/13/2011 |
| 8078898 | Synchronizing TAP controllers with sequence on TMS lead A method comprises a system comprising a host device coupled to a first remote device actively operating according to a state diagram that the host device and all remote devices follow during operation of the system. The method further comprises powering up a second... | 12/13/2011 |
| 8074094 | Session redundancy using a replay model A mechanism for synchronizing states of components in a first routing engine to corresponding components in a second routing engine is provided. In order to reduce the amount of data required to synchronize the state of the components and the time and resources requ... | 12/06/2011 |
| 8060769 | Duplexed field controller There is provided a duplexed field controller. The duplexed field controller includes: first and second control units between which a control authority is switchable; a first application clock that is updated based on a reference clock so as to define a timing of an... | 11/15/2011 |
| 8020021 | Two global precise times for synchronization Method of controlling a wind power system comprising a plurality of system elements, the wind power system including a plurality of data processors distributed in the system elements, the method includes the steps of: synchronizing at least a part of the data proces... | 09/13/2011 |
| 8020020 | Fast, automatically scaled processor time stamp counter In one embodiment, a processor comprises at least one processor time stamp counter (TSC) and a control unit coupled to the processor TSC. The processor TSC corresponds to a TSC that is defined to increment at a TSC clock frequency even though the processor is config... | 09/13/2011 |
| 7921316 | Cluster-wide system clock in a multi-tiered full-graph interconnect architecture Mechanisms for providing a cluster-wide system clock in a multi-tiered full graph (MTFG) interconnect architecture are provided. Heartbeat signals transmitted by each of the processor chips in the computing cluster are synchronized. Internal system clock signals are... | 04/05/2011 |
| 7921317 | Method and apparatus for synchronizing central processing units in a multiprocessor apparatus Updating timers of central processing units (CPUs) in a multiprocessor apparatus involves the repeated performance of update operations by a device that is coupled to the CPUs via a memory interface. The operations include selecting one of the plurality of CPUs and ... | 04/05/2011 |
| 7900078 | Asynchronous conversion circuitry apparatus, systems, and methods Apparatus, systems, and methods operate to receive a sufficient number of asynchronous input tokens at the inputs of an asynchronous apparatus to conduct a specified processing operation, some of the tokens decoded to determine an operation type associated with the ... | 03/01/2011 |
| 7870411 | Tracking current time on multiprocessor hosts and virtual machines An operating system in a virtual environment can obtain the current time of the processor that the OS is utilizing through a method for synchronizing timers on multiple processors with a standard reference time, such as the Coordinated Universal Time (UTC). A hyperv... | 01/11/2011 |
| 7861104 | Methods and apparatus for collapsing interrupts Methods and apparatus are provided for generating interrupts associated with the completion of data processing. An external host may pass a first data block to a first processing engine and later pass a second data block to a second processing engine. In typical imp... | 12/28/2010 |
| 7827428 | System for providing a cluster-wide system clock in a multi-tiered full-graph interconnect architecture A system for providing a cluster-wide system clock in a multi-tiered full graph (MTFG) interconnect architecture are provided. Heartbeat signals transmitted by each of the processor chips in the computing cluster are synchronized. Internal system clock signals are g... | 11/02/2010 |
| 7814358 | Electronic apparatus capable of outputting data in predetermined timing regardless of contents of input data Simply constituted electronic apparatus that can definitely output an outputted data after predetermined length of time from a time when an inputted data processing is started, even if data processing time of the inputted data varies with the contents of the data. | 10/12/2010 |
| 7809970 | System and method for providing a high-speed message passing interface for barrier operations in a multi-tiered full-graph interconnect architecture A method, computer program product, and system are provided performing a Message Passing Interface (MPI) job. A first processor chip receives a set of arrival signals from a set of processor chips executing tasks of the MPI job in the data processing system. The arr... | 10/05/2010 |
| 7661006 | Method and apparatus for self-healing symmetric multi-processor system interconnects A computer implemented method, apparatus, and computer program product for managing symmetric multiprocessor interconnects. The process identifies functional communication connections between each processor in a plurality of processors on a multiprocessor to form id... | 02/09/2010 |
| 7657769 | N-way synchronization of data The invention relates to the use of history information as an aid to synchronization in a peer-to-peer system. In particular, node trees are used to represent portions of files systems designated for synchronization. The nodes in the node tree embody history informa... | 02/02/2010 |
| 7512826 | Method, apparatus, and product for an efficient virtualized time base in a scaleable multi-processor computer A method, apparatus, and computer program product are disclosed in a data processing system for providing a virtualized time base in a logically partitioned data processing system. A time base is determined for each one of multiple processor cores. The time base is ... | 03/31/2009 |
| 7509513 | Fault-tolerant synchronisation device for a real-time computer network Fault-tolerant synchronization of real-time equipment connected to a computer network of several tens of meters with an option of including or not including such equipment in the synchronization device is disclosed. Global scheduling of the real-time computer platfo... | 03/24/2009 |
| 7441048 | Communications system and method for synchronizing a communications cycle The invention relates to a method for synchronizing a communications cycle and a communications node in a network. The node is formed with devices for receiving a desired value for a time base of a communications cycle of the communications node in a communications ... | 10/21/2008 |
| 7437587 | Method and system for updating a value of a slow register to a value of a fast register Embodiments of the invention relate to synchronizing registers. An embodiment includes a plurality of processing cells each includes a plurality of CPUs, which run at different frequencies and each of which has an ar.itc timer register. A CPU in the fastest cell of ... | 10/14/2008 |
| 7434084 | Method and apparatus for eliminating sampling errors on a serial bus A synchronous bit-serial data interface utilizes a transmitter that transmits a data stream having duplicates of each data bit. The receiver samples the data stream utilizing either the rising or falling edge of a received clock signal. If the rising edge is utilize... | 10/07/2008 |
| 7428652 | Programmable phase generator for cross-clock communication where the clock frequency ratio is a rational number A method and apparatus to support communication between components in different clock domains having a rational clock frequency ratio of N/D. In one embodiment, a combination of integer phase generators are employed to produce phase control signals during an overall... | 09/23/2008 |
| 7421700 | Interprocess buffer management using a buffer delay time Interprocess buffer management is described. In an implementation, a method includes determining an amount of time to communicate a message and receive a response to the message by a first process from a second process. A buffer delay time is computed from the amoun... | 09/02/2008 |
| 7406559 | In-circuit programming architecture with processor, delegable flash controller, and code generator An architecture for an integrated circuit with in-circuit programming allows real-time modification of the in-circuit programming code and other code stored on the chip. The architecture utilizes a microprocessor and control logic on an integrated circuit having a s... | 07/29/2008 |
| 7395446 | Systems and methods for the implementation of a peer-to-peer rule-based pull autonomous synchronization system The present invention relates to a synchronization system that utilizes a synchronization wizard (“PullSync”) residing on a first computer device to request and receive (or “pull”) data from a second computer device. The first computer device (the “syncer... | 07/01/2008 |
| 7391835 | Optimizing synchronization between monitored computer system signals One embodiment of the present invention provides a system that optimizes synchronization between monitored signals in a computer system. During operation, the system receives a number of monitored signals. The system then forms a number of signal pairs by grouping e... | 06/24/2008 |
| 7392417 | Device for exchanging data signals between two clock domains A device for transferring data signals between a first clock domain and a second clock domain comprises a serial memory element and a parallel memory element which are coupled. The serial memory element comprises at least one extra memory position more than the para... | 06/24/2008 |
| 7385990 | Method to improve the resolution of time measurements and alignment in packet networks by time modulation A method of recovering timing information in a packet network is disclosed wherein a modulation scheme is used to transport additional information required for clock recovery between the sender and receiver across the network. ... | 06/10/2008 |
| 7366934 | Method of remotely controlling devices for endoscopy A method for remote control of devices. A remote control device receives a graphical user interface from a controlled device. The graphical user interface is periodically updated with controlled device data. The controlled device data is interrupted by command data ... | 04/29/2008 |
| 7363431 | Message-based distributed synchronization in a storage system Described is a synchronization technique that may be used to coordinate processing between endpoints using the connecting message fabric. Processors in a data storage system communicate using the message switch of the message fabric. Each processor is an endpoint wi... | 04/22/2008 |
| 7359407 | Data interface that is configurable into separate modes of operation for sub-bit de-skewing of parallel-fed data signals A data interface is provided that can de-skew data signals by taking into account different skewing effects on each data signal. The data interface can be used, for example, in a communication system and can be configured to operate in one of three possible modes of... | 04/15/2008 |
| 7356618 | Method and system for synchronizing platform clocks in a distributed wireless platform According to one embodiment of the present invention, a novel method and system are disclosed. In one embodiment, a first node records a first node local time of receiving a wirelessly transmitted packet, the first node local time recorded with a monotonically incre... | 04/08/2008 |
| 7356036 | Method providing distribution means for reference clocks across packetized networks Disclosed is a method of distributing a number of reference clocks across a packet network. The packet network has a master node and one or more slave nodes, the master node and each slave node having basis clocks. A sender sends time-stamped synchronization packets... | 04/08/2008 |
| 7356670 | Data processing system A multiprocessor data processing system is described wherein the processors communicate to each other via a shared memory. Each of the processors comprises an administration unit (18a) and a computational unit. The administration unit of a writing proc... | 04/08/2008 |
| 7350091 | Control apparatus for controlling a plurality of computers A control apparatus for controlling a plurality of computers is described. The control apparatus includes a memory, a clock generator, a clock switch circuit, and a main module. The clock switch circuit switches between a system clock and a corresponding clock of a ... | 03/25/2008 |
| 7346793 | Synchronization of multiple operational flight programs A method for synchronizing frame clocks in a plurality of processors comprises the steps of sending data packets from each of the processors to each of the other processors wherein each of the processors receives the data packets and identifies two of the data packe... | 03/18/2008 |
| 7340630 | Multiprocessor system with interactive synchronization of local clocks A multiprocessor computer system comprises multiple data processors, each with an internal clock for providing time stamps to application software. The processors take turns as synchronization masters. The present master transmits a “request” time stamp (indicat... | 03/04/2008 |
