Class 712/239 - Branch prediction

Subclass of Class 712 - Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors)
Definition: Subject matter including means or steps for attempting to
No. of patents: 622
Last issue date: 05/15/2012

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Number	Title	Issue Date
8181005	Hybrid branch prediction device with sparse and dense prediction caches A system and method for branch prediction in a microprocessor. A hybrid device stores branch prediction information in a sparse cache for no more than a common smaller number of branches within each entry of the instruction cache. For the less common case wherein an...	05/15/2012
8151096	Method to improve branch prediction latency An apparatus to generate a branch prediction of an instruction based at least in part on the address of the previous branch instruction, wherein the previous instruction is prior to the instruction in a program order. The prediction can also based on a branch histor...	04/03/2012
8127119	Control-flow prediction using multiple independent predictors The present disclosure generally describes computing systems with a multi-core processor comprising one or more branch predictor arrangements. The branch predictor are configured to predict a single and complete flow of program instructions associated therewith and ...	02/28/2012
8082428	Methods and system for resolving simultaneous predicted branch instructions A method of resolving simultaneous branch predictions prior to validation of the predicted branch instruction is disclosed. The method includes processing two or more predicted branch instructions, with each predicted branch instruction having a predicted state and ...	12/20/2011
8078850	Branch prediction technique using instruction for resetting result table pointer Methods, apparatus, and products for branch prediction in a computer processor are disclosed that include: recording for a sequence of occurrences of a branch, in an algorithm in which the branch occurs more than once, each result of the branch, including maintainin...	12/13/2011
8041931	Branch prediction apparatus, systems, and methods An apparatus and a system, as well as a method and article, may operate to predict a branch within a first operating context, such as a user context, using a first strategy; and to predict a branch within a second operating context, such as an operating system conte...	10/18/2011
8037288	Hybrid branch predictor having negative ovedrride signals Various embodiments are described relating to processors, branch predictors, branch prediction systems, and computing systems. ...	10/11/2011
8001363	System for speculative branch prediction optimization and method thereof A value representative of a processor's speculative branch prediction efficiency is determined and the speculative branch prediction depth is adjusted accordingly. The processor's speculative branch prediction efficiency may be represented by the average number of c...	08/16/2011
7984280	Storing branch information in an address table of a processor Methods for storing branch information in an address table of a processor are disclosed. A processor of the disclosed embodiments may generally include an instruction fetch unit connected to an instruction cache, a branch execution unit, and an address table being c...	07/19/2011
7966479	Concurrent vs. low power branch prediction An instruction processing circuit includes a decoder circuit, a basic block builder circuit, a multi-block builder circuit, first and second predictor circuits, and a sequencer circuit, where the sequencer circuit is operable, in a first environment, to cause the fi...	06/21/2011
7962733	Branch prediction mechanisms using multiple hash functions In one embodiment, the branch prediction mechanism includes a first storage including a first plurality of locations for storing a first set of partial prediction information. The branch prediction mechanism also includes a second storage including a second pluralit...	06/14/2011
RE42466	Branch predicting apparatus and branch predicting method A branch history stores execution history information of branch instructions, and predicts presence of a branch instruction and a corresponding branch destination. A first return address stack stores, when an execution of a call instruction of a subroutine is comple...	06/14/2011
7949861	Method and apparatus for managing instruction flushing in a microprocessor's instruction pipeline In one or more embodiments, a processor includes one or more circuits to flush instructions from an instruction pipeline on a selective basis responsive to detecting a branch misprediction, such that those instructions marked as being dependent on the branch instruc...	05/24/2011
7949862	Branch prediction table storing addresses with compressed high order bits Address control section includes an encoding section to generate higher-order address information made by compressing a predetermined higher-order bit part from predetermined higher-order and lower-order bit parts included in an instruction address, and a restoring ...	05/24/2011
7945767	Recovery apparatus for solving branch mis-prediction and method and central processing unit thereof A recovery apparatus for solving a branch mis-prediction, and a method and a central processing unit (CPU) thereof are provided. The recovery apparatus includes an instruction buffer, at least one circular instruction buffer, and a decoding and pairing circuit. The ...	05/17/2011
7934081	Apparatus and method for using branch prediction heuristics for determination of trace formation readiness A single unified level one instruction(s) cache in which some lines may contain traces and other lines in the same congruence class may contain blocks of instruction(s) consistent with conventional cache lines. Formation of trace lines in the cache is delayed on ini...	04/26/2011
7925871	Identification and correction of cyclically recurring errors in one or more branch predictors A data processing apparatus 2 is provided with one or more branch predictors 10 for generating branch predictions. A supervising predictor 12 is responsive to at least a stream of branch predictions to identify one or more cyclically recurring e...	04/12/2011
7913068	System and method for providing asynchronous dynamic millicode entry prediction A system and method for asynchronous dynamic millicode entry prediction in a processor are provided. The system includes a branch target buffer (BTB) to hold branch information. The branch information includes: a branch type indicating that the branch represents a m...	03/22/2011
7900026	Target branch prediction using a plurality of tables A system for predicting multiple targets for a single branch includes: a branch target buffer that includes a previous next address for an instruction and that receives an indirect instruction address to provide a first branch target prediction; a first branch table...	03/01/2011
7895422	Selective postponement of branch target buffer (BTB) allocation A system and method provides branch target buffer (BTB) allocation. When a branch instruction is received, a branch target address that corresponds to the branch instruction is determined. A determination is made whether the branch target address is presently stored...	02/22/2011
7890738	Method and logical apparatus for managing processing system resource use for speculative execution A method and logical apparatus for managing processing system resource use for speculative execution reduces the power and performance burden associated with inefficient speculative execution of program instructions. A measure of the efficiency of speculative execut...	02/15/2011
7890739	Method and apparatus for recovering from branch misprediction Embodiments of the present invention provide a system that executes a branch instruction. When executing the branch instruction, the system obtains a stored prediction of a resolution of the branch instruction and fetches subsequent instructions for execution based ...	02/15/2011
7882337	Method and system for efficient tentative tracing of software in multiprocessors A method of tentative tracing execution events in a multiprocessor system. Each processor stores tentative events in a corresponding buffer. The processor sets pointers in an array to a head and tail of a thread. When a condition triggers a tentative thread to be co...	02/01/2011
7870371	Target-frequency based indirect jump prediction for high-performance processors A frequency-based prediction of indirect jumps executing in a computing environment is provided. Illustratively, a computing environment comprises a prediction engine that processes data representative of indirect jumps performed by the exemplary computing environme...	01/11/2011
7865705	Branch target address cache including address type tag bit In at least one embodiment, a processor includes an execution unit and instruction sequencing logic that fetches instructions from a memory system for execution by the execution unit. The instruction sequencing logic includes branch logic that outputs predicted bran...	01/04/2011
7836288	Branch prediction mechanism including a branch prediction memory and a branch prediction cache A data processing system 2 incorporating an instruction pipeline 14 and a prefetch unit 16 is provided with a branch prediction mechanism using both a branch prediction memory 20 storing 1-bit values indicating strongly taken or strongly ...	11/16/2010
7827392	Sliding-window, block-based branch target address cache A sliding-window, block-based Branch Target Address Cache (BTAC) comprises a plurality of entries, each entry associated with a block of instructions containing at least one branch instruction having been evaluated taken, and having a tag associated with the address...	11/02/2010
7827393	Branch prediction apparatus, its method and processor A branch prediction apparatus reads out a branch history table 15 by an index calculated by the output of a branch history register 14 containing a plurality of the latest branch result of a branch instruction. The branch prediction apparatus comprises...	11/02/2010
7822954	Methods, systems, and computer program products for recovering from branch prediction latency A branch prediction algorithm is used to generate a prediction of whether or not a branch will be taken. One or more instructions are fetched such that, for each of the fetched instructions, the prediction initiates a fetch of an instruction at a predicted target of...	10/26/2010
7809933	System and method for optimizing branch logic for handling hard to predict indirect branches A system and method for optimizing the branch logic of a processor to improve handling of hard to predict indirect branches are provided. The system and method leverage the observation that there will generally be only one move to the count register (mtctr) instruct...	10/05/2010
7783871	Method to remove stale branch predictions for an instruction prior to execution within a microprocessor According to one embodiment a computer system is disclosed. The computer system includes a microprocessor and a chipset coupled to the microprocessor. The microprocessor removes stale branch instructions prior to the execution of a first cache line by finding existi...	08/24/2010
7779241	History based pipelined branch prediction Systems and methods for history based pipelined branch prediction. In one embodiment, access to prediction information to predict a plurality of branches within an instruction block is initiated in a same clock cycle of the computer processor as a fetch of the instr...	08/17/2010
7757071	Branch predicting apparatus and branch predicting method A return address in response to a return instruction corresponding to a call instruction is stored in a return address stack when a branch history detects presence of the call instruction. When the branch history detects the presence of the return instruction before...	07/13/2010
7747845	State machine based filtering of non-dominant branches to use a modified gshare scheme Disclosed is a method and apparatus providing the ability to create a multi-level prediction algorithm, whereby branch predictions beyond the first level of prediction are maintained at a secondary level because the prior level was unsuccessfully able to highly pred...	06/29/2010
7743238	Accessing items of architectural state from a register cache in a data processing apparatus when performing branch prediction operations for an indirect branch instruction The present invention relates to a data processing apparatus and method for accessing items of architectural state. The data processing apparatus comprises a plurality of registers operable to store items of architectural state, and a plurality of functional units, ...	06/22/2010
7725695	Branch prediction apparatus for repurposing a branch to instruction set as a non-predicted branch A processor incorporates a branch prediction mechanism which acts to predict branch outcomes for predicted type branch instructions. The processor also supports non-predicted type branch instructions which are ignored by the branch prediction mechanism and are not s...	05/25/2010
7711936	Branch predictor for branches with asymmetric penalties An approach for improving efficiency of speculative execution of instructions is disclosed. In one embodiment, a branch predictor entry associated with a particular branch instruction is accessed when the particular branch instruction is to be speculatively executed...	05/04/2010
7711935	Universal branch identifier for invalidation of speculative instructions A system for speculative branch predictions. An embodiment of the system includes branch prediction logic, fetch logic, and branch identification logic. The branch prediction logic is configured to predict a branch path for a branch in an instruction stream. The fet...	05/04/2010
7707397	Variable group associativity branch target address cache delivering multiple target addresses per cache line A branch prediction apparatus having two two-way set associative cache memories each indexed by a lower portion of an instruction cache fetch address is disclosed. The index selects a group of four entries, one from each way of each cache. Each entry stores a single...	04/27/2010
7689816	Branch prediction with partially folded global history vector for reduced XOR operation time A global history vector (GHV) mechanism maintains a folded (XORed) GHV with higher order entries and an unfolded (no XORed) GHV with lower order entries. When a new entry arrives at the GHV, the GHV mechanism performs an XOR of the oldest unfolded entry in the unfol...	03/30/2010

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Class 712/239 - Branch prediction