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| Number | Title | Issue Date |
| 8171256 | Systems and methods for preventing subversion of address space layout randomization (ASLR) A method for preventing subversion of address space layout randomization (ASLR) in a computing device is described. An unverified module attempting to load into an address space of memory of the computing device is intercepted. Attributes associated with the unverif... | 05/01/2012 |
| 8086823 | Method for speeding up page table address update on virtual machine A method is provided which eliminates redundancy from the shadow PT operation performed by the virtual machine monitor (VMM) when the guest operating system running on a virtual machine updates a guest page table (PT) address. The VMM associates a plurality of shado... | 12/27/2011 |
| 8074048 | Data storage device A storage device includes a memory for storing data in a plurality of logical volumes; a controlling unit for controlling an access to data in accordance with a process comprising the steps of: generating mapping information indicative of a correspondence between lo... | 12/06/2011 |
| 8041924 | Location-independent raid group virtual block management A computer storage system is described. A range of volume block numbers (VBNs) is assigned to a volume. A range of storage device block numbers (DBNs) is assigned to each of a plurality of storage devices. A first mapping parameters are created to map a first range ... | 10/18/2011 |
| 7953954 | Flash storage partial page caching Methods and apparatus may operate to receive allocation requests from a processor configured to manage memory comprising a non-volatile memory device configurable as a plurality of blocks comprising a plurality of sectors, assign partial page blocks from the plurali... | 05/31/2011 |
| 7941632 | Storage virtualization system with dynamic allocation of physical storage space Storage virtualization systems and methods that allow customers to manage storage as a utility rather than as islands of storage which are independent of each other. A demand mapped virtual disk image of up to an arbitrarily large size is presented to a host system.... | 05/10/2011 |
| 7908457 | Retaining an association between a virtual address based buffer and a user space application that owns the buffer Registering memory space for an application is performed. One or more open calls are received from an application to access one or more input/output (I/O) devices. Responsive to receiving the one or more open calls, one or more I/O map and pin calls are sent in orde... | 03/15/2011 |
| 7900018 | Embedded system and page relocation method therefor Provided are an embedded system and a method for relocating memory pages therefor. The embedded system includes a processor, a data relocating circuit for receiving a logical address from the processor, mapping the received logical address to a physical address to l... | 03/01/2011 |
| 7779055 | Device memory management during electronic file updating In performing memory management, an upgrade client of a host device identifies and reserves memory blocks large enough to accommodate new software components by performing sequential searches of first and second memory areas. The new software components are updated ... | 08/17/2010 |
| 7774577 | Memory device, memory controller and memory system An image memory, image memory system, and memory controller that are capable of efficiently accessing a rectangular area of two-dimensionally arrayed data are provided. The memory device has: a memory cell array that has a plurality of memory unit areas, each of whi... | 08/10/2010 |
| 7752417 | Dynamic selection of memory virtualization techniques A computer system may be configured to dynamically select a memory virtualization and corresponding virtual-to-physical address translation technique during execution of an application and to dynamically employ the selected technique in place of a current technique ... | 07/06/2010 |
| 7747838 | Method and apparatus for dynamically adjusting page size in a virtual memory range The illustrative embodiments described herein provide a computer implemented method, apparatus, and computer program product for adjusting a page size for a virtual memory range. The process identifies a set of pages in the virtual memory range that reside on a prim... | 06/29/2010 |
| 7734893 | Method for speeding up page table address update on virtual machine A method is provided which eliminates redundancy from the shadow PT operation performed by the virtual machine monitor (VMM) when the guest operating system running on a virtual machine updates a guest page table (PT) address. The VMM associates a plurality of shado... | 06/08/2010 |
| 7660966 | Location-independent RAID group virtual block management A storage operating system is configured to assign volume block numbers (VBNs) to a volume. The system has a plurality of disks, and each disk of the plurality of disks is assigned disk block numbers (DBNs). A raidmap is configured to map the VBNs to the DBNs of the... | 02/09/2010 |
| 7647471 | Method and system for collective file access using an mmap (memory-mapped file) A method for processing using a shared file that includes creating a plurality of mmaps between a shared file and a plurality of address spaces, wherein each of the plurality of mmaps maps at least a portion of the shared file to one of the plurality of address spac... | 01/12/2010 |
| 7617381 | Demand paging apparatus and method for embedded system A demand paging apparatus and a method for an embedded system are provided. The demand paging apparatus includes a nonvolatile storage device, a physical memory, a demand paging window, and a demand paging manager. The nonvolatile storage device stores code and data... | 11/10/2009 |
| 7594094 | Move data facility with optional specifications A move data facility is provided that enables optional specifications to be indicated to flexibly control the move operation. Data may be moved from any address space to any other address space without modifying the operating system to support such a move. A single ... | 09/22/2009 |
| 7590820 | Efficient algorithm for multiple page size support in IPF long format VHPT A machine-accessible medium may contain program instructions that, when executed by a processor, may cause the processor to perform at least one operation including searching a virtual hash page table (VHPT) using a region identifier and a virtual page number of a v... | 09/15/2009 |
| 7562205 | Virtual address translation system with caching of variable-range translation clusters A virtual address translation table and an on-chip address cache are usable for translating virtual addresses to physical addresses. Address translation information is provided using a cluster that is associated with some range of virtual addresses and that can be u... | 07/14/2009 |
| 7454591 | Storage system control method, storage system, and storage apparatus storing information relating a first logical unit number (LUN) used to access a volume by a host computer and a second LUN used to access the volume by another storage system with remote copy procedure A method controls a storage system including a first storage apparatus including a first storage volume to store data therein, a second storage apparatus including a second storage volume to store data therein, the first and second storage apparatuses being communic... | 11/18/2008 |
| 7444637 | Systems and methods for scheduling coprocessor resources in a computing system Systems and methods for scheduling coprocessing resources in a computing system are provided without redesigning the coprocessor. In various embodiments, a system of preemptive multitasking is provided achieving benefits over cooperative multitasking by any one or m... | 10/28/2008 |
| 7444480 | Processor, memory device, computer system, and method for transferring data A processor connected to a memory device includes a random number generator that generates random numbers identical to random numbers generated in the memory device; an XOR logic unit that performs a XOR operation of the random numbers and an address in the memory d... | 10/28/2008 |
| 7441090 | System and method for updating data sectors in a non-volatile memory using logical block addressing A device is disclosed for storing mapping information for mapping a logical block address identifying a block being accessed by a host to a physical block address, identifying a free area of nonvolatile memory, the block being selectively erasable and having one or ... | 10/21/2008 |
| 7437546 | Multiple, cooperating operating systems (OS) platform system and method Embodiments of a multi-processor platform including multiple, cooperating operating systems are described. Multiple operating systems, each of which may be of a different type or nature, run on different partitions of the multi-processor platform, yet coexist and co... | 10/14/2008 |
| 7430202 | System and method of tributary time-space switching A tributary time-space switch and a method of switching are provided having low memory requirements. The switch includes a number of inputs and outputs. Each of the inputs receives an input data stream carrying tributary payloads from an external input link that are... | 09/30/2008 |
| 7428620 | Method for switching data library managers A device, method, and system for switching library managers of a data library while maintaining data library storage devices online. A library manager accepts and executes data transaction commands for access to data residing on the storage devices of the data libra... | 09/23/2008 |
| 7428573 | Transaction accelerator for client-server communication systems In a network having transaction acceleration, for an accelerated transaction, a client directs a request to a client-side transaction handler that forwards the request to a server-side transaction handler, which in turn provides the request, or a representation ther... | 09/23/2008 |
| 7426625 | Data processing system and computer program product for support of system memory addresses with holes A method, computer program product, and a data processing system for supporting memory addresses with holes is provided. A first physical address range allocated for system memory for an operating system run by a processor configured to support logical partitioning ... | 09/16/2008 |
| 7424593 | Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector storage locations spanning across one or more rows of a nonvolatile m... | 09/09/2008 |
| 7421533 | Method to manage memory in a platform with virtual machines An embodiment of the present invention enables the virtualizing of virtual memory in a virtual machine environment within a virtual machine monitor (VMM). Memory required for direct memory access (DMA) for device drivers, for example, is pinned by the VMM and preven... | 09/02/2008 |
| 7421564 | Incrementing successive write operations to a plurality of memory devices A centralized memory allocation system utilizes write pointer drift correction. The memory stores data units. The memory controller receives a write request associated with a data unit and stores the data unit in the memory. The memory controller also transmits a re... | 09/02/2008 |
| 7418570 | Logical unit number increasing device, and logical unit number increasing method According to an embodiment, virtual logical units are each provided with correlative data between a virtual logical unit number and a real logical unit number. In response to an access request specifying a virtual logical unit number from a host, a correlated real l... | 08/26/2008 |
| 7418572 | Pretranslating input/output buffers in environments with multiple page sizes Pretranslating input/output buffers in environments with multiple page sizes that include determining a pretranslation page size for an input/output buffer under an operating system that supports more than one memory page size, identifying pretranslation page frame ... | 08/26/2008 |
| 7409487 | Virtualization system for computers that use address space indentifiers A virtual computer system including multiple virtual machines (VMs) is implemented in a physical computer system that uses address space identifiers (ASIDs). Each VM includes a virtual translation look-aside buffer (TLB), in which guest software, executing on the VM... | 08/05/2008 |
| 7406581 | Speculative instruction load control A method and system for validating speculative load operations. The system identifies speculative load operations that might be executed in a code sequence and after translating the virtual address of the speculative load to a physical address, a speculative load co... | 07/29/2008 |
| 7404055 | Memory transfer with early access to critical portion In some embodiments, data may be transferred from a first memory agent to a second memory agent in a first format having a first width, and at least a critical portion of the data maybe transferred from the second memory agent back to the first memory agent in a sec... | 07/22/2008 |
| 7404063 | Reclaiming the PCI memory range with minimal memory loss in IA-32 platforms A method for configuring resources in IA-32 computers enables the PCI memory address range to be reclaimed with minimal loss of available physical memory. The BIOS establishes a remap window at the top of physical memory. The remap window corresponds to the PCI memo... | 07/22/2008 |
| 7395278 | Transaction consistent copy-on-write database A database view of a database is created which provides a transaction-consistent view of an existing database at a previous time. Each database view contains all the information needed to, along with the primary database, determine the contents of the primary databa... | 07/01/2008 |
| 7394884 | Synchronizing method To synchronize a regularly occurring pulse train to the average of a bunched pulse train, an oscillator generates a plurality of differently phase shifted signals at a given frequency. One of the phase shifted signals is selected as an output signal. The output sign... | 07/01/2008 |
| 7386697 | Memory management for virtual address space with translation units of variable range size In a virtual memory system, address translation information is provided using a cluster that is associated with some range of virtual addresses and that can be used to translate any virtual address in its range to a physical address, where the sizes of the ranges ma... | 06/10/2008 |
