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| Number | Title | Issue Date |
| 8190850 | Virtual block mapping for relocating compressed and/or encrypted file data block blocks This invention is a system and a method for operating a storage server to provide read or write access to a data in a data network using a new architecture. The method of creating virtual block mapping pointer in response to a request by a client of the storage serv... | 05/29/2012 |
| 8180994 | Optimized page programming order for non-volatile memory During a programming data transfer process in a non-volatile storage system, recording units of data are transferred from a host to a memory device, such as a memory card. For each recording unit, pages of data are arranged in an order such that a page which takes l... | 05/15/2012 |
| 8176294 | Reducing storage expansion of a virtual machine operating system Storage expansion for a virtual machine operating system is reduced. In one embodiment, virtual machines are run on a host and accessed by remote clients over a network. When a guest operating system on one of the virtual machines deletes a file, a VM storage manage... | 05/08/2012 |
| 8166275 | Method and apparatus for accessing a multi ordered memory array A method and system for transferring data in a multi ordered memory array from a source memory array to a destination memory array, at least one of which is multi-ordered. A reading memory access unit reads data from the source memory array according to a source acc... | 04/24/2012 |
| 8156305 | Remapping of data addresses for large capacity low-latency random read memory Described herein are method and apparatus for using an LLRRM device as a storage device in a storage system. At least three levels of data structures may be used to remap storage system addresses to LLRRM addresses for read requests, whereby a first-level data struc... | 04/10/2012 |
| 8156306 | Systems and methods for using thin provisioning to reclaim space identified by data reduction processes The invention provides a system to reclaim space identified as no longer in use and comprises a vLUN, a thinly provisioned mapped LUN, a mapping layer, and a data reduction engine. Chunks of data are stored at logical chunk addresses (LCAs) in the vLUN and are mappe... | 04/10/2012 |
| 8151082 | Apparatus, system, and method for converting a storage request into an append data storage command An apparatus, system, and method are disclosed for converting a storage request to an append data storage command. A storage request receiver module receives a storage request from a requesting device. The storage request is to store a data segment onto a data stora... | 04/03/2012 |
| 8145874 | System and method of data forwarding within an execution unit In an embodiment, a method is disclosed that includes, comparing, during a write back stage at an execution unit, a write identifier associated with a result to be written to a register file from execution of a first instruction to a read identifier associated with ... | 03/27/2012 |
| 8145875 | Address translation circuit for a CPU An address translation circuit includes an area address holding section, an invert flag holding section, a match detection section, and a bit conversion section. The area address holding section holds at least part of a translation target address as an area address.... | 03/27/2012 |
| 8140819 | Method and apparatus for managing memory accesses in an AV decoder The invention describes apparatus and method for receiving and decoding a multiplexed data stream organized in sectors containing payload portions individually destined for one of two or more decoders. The apparatus is connected to a memory device addressable in an ... | 03/20/2012 |
| 8140820 | Data processing apparatus and method for handling address translation for access requests issued by processing circuitry A data processing apparatus has address translation circuitry which is responsive to an access request specifying a virtual address, to perform a multi-stage address translation process to produce, via at least one intermediate address, a physical address in memory ... | 03/20/2012 |
| 8140821 | Efficient read/write algorithms and associated mapping for block-level data reduction processes A system configured to optimize access to stored chunks of data is provided. The system comprises a vLUN layer, a mapped LUN layer, and a mapping layer disposed between the vLUN and the mapped LUN. The vLUN provides a plurality of logical chunk addresses (LCAs) and ... | 03/20/2012 |
| 8135935 | ECC implementation in non-ECC components A method and apparatus for implementation of error correction code (ECC) checking in non-ECC-compliant components. The method includes receiving a logical address, wherein the logical address maps to first and second physical addresses of a memory. The first and sec... | 03/13/2012 |
| 8135936 | Adaptive address mapping with dynamic runtime memory mapping selection A system monitors and dynamically changes memory mapping in a runtime of a computing system. The computing system has various memory resources, and multiple possible mappings that indicate how data is to be stored in and subsequently accessed from the memory resourc... | 03/13/2012 |
| 8127105 | Parallel pruned bit-reversal interleaver A parallel lookahead pruned bit-reversal interleaver algorithm and architecture have been proposed. The algorithm interleaves a packet of length N in at most log(N)−1 steps compared to N steps using existing sequential algorithms, and has a simple architecture ame... | 02/28/2012 |
| 8103848 | Memory control device and information processing apparatus An information processing apparatus includes a memory configured such that structural data areas holding therein structural data, each being constituted by a plurality of pieces of element data, are allocated to a plurality of memory banks, an address area detecting... | 01/24/2012 |
| 8095770 | Method and system for mapping data to a process The invention relates to mapping data to a process. A method of the invention includes receiving a request to copy a parent process, where the parent process is associated with a first virtual memory address space that includes a first mapping to a page of a file lo... | 01/10/2012 |
| 8095542 | Methods and apparatus for allowing access to content In one aspect, two ways of accessing a content unit stored on a CAS are provided, wherein the content unit has a content address that is computed based, at least in part, on at least a portion of its content. A first interface is provided to a file system in which t... | 01/10/2012 |
| 8074045 | Virtualization with fortuitously sized shadow page tables In a computing system having virtualization software including a guest operating system (OS), a method for providing page tables that includes: providing a guest page table used by the guest OS and a shadow page table used by the virtualization software wherein at l... | 12/06/2011 |
| 8069192 | Computing device with relatively limited storage space and operating / file system thereof A computing device includes a processor, a storage device having an executable file, and a file system for executing the file in place on the storage device on behalf of the processor. The file is divided into multiple non-contiguous fragments on the storage device,... | 11/29/2011 |
| 8046561 | Methods and apparatus for selecting a storage zone for a content unit Some embodiments are directed to a technique for storing and/or locating content units stored on an object addressable storage (OAS) system, wherein each content unit is identified by an object identifier. The OAS system may comprise a plurality of zones, each of wh... | 10/25/2011 |
| 8046560 | Serial number based storage device allocation Serial number based storage device allocation is disclosed. A serial number associated with the storage device is mapped to a device file associated with the storage device on a host having a connection to the storage device. The serial number is mapped to a device ... | 10/25/2011 |
| 8037277 | Information processing apparatus and computer-readable storage medium A computer-readable storage medium stores a program for causing a processor to perform a process including: acquiring a first address that specifies a start address of a first area on the main memory where a target data to be cached is stored and range information t... | 10/11/2011 |
| 8019963 | Systems and methods for transferring data in a block-level storage operation The invention provides a system and method for storing a copy of data stored in an information store. In one embodiment, a data agent reads one or more blocks containing the data from the information store. The data agent maps the one or more blocks to provide a map... | 09/13/2011 |
| 8015201 | Servicing daemon for live debugging of storage systems A servicing daemon is described herein for providing servicing of a running computer system (such as a filer). The servicing daemon resides and executes on the operating system of the filer and communicates across a network with a debugger that resides and executes ... | 09/06/2011 |
| 8015386 | Configurable memory manager A configurable memory manager is configurable with various configuration parameters. The configurable memory manager has client ports for receiving requests for accessing memories and memory ports for accessing respective memories. The client and memory ports are ea... | 09/06/2011 |
| 7996647 | Enhanced microprocessor or microcontroller A processor device has a data memory with a linear address space, the data memory being accessible through a plurality of memory banks. At least a subset of the memory banks are organized such that each memory bank of the subset has at least a first and second memor... | 08/09/2011 |
| 7979665 | Method and apparatus for processing access requests in a computer system One embodiment of the present invention is directed to providing a software layer that provides a Content Addressable Storage (CAS) capability in a computer system in which the content units are ultimately stored on a block I/O storage system. An application program... | 07/12/2011 |
| 7979666 | System and method for context-independent codes for off-chip interconnects A system and method for context-independent coding using frequency-based mapping schemes, sequence-based mapping schemes, memory trace-based mapping schemes, and/or transition statistics-based mapping schemes in order to reduce off-chip interconnect power consumptio... | 07/12/2011 |
| 7962715 | Memory controller for non-homogeneous memory system A memory controller includes at least one interface adapted to be coupled to one or more first memory devices of a first memory type having a first set of attributes, and to one or more second memory devices of a second memory type having a second set of attributes.... | 06/14/2011 |
| 7958330 | Compiler program, compiler program recording medium, compile method, and program processing system A compiler program creates a program, which is executed on a platform where use of a pointer is limited and that can perform a pointer operation without specifying addresses allocated to a memory. When a source code, which is related with the pointer operation to be... | 06/07/2011 |
| 7958331 | Storage device with opportunistic address space A data storage device comprises storage media including physical data blocks. The data storage device comprises a storage circuit. The storage circuit compresses a user data block into a compressed user data block before storing the compressed user data in one of th... | 06/07/2011 |
| 7945760 | Methods and apparatus for address translation functions Techniques are described for efficient reordering of data and performing data exchanges within a register file or memory, or in general, any device storing data that is accessible through a set of addressable locations. In one technique, an address translator is pla... | 05/17/2011 |
| 7934072 | Solid state storage reclamation apparatus and method A method and apparatus are disclosed for reclaiming solid state storage with limited write cycles such as flash memory. Through the use of shared storage for common data patterns, physical space may be conserved or reclaimed in a solid state device. The apparatus ma... | 04/26/2011 |
| 7930275 | System and method for restoring and reconciling a single file from an active file system and a snapshot The present invention relates to a system for restoring a file from a snapshot, where a version of the file exists in both an active file system and the snapshot. A twin inode is created in the active file system and comparisons are made between block pointers of th... | 04/19/2011 |
| 7921275 | Method for enabling direct prefetching of data during asychronous memory move operation While an asynchronous memory move (AMM) operation is ongoing, a prefetch request for data from the source effective address or the destination effective address triggers cache injection by the AMM mover of relevant data from the stream of data being moved in the phy... | 04/05/2011 |
| 7921274 | Computer memory addressing mode employing memory segmenting and masking A computer addressing mode and memory access method rely on a memory segment identifier and a memory segment mask for indicating memory locations. In this addressing mode, a processor receives an instruction comprising the memory segment identifier and memory segmen... | 04/05/2011 |
| 7882327 | Communicating between partitions in a statically partitioned multiprocessing system In one embodiment, a method comprises assigning a unique node number to each of a first plurality of nodes in a first partition of a system and a second plurality of nodes in a second partition of the system. A first memory address space spans first memory included ... | 02/01/2011 |
| 7877571 | System and method of determining an address of an element within a table In a particular embodiment, a method is disclosed that includes executing a single instruction to identify a location within a table stored at a memory. The single instruction is executable by a processor to extract bit field data from a first register and insert th... | 01/25/2011 |
| 7877570 | Consolidation of matching memory pages A method and apparatus for managing memory allocation using memory pages. A first physical memory page is compared with a second physical memory page, wherein the first physical memory page is associated with a first page table and the second physical memory page is... | 01/25/2011 |
