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"The Americans have need of the telephone, but we do not. We have plenty of messenger boys."
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| Number | Title | Issue Date |
| 8086820 | Data structure for highly efficient data queries Apparatus and method for highly efficient data queries. In accordance with various embodiments, a data structure is provided in a memory space with a first portion characterized as a virtual data space storing non-sequential entries and a second portion characterize... | 12/27/2011 |
| 8037440 | Optimization of ROM structure by splitting A method for designing a read-only memory (ROM), and related device, includes partitioning a dataset into two or more sub-datasets that each have the same address space, but are of a smaller bit-width than the original dataset. The sub-datasets are row collapsed, an... | 10/11/2011 |
| 8001358 | Microprocessor and method of processing data including peak value candidate selecting part and peak value calculating part A data storing part outputs n-bit data according to a reading address generated by an address generator. A peak value candidate selecting part selects a maximum value of a plurality of elements forming the n-bit data as a peak value candidate when data of one data u... | 08/16/2011 |
| 7739251 | Incremental maintenance of an XML index on binary XML data Techniques are provided for incrementally maintaining an XML index built to access XML data that is encoded in binary XML form. Rather than delete and reinsert index entries of all the nodes of a modified XML document, only the index entries of the affected nodes ar... | 06/15/2010 |
| 7647469 | Method of assigning virtual import/export element addresses A method for assigning element addresses in an automated data storage library includes determining if a data storage device, such as a tape cartridge, belongs to a particular host's cartridge assignment policy. If so, the data storage device is issued a virtual impo... | 01/12/2010 |
| 7594091 | Computer-implemented system and method for lock handling Computer-implemented systems and methods for handling access to one or more resources. Executable entities that are running substantially concurrently provide access requests to an operating system (OS). One or more traps of the OS are avoided to improve resource ac... | 09/22/2009 |
| 7543130 | Digital signal processor for initializing a ram A digital signal processor is adapted to a working RAM, which is capable of storing a plurality of data in a rewritable manner and whose storage area is divided into a plurality of sub-areas that are designated by addresses in read/write operations, wherein an opera... | 06/02/2009 |
| 7454589 | Data buffer circuit, interface circuit and control method therefor There are provided a buffer circuit buffers data between a synchronous circuit and an asynchronous circuit, and a control method therefor. There are also provided an interface circuit that controls data transfer between a synchronous memory circuit and the asynchron... | 11/18/2008 |
| 7444493 | Address translation for input/output devices using hierarchical translation tables An embodiment of the present invention is a technique to perform address translation. A table structure is indexed by a source identifier of an input/output (I/O) transaction specifying a guest physical address and requested by an I/O device to map the I/O device to... | 10/28/2008 |
| 7444458 | Method for assigning addresses to memory devices A memory system having a memory controller and several separate memory devices connected to the controller by a system bus. The memory devices each included an array of memory cells, addressing circuitry used to address the cells and an address storage circuit which... | 10/28/2008 |
| 7444488 | Method and programmable unit for bit field shifting A method and a programmable unit for bit field shifting in a memory device in a programmable unit as a result of the execution of an instruction, in which a bit segment is shifted within a first memory unit to a second memory unit, are presented. The bit segment is ... | 10/28/2008 |
| 7433972 | Method and apparatus for operating a CD independently from a host processor An apparatus for a compact disk with an independent audio functionality is disclosed. The apparatus includes a logic core, an IDE controller, and a pass-through module, which are coupled to a micro-controller core. The logic core receives and sends signals to and fr... | 10/07/2008 |
| 7430649 | Input/output device, computer, computer system, input/output control program, OS, page management program, and page management method A computer system including input/output devices that transfer data and a computer that controls a process using a virtual storage and inputs data to and outputs data from a medium, wherein the input/output devices and the computer include address conversion tables ... | 09/30/2008 |
| 7428620 | Method for switching data library managers A device, method, and system for switching library managers of a data library while maintaining data library storage devices online. A library manager accepts and executes data transaction commands for access to data residing on the storage devices of the data libra... | 09/23/2008 |
| 7426613 | Addressing, command protocol, and electrical interface for non-volatile memories utilized in recording usage counts Electrical interfaces, addressing schemes, and command protocols allow for communications with memory modules in computing devices such as imaging and printing devices. Memory modules may be assigned an address through a set of discrete voltages. One, multiple, or a... | 09/16/2008 |
| 7424554 | Method of and system for changing the address of a disk array enclosure An apparatus for setting an enclosure address in a computer system having a plurality of enclosures includes at least one enclosure address control device including input means for changing the enclosure address of an associated enclosure of the plurality of enclosu... | 09/09/2008 |
| 7421629 | Semi-conductor component test device, in particular data buffer component with semi-conductor component test device, as well as semi-conductor component test procedure The invention relates to a semi-conductor component test procedure, and a semiconductor component test device (10b), which comprise: a device (43) for generating pseudo-random address values to be applied to co... | 09/02/2008 |
| 7418569 | System and method for inband management of a virtual disk The present invention provides a system and method for inband management of a virtual disk. A novel volume information command, which is a vendor-specific SCSI command, is sent by a client to a storage appliance, in response, generates a data structure containing va... | 08/26/2008 |
| 7415649 | Semi-conductor component test device with shift register, and semi-conductor component test procedure The invention relates to a semi-conductor component test procedure, as well as to a semi-conductor component test device with a shift register, which comprises several memory devices from which pseudo-random values (BLA, COL, ROW) to be used for testing a semi-condu... | 08/19/2008 |
| 7411949 | System, method and apparatus for preparing a table for a cell scheduler Methods, apparatuses and systems for populating a data structure. The data structure may be established in a memory unit and may have a total number of N slots for entries. In this case, N is defined as an integer representing the total number of slots in the data s... | 08/12/2008 |
| 7404064 | Method and device for calculating addresses of a segmented program memory A method and a device for converting a virtual address of a program executed by a processor and provided by a program counter into a physical address in a program memory, the program having been stored in the memory in at least one segment of consecutive addresses. ... | 07/22/2008 |
| 7398337 | Association of host translations that are associated to an access control level on a PCI bridge that supports virtualization A method, computer program product, and distributed data processing system that allows a system image within a multiple system image virtual server to directly expose a portion, or all, of its associated system memory to a shared PCI adapter without having to go thr... | 07/08/2008 |
| 7386614 | Method allowing persistent links to web-pages A system that enables creation of URL addresses in which the path information is partially or entirely symbolic. The symbolic path information is maintained even after the physical path information is altered, whereby users do not have to learn or provide constantly... | 06/10/2008 |
| 7386643 | Mechanism to guarantee forward progress for incoming coherent input/output (I/O) transactions for caching I/O agent on address conflict with processor transactions A forwarding device compares a first address from a first coherent input/output (I/O) transaction with an address from at least one processor-issued transaction to determine if an address conflict exists. The forwarding device completes a first processor-issued tran... | 06/10/2008 |
| 7383413 | Card-cage audio visual signal control system with card ID assignment A card-cage audio visual signal control system with card ID assignment is disclosed. Cards are removably installed in slots inside a cage enclosure, each card performing a specific function with respect to audio visual signals applied to the card. Card IDs are used ... | 06/03/2008 |
| 7376782 | Index/data register pair for indirect register access A computer system provides a program access to a first register during real mode operation by using an index register and a data register, wherein the index register and the data register are located in real mode memory space and the first register is located outsid... | 05/20/2008 |
| 7373479 | Method to allow PCI host bridge (PHB) to handle pre-fetch read transactions on the PCI bus which access system memory through translation control entry (TCE) table A method, system, and computer instructions for providing valid translation entries in the TCE table for all supported DMA addresses to prevent the occurrence of system errors due to prefetching. The mechanism of the present invention reserves a page in system memor... | 05/13/2008 |
| 7370173 | Method and system for presenting contiguous element addresses for a partitioned media library According to one embodiment of the present invention, a controller that partitions a media library for multiple host applications can, for each partition, assign a base element address for an element type and associate physical element addresses for elements of an e... | 05/06/2008 |
| 7366352 | Method and apparatus for performing fast closest match in pattern recognition A method and apparatus for determining a closest match of N input patterns relative to R reference patterns using K processing units. Each of a set of input patterns are loaded into the K processing units. One of the Reference patterns is sequentially loaded into ea... | 04/29/2008 |
| 7366868 | Generating updated virtual disks using distributed mapping tables accessible by mapping agents and managed by a centralized controller The present invention provides a method for copying data through a virtualized storage system using distributed table driven (I/O) mapping. In a system having a virtual disk (the “original disk”), a persistent mapping table for this virtual disk exists on a cont... | 04/29/2008 |
| 7366885 | Method for optimizing loop control of microcoded instructions A method for optimizing loop control of microcoded instructions includes identifying an instruction as a repetitive microcode instruction such as a move string instruction, for example, having a repeat prefix. The repetitive microcode instruction may include a loop ... | 04/29/2008 |
| 7363478 | Retrieving multi-byte vector elements from byte indexed table using replicated and consecutive number added indices for each element index A lookup operation is carried out on a data table by logically dividing the data table into a number of smaller sets of data that can be indexed with a single byte of data. Each set of data consists of two vectors, which constitute the operands for a permute instruc... | 04/22/2008 |
| 7363466 | Microcomputer A built-in memory is divided into the following two types: first memories 5 and 7 and second memories 4 and 6, and made accessible in parallel by third buses XAB and XDB and second buses YAB and YDB respectively. Thereby, a CPU core 2 | 04/22/2008 |
| 7360049 | Non-volatile semiconductor memory device having a password protection function In a nonvolatile semiconductor memory device according to the present invention, a password protection function is enabled or disabled based on a first specified value M and a second state specified value P such that when both of the first specified value M and the ... | 04/15/2008 |
| 7356664 | Method and apparatus for transferring data from a memory subsystem to a network adapter for improving the memory subsystem and PCI bus efficiency A method, apparatus, and computer instructions for transferring data from a memory to a network adapter. A request is received to transfer data to a network adapter. An offset is set for a starting address of the data to align the data with an end of a frame in the ... | 04/08/2008 |
| 7356667 | Method and apparatus for performing address translation in a computer system An address translation unit is provided for use in a computer system. The unit contains a set of page table entries for mapping from a virtual address to a packet address. Each page table entry corresponds to one page of virtual memory, and typically includes one or... | 04/08/2008 |
| 7356646 | Memory card using NAND flash memory and its operating method A memory card is connected to a host using a NAND flash memory interface mode. In addition, the memory card further includes the NAND flash memory as well as a controller. The NAND flash memory uses an interface mode different from that supported by the host. The co... | 04/08/2008 |
| 7352621 | Method for enhanced block management A method and apparatus is described herein for managing bad blocks/sectors in a nonvolatile memory. Upon detecting an input/output fault to a target block in a nonvolatile memory, the target block is remapped to a spare block, if the block is predicted as a bad bloc... | 04/01/2008 |
| 7353229 | Post-session internet advertising system The present invention is directed to a post-session advertising system that may be used in media such as computers, personal digital assistants, telephones, televisions, radios, and similar devices. In one preferred embodiment, a first display is viewed in a first p... | 04/01/2008 |
| 7346755 | Memory quality assurance An example memory quality assuring system is provided. The system may include a memory mapping logic configured to facilitate accessing memory locations and redirecting memory accessing operations. The system may also include a memory quality assurance logic configu... | 03/18/2008 |
