Did You Know...
...that a workman who left the soap mixing machine on too long was responsible for making Ivory Soap? He was so embarrassed by his mistake that he threw the mess in a stream. Imagine his dismay when the evidence of his error floated to the surface! Result: Ivory soap, the soap that floats.
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| Number | Title | Issue Date |
| 8117404 | Misalignment predictor In one embodiment, a processor comprises a circuit coupled to receive an indication of a memory operation to be executed in the processor. The circuit is configured to predict whether or not the memory operation is misaligned. A number of accesses performed by the p... | 02/14/2012 |
| 8117405 | Storage control method for managing access environment enabling host to access data A computer system wherein a first access environment program converts an application data created by the first application program, according to access environment information, and sends the converted application data to a first volume, wherein a management computer... | 02/14/2012 |
| 8117406 | Method of storing data into flash memory in a DBMS-independent manner using the page-differential The present invention proposes an effective and efficient method of storing data called page-differential logging for flash-based storage systems. The primary characteristics of the invention are: (1) it writes only the page-differential that is defined as the diffe... | 02/14/2012 |
| 8112592 | Information processing apparatus and method The present invention relates to information processing apparatuses. A content to be checked out is stored in an automatic-checking-out-destination storage section 113 from musical-piece-file storage sections 108-1 and 108-2 for ea... | 02/07/2012 |
| 8112593 | System and method for improving cluster performance A system for providing improved cluster operation performance comprises a storage system and a cluster system communicatively coupled to the storage system. The cluster system comprises an active node and a plurality of passive nodes. The active node comprises a sto... | 02/07/2012 |
| 8112594 | Efficient point-to-point enqueue and dequeue communications Systems and methods for writing and/or reading data to a point-to-point shared memory communication mechanism are provided according to embodiments disclosed herein. According to one embodiment, a determination may be made whether a first memory location in the cach... | 02/07/2012 |
| 8108632 | Kernel and application cooperative memory management Embodiments of the present invention provide a mechanism for an operating system and applications to cooperate in memory management. Applications register with the operating system for cooperative memory management. The operating system monitors the memory and deter... | 01/31/2012 |
| 8108629 | Method and computer for reducing power consumption of a memory Provided is a method of managing, in a computer including a processor and a memory that stores information referred to by the processor, the memory. The memory includes a plurality of memory banks, respective power supplies of which are independently controlled. The... | 01/31/2012 |
| 8108630 | Storage apparatus, and storage control method using the same The present invention aims at providing a storage apparatus that does not increase the I/O load on a primary volume, even if there are several secondary volumes for which data consistency with the primary volume should be guaranteed. A storage apparatus writes write... | 01/31/2012 |
| 8108631 | Transactional memory support for non-coherent shared memory systems using selective write through caches A method, including: initiating a memory operation at a first node including a first memory controller (MC) and a transaction table configured to store a list of nodes affected by the memory operation, transmitting a store request signal to a second node including a... | 01/31/2012 |
| 8103839 | Content data communication system, content data recording/reproducing device, data communication method and program A content data communication system comprises a content data recording/reproducing device and an information processing device. The content data recording/reproducing device includes a recording/reproducing device-side connector unit and a recording/reproducing devi... | 01/24/2012 |
| 8099565 | Methods and devices for determining quality of services of storage systems Methods and systems for allowing access to computer storage systems. Multiple requests from multiple applications can be received and processed efficiently to allow traffic from multiple customers to access the storage system concurrently. ... | 01/17/2012 |
| 8099564 | Programmable memory controller A memory controller implemented within a programmable integrated circuit can include a user interface having a command register and a plurality of data First-In-First-Out (FIFO) memories, wherein the command register can receive an address of a data FIFO memory of t... | 01/17/2012 |
| 8095746 | Conserving and shaping address space with arrays A system and method for using an array structure to abstract the addressing of device memory allows for larger amounts of device memory to be accessed compared with using conventional pointers to access a 32 bit memory space. Additionally, the memory organization ma... | 01/10/2012 |
| 8095747 | Memory system and method In an embodiment, an apparatus includes a memory controller configured to control first and second memory components. A point-to-point data bus configured to pass data between the memory controller and the memory components may include a direct connection from each ... | 01/10/2012 |
| 8095745 | Non-sequential transfer of data from a memory The disclosed embodiments relate to a memory controller for retrieving a plurality of data stored in a memory in communication with the memory controller, the plurality of data being characterized by a first arrangement of first and second non-parallel arrays, such ... | 01/10/2012 |
| 8095749 | Application pre-launch to reduce user interface latency A device stores a plurality of applications and a list of associations for those applications. The applications are preferably stored within a secondary memory of the device, and once launched each application is loaded into RAM. Each application is preferably assoc... | 01/10/2012 |
| 8095748 | Method and apparatus for sending data from multiple sources over a communications bus In a memory system, multiple memory modules communicate over a bus. Each memory module may include a hub and at least one memory storage unit. The hub receives local data from the memory storage units, and downstream data from one or more other memory modules. The h... | 01/10/2012 |
| 8090916 | In-circuit programming architecture with processor and delegable flash controller An architecture for an integrated circuit with in-circuit programming allows real-time modification of the in-circuit programming code and other code stored on the chip. The architecture utilizes a microprocessor and control logic on an integrated circuit having a s... | 01/03/2012 |
| 8086806 | Systems and methods for coalescing memory accesses of parallel threads One embodiment of the present invention sets forth a technique for efficiently and flexibly performing coalesced memory accesses for a thread group. For each read application request that services a thread group, the core interface generates one pending request tabl... | 12/27/2011 |
| 8086896 | Dynamically tracking virtual logical storage units In virtualized environments, storage may be managed dynamically due to the changing data storage requirements. In such environments, logical storage unit identifiers (LUN IDs) may be modified as a result of deleting an existing mapping between physical storage and a... | 12/27/2011 |
| 8082402 | System and method for using virtual memory for redirecting auxiliary memory operations A method for using virtual memory for redirecting auxiliary memory operations redirects the auxiliary memory write operations of a process to a buffer after capturing the state of the auxiliary memory at various times during the method in three buffers. After the wr... | 12/20/2011 |
| 8082403 | Method for certifying erasure of one or more data storage disk drives A method for certifying data storage disk drive erasure including a server with a software program for erasing the disks, a step of inserting the disk drive to be erased, erasing it, and creating a printable file usable for certifying the erasure. ... | 12/20/2011 |
| 8082404 | Memory arbitration system and method having an arbitration packet protocol A memory hub and method for transmitting a read response on a data path of a memory hub interposed between a transmitting memory hub and a receiving memory hub. An arbitration packet including data indicative of a data path configuration for an associated read respo... | 12/20/2011 |
| 8078810 | Storage system and operation method of storage system The present invention is able to improve the processing performance of a storage system by respectively virtualizing the external volumes and enabling the shared use of such external volumes by a plurality of available virtualization storage devices. By virtualizing... | 12/13/2011 |
| 8078808 | Method and device for managing a memory for buffer-storing data blocks in ARQ transmission systems A data block to be transmitted to a receiver is subjected to channel coding and puncturing in a transmitter. For the purpose of managing data block versions obtained from repeat transmissions of this data block in the receiver, a memory area is provided for storing ... | 12/13/2011 |
| 8078809 | System for accessing an offline storage unit through an online storage unit By the same method as that of making data access to a data storage area in an online state, it is performed to access a data storage area other than the data storage area. A plurality of logical volumes carried by a disk array apparatus includes an online volume tha... | 12/13/2011 |
| 8074032 | Storage controller, storage control system, and storage control method There is provided a storage control system in which various controls to a plurality of storage controllers connected to each other can be effectively performed. The storage control system controls first and second storage controllers, in which a second storage contr... | 12/06/2011 |
| 8074033 | Cooperating memory controllers that share data bus terminals for accessing wide external devices A memory controller mechanism is operable in a first mode and a second mode. In the first mode, a first memory controller portion of the mechanism can use a first set of data terminals to perform a first external bus access operation (EBAO) and a second memory contr... | 12/06/2011 |
| 8069316 | Computer system, control method thereof and data processing apparatus A computer system and a method of controlling a computer system, the computer system including: a first memory corresponding to a first channel and a second memory corresponding to a second channel; a data processor to process the data of the first and second channe... | 11/29/2011 |
| 8069191 | Method, an apparatus and a system for managing a snapshot storage pool Some embodiments of the invention relate to an apparatus and a method of managing a snapshot storage pool (SSP) associated with a storage unit of a distributed data storage system. According to some embodiments of the invention, the apparatus may include a logic mod... | 11/29/2011 |
| 8065494 | Reproduction device and reproducing method A reproduction device for improving reading performance. A storage processing unit includes a detection circuit for detecting a sync code from read data, which includes alternately arranged sync codes and data segments. An analysis circuit analyzes a read status of ... | 11/22/2011 |
| 8065492 | System and method for early detection of failure of a solid-state data storage system Various embodiments are disclosed of a failure detection system for a solid-state data storage system that can experience difficulties, such as system failure or loss of data integrity, when it runs out of spare storage locations. Spare storage locations can be used... | 11/22/2011 |
| 8065493 | Memory controller and method for coupling a network and a memory A memory controller (SMC) is provided the for coupling a memory (MEM) to a network (N). The network (N) comprises at least one network interface (PCIEI) having network interface buffers (TPB, FCB) for implementing a flow control across the network (N). The memory co... | 11/22/2011 |
| 8060481 | Time indexed file system A method and mechanism for managing a time-indexed block map in a file system configured to store multiple versions of file data. A file system includes inodes or other structures corresponding to files in the system. Responsive to creating a file, one or more block... | 11/15/2011 |
| 8060706 | Method of allocating physical memory in specified address range under Linux system platform A method of allocating a physical memory in a specified address range under a Linux system platform is applied in a testing process of a physical memory under a Linux operating system. In this method, according to a specified address range and a size of a memory to ... | 11/15/2011 |
| 8060704 | Application pre-launch to reduce user interface latency A device stores a plurality of applications and a list of associations for those applications. The applications are preferably stored within a secondary memory of the device, and once launched each application is loaded into RAM. Each application is preferably assoc... | 11/15/2011 |
| 8060708 | Multiprocessor system having an input/output (I/O) bridge circuit for transferring data between volatile and non-volatile memory A disclosed circuit includes circuitry for coupling to a volatile memory, circuitry for coupling to a nonvolatile NAND flash memory, and circuitry that: (i) receives a volatile memory request from a processor and satisfies the volatile memory request by accessing th... | 11/15/2011 |
| 8060707 | Minimization of read response time A method, system and computer program product for minimizing read response time in a storage subsystem including a plurality of resources is provided. A middle logical block address (LBA) is calculated for a read request. A preferred resource of the plurality of res... | 11/15/2011 |
| 8060705 | Method and apparatus for using a variable page length in a memory A controller, a memory device including a memory array, and a method for accessing the memory device. The method includes, during a first access, activating a first page of the memory array corresponding to a first row address and accessing data from the first page ... | 11/15/2011 |
