"That’s an amazing invention, but who would ever want to use one of them?"
President Rutherford B. Hayes ; Said in 1876, after Alexander Graham Bell demonstrated the telephone to him at the White House
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| Number | Title | Issue Date |
| 8117402 | Decreasing shared memory data corruption The shared memory includes a header section and a data section, wherein said header section includes at least two headers in which control information is stored. The method comprises the steps of: judging whether or not there is data corruption in one of said at lea... | 02/14/2012 |
| 8095741 | Transactional memory computing system with support for chained transactions A computing system processes memory transactions for parallel processing of multiple threads of execution provides execution of multiple atomic instruction groups (AIGs) on multiple systems to support a single large transaction that requires operations on multiple t... | 01/10/2012 |
| 8095740 | Method and apparatus for accessing data of a message memory of a communication module A method and an apparatus for accessing data of a message memory of a communication module by inputting or outputting data into or from the message memory, the message memory being connected to a buffer memory assemblage and the data being transferred to the message... | 01/10/2012 |
| 8095743 | Memory access control in a multiprocessor system Access to a memory area by a first processor that executes a first processor program and a second processor that executes a second processor program is granted to one of the first processor and the second processor at a time. Access to the memory area by the first p... | 01/10/2012 |
| 8095742 | Microcomputer with address translation circuit A microcomputer includes a first CPU, a first bus, a first memory, a second CPU, a second bus, and a second memory. The first memory and the second memory are arranged in address spaces individually managed by the first CPU and the second CPU corresponding to the me... | 01/10/2012 |
| 8082400 | Partitioning a memory pool among plural computing nodes To share a memory pool that includes at least one physical memory in at least one of plural computing nodes of a system, firmware in management infrastructure of the system is used to partition the memory pool into memory spaces allocated to corresponding ones of at... | 12/20/2011 |
| 8078575 | Disaster recovery File system disaster recovery techniques provide automated monitoring, failure detection and multi-step failover from a primary designated target to one of a designated group of secondary designated targets. Secondary designated targets may be prioritized so that fa... | 12/13/2011 |
| 8074030 | Using transactional memory with early release to implement non-blocking dynamic-sized data structure By exploiting an early release facility that may be provided by certain transactional memory designs, we facilitate transaction software constructs that operate on dynamically-sized data structures and/or other data structures for which traversal may be data depende... | 12/06/2011 |
| 8069314 | Shared memory architecture in GPS signal processing A shared memory architecture for a GPS receiver, wherein a processing memory is shared among the different processing functions, such as the correlator signal processing, tracking processing, and other applications processing. The shared memory architecture within t... | 11/29/2011 |
| 8060703 | Techniques for allocating/reducing storage required for one or more virtual machines Techniques for allocating/reducing storage required for one or more virtual machines are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for allocating storage for one or more virtual machines. The method may comprise pr... | 11/15/2011 |
| 8055852 | Memory device and method having on-board processing logic for facilitating interface with multiple processors, and computer system using same A memory device includes an on-board processing system that facilitates the ability of the memory device to interface with a plurality of processors operating in a parallel processing manner. The processing system includes circuitry that performs processing function... | 11/08/2011 |
| 8055853 | Data storage system and data storage program for atomic transactions Atomic data are stored in blocks on a hard disk. The blocks are grouped into a committed block aggregate P1, which exists only on the hard disk, a next-generation committed block aggregate C1, which is converted into a committed block aggregate at pred... | 11/08/2011 |
| 8046540 | Shared closures on demand A method and apparatus for copying data from a virtual machine to a shared closure on demand. This process improves system efficiency by avoiding the copying of data in the large number of cases where the same virtual machine is the next to request access and use of... | 10/25/2011 |
| 8032718 | Systems and methods for sharing media in a computer network A computerized method for sharing removable storage media in a network, the method comprising associating, in an index entry, a first piece of removable storage media in a first storage device with at least a first storage policy copy and a second storage policy cop... | 10/04/2011 |
| 8024528 | Global address space management Methods, systems and computer program products for global address space management are described herein. A System on Chip (SOC) unit configured for a global address space is provided. The SOC includes an on-chip memory, a first controller and a second controller. Th... | 09/20/2011 |
| 8015368 | Processor extensions for accelerating spectral band replication Enhancements to hardware architectures (e.g., a RISC processor or a DSP processor) to accelerate spectral band replication (SBR) processing are described. In some embodiments, instruction extensions configure a reconfigurable processor to accelerat SBR and other aud... | 09/06/2011 |
| 8015367 | Memory management methods in a computer system with shared memory mappings A host computer system is configured to present each of multiple resident contexts with an address space that may be mapped, at least in part, to corresponding portions of a host memory. The address space of a selected context is sampled, and, for each of a pluralit... | 09/06/2011 |
| 8010751 | Data forwarding engine A distributed multi-processor out-of-order system includes multiple processors, an arbiter, a data dispatcher, a memory controller, a storage unit, multiple memory access requests issued by the multiple processors, and multiple data units that provide the results of... | 08/30/2011 |
| 8001333 | Memory management in a shared memory system Methods, systems and computer program products to maintain cache coherency, in a System On Chip (SOC) which is part of a distributed shared memory system are described. A local SOC unit that includes a local controller and an on-chip memory is provided. In response ... | 08/16/2011 |
| 7996628 | Cross adapter shared address translation tables A method, computer program product and computer system for allocating shared address translation tables for memory regions of multiple I/O adaptors, which includes allocating an address translation table to be shared between the memory regions, creating a hardware c... | 08/09/2011 |
| 7996627 | Replication of object graphs The updating of only some memory locations in a multiple computer environment in which at least one applications program (50) executes simultaneously on a plurality of computers M1, M2 . . . Mn each of which has a local memory, is disclosed. Obj... | 08/09/2011 |
| 7996630 | Method of managing memory in multiprocessor system on chip Provided is a method of managing memory in a multiprocessor system on chip (MPSoC). According to an aspect of the present invention, locality of memory can be reflected and restricted memory resources can be efficiently used by determining a storage location of a va... | 08/09/2011 |
| 7996629 | Multiprocessor computing system with multi-mode memory consistency protection Disclosed are a method and apparatus for protecting memory consistency in a multiprocessor computing system, relating to program code conversion such as dynamic binary translation. The exemplary multiprocessor computing system provides memory and multiple processors... | 08/09/2011 |
| 7990315 | Shared memory device applied to functional stages configured in a receiver system for processing signals from different transmitter systems and method thereof A shared memory device for a receiver system is disclosed. The receiver system is configured to have a first functional stage and a second functional stage for processing information carried by signals from a first transmitter system and a second transmitter system ... | 08/02/2011 |
| 7984246 | Multicore memory management system A multiprocessing system includes, in part, a multitude of processing units each in direct communication with a bus, a multitude of memory units in direct communication with the bus, and at least one shared memory not in direct communication with the bus but directl... | 07/19/2011 |
| 7979645 | Multiprocessor system for memory mapping of processing nodes A memory mapping unit requests allocation of a remote memory to memory mapping units of other processor nodes via a second communication unit, and requests creation of a mapping connection to a memory-mapping managing unit of a first processor node via the second co... | 07/12/2011 |
| 7975109 | System including a fine-grained memory and a less-fine-grained memory A data processing system includes one or more nodes, each node including a memory sub-system. The sub-system includes a fine-grained, memory, and a less-fine-grained (e.g., page-based) memory. The fine-grained memory optionally serves as a cache and/or as a write bu... | 07/05/2011 |
| 7971004 | System and article of manufacture for dumping data in processing systems to a shared storage Provided are a system and article of manufacture for dumping data in processing systems to a shared storage. A plurality of processing systems receive a signal indicating an event. Each of the processing systems write data used by the processing system to a shared s... | 06/28/2011 |
| 7962697 | Contention detection A multiple computer system is disclosed in which n computers (M1, M2 . . . Mn) each run a different portion of a single application program written to execute only on a single computer. The local memory of each computer is maintained substantially the ... | 06/14/2011 |
| 7949835 | Data processing apparatus and method for controlling access to memory A data processing apparatus and method are provided for controlling access to memory. The data processing apparatus comprises main processing logic operable to execute a sequence of instructions in order to perform a process, and subsidiary processing logic operable... | 05/24/2011 |
| 7941612 | Multipath accessible semiconductor memory device with host interface between processors A multipath accessible semiconductor memory device provides an interface function between processors. The memory device may include a memory cell array having a shared memory area operationally coupled to two or more ports that are independently accessible by two or... | 05/10/2011 |
| 7934062 | Read/write lock with reduced reader lock sampling overhead in absence of writer lock acquisition An improved reader-writer locking for synchronizing access to shared data. When writing the shared data, a writer flag is set and a lock is acquired on the shared data. The shared data may be accessed following the expiration of a grace period and a determination th... | 04/26/2011 |
| 7930487 | System and method for providing access control to raw shared devices An access control agent is advantageously deployed at a host device to prevent malicious use of a storage system by unauthorized hosts and users. In one embodiment the access control agent is disposed in a processing path between the application and the storage devi... | 04/19/2011 |
| 7930488 | Non-volatile memory sharing system for multiple processors and related method thereof A non-volatile memory sharing system is provided. The non-volatile memory sharing system includes a plurality of processors comprising at least a first processor and a second processor, a non-volatile memory, and a processor bridge coupled between the first processo... | 04/19/2011 |
| 7925842 | Allocating a global shared memory A method of operating a data processing system includes each of multiple tasks within a parallel job executing on multiple nodes of the data processing system issuing a system call to request allocation of backing storage in physical memory for global shared memory ... | 04/12/2011 |
| 7925841 | Managing shared memory usage within a memory resource group infrastructure A method for allocating memory associated with a local shared memory segment to facilitate execution of a first process. The method includes automatically allocating memory associated with a first MRG to the local shared memory segment if the local shared memory seg... | 04/12/2011 |
| 7921261 | Reserving a global address space A method of operating a data processing system includes each of multiple tasks within a parallel job executing on multiple nodes of the data processing system issuing a respective system call to request reservation, without allocation of backing storage in physical ... | 04/05/2011 |
| 7917704 | Storage management method and storage management system There is provided a storage management system capable of utilizing division management with enhanced flexibility and of enhancing security of the entire system, by providing functions by program products in each division unit of a storage subsystem. The storage mana... | 03/29/2011 |
| 7904666 | Access control device, access control integrated circuit, and access control method In a device, in which a master that requires access at a predetermined rate and a processor that requires responsiveness to an access request access a shared memory, responsiveness to the access request of the processor is improved while the access of the master at ... | 03/08/2011 |
| 7895401 | Software transactional memory for dynamically sizable shared data structures We propose a new form of software transactional memory (STM) designed to support dynamic-sized data structures, and we describe a novel non-blocking implementation. The non-blocking property we consider is obstruction-freedom. Obstruction-freedom is weaker than lock... | 02/22/2011 |