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| Number | Title | Issue Date |
| 8112584 | Storage controller performing a set of multiple operations on cached data with a no-miss guarantee until all of the operations are complete Disclosed are, inter alia, methods, apparatus, data structures, computer-readable media, mechanisms, and means for a storage controller (e.g., memory controller, disk controller, etc.) performing a set of multiple operations on cached data with a no-miss guarantee u... | 02/07/2012 |
| 8112585 | Method and apparatus for dynamically switching cache policies A method implements a cache-policy switching module in a storage system. The storage system includes a cache memory to cache storage data. The cache memory uses a first cache configuration. The cache-policy switching module emulates the caching of the storage data w... | 02/07/2012 |
| 8108610 | Cache-based control of atomic operations in conjunction with an external ALU block One embodiment of the invention sets forth a mechanism for efficiently processing atomic operations transmitted from multiple general processing clusters to an L2 cache. A tag look-up unit tracks the availability of each cache line in the L2 cache, reserves the nece... | 01/31/2012 |
| 8108608 | Systems and methods of maintaining freshness of a cached object based on demand and expiration time A device that implements a method for performing integrated caching in a data communication network. The device is configured to receive a packet from a client over the data communication network, wherein the packet includes a request for an object. At the operating... | 01/31/2012 |
| 8108609 | Structure for implementing dynamic refresh protocols for DRAM based cache A hardware description language (HDL) design structure embodied on a machine-readable data storage medium includes elements that when processed in a computer aided design system generates a machine executable representation of a device for implementing dynamic refre... | 01/31/2012 |
| 8103830 | Disabling cache portions during low voltage operations Methods and apparatus relating to disabling one or more cache portions during low voltage operations are described. In some embodiments, one or more extra bits may be used for a portion of a cache that indicate whether the portion of the cache is capable at operatin... | 01/24/2012 |
| 8099555 | Systems and methods for memory management on print devices Systems and methods disclosed permit flexible optimization of printer cache memories by specify criteria for determining cache membership for objects derived from a print data streams, wherein the objects may be associated with distinct reference counts. In some emb... | 01/17/2012 |
| 8099554 | System and method for flash-based data caching A system, method and computer program product for receiving on a non-volatile, solid-state, cache memory system, a data segment, including a plurality of data elements, from one or more of a volatile, solid-state, cache memory system and a non-volatile, electromecha... | 01/17/2012 |
| 8095731 | Mutable object caching In one embodiment, a method for caching mutable objects comprises adding to a cache a first cache entry that includes a first object and a first key. Assigning a unique identification to the first object. Adding an entry to an instance map for the first object. The ... | 01/10/2012 |
| 8095732 | Apparatus, processor, cache memory and method of processing vector data An apparatus includes a vector unit to process a vector data, a cache memory which includes a plurality of cache lines to store a plurality of divisional data being sent from a main memory, each of the divisional data of vector data having been divided according to ... | 01/10/2012 |
| 8090910 | System and method for facilitating operation of an input/output link Included are embodiments for facilitating operation of an input/output (I/O) link. At least one embodiment of a method includes receiving a first cache line from a memory controller and determining whether the first cache line corresponds to a first portion of data.... | 01/03/2012 |
| 8086800 | Integrated circuit and method for buffering to optimize burst length in networks on chips An integrated circuit includes a plurality of processing modules coupled by a network. A first processing module communicates with a second processing module based on transactions. A first wrapper means associated to the second processing module buffers data from th... | 12/27/2011 |
| 8086802 | Instruction cache system, instruction-cache-system control method, and information processing apparatus An instruction cache system includes an instruction-cache data storage unit that stores cache data per index, and an instruction cache controller that compresses and writes the cache data in the instruction-cache data storage unit, and controls a compression ratio o... | 12/27/2011 |
| 8086801 | Loading data to vector renamed register from across multiple cache lines A load instruction that accesses data cache may be off natural alignment, which causes a cache line crossing to complete the access. The illustrative embodiments provide a mechanism for loading data across multiple cache lines without the need for an accumulation re... | 12/27/2011 |
| 8078800 | Dynamic operating point modification in an integrated circuit In one embodiment, an integrated circuit includes a processor, an internal memory, and a memory controller coupled to an external memory. The integrated circuit may support two or more modes of operation, with different operating points. To switch from one operating... | 12/13/2011 |
| 8078801 | Obscuring memory access patterns For each memory location in a set of memory locations associated with a thread, setting an indication associated with the memory location to request a signal if data from the memory location is evicted from a cache; and in response to the signal, reloading the set o... | 12/13/2011 |
| 8078802 | Method and system for file-system based caching A method and system for file-system based caching can be used to improve efficiency and security at network sites. In one set of embodiments, the delivery of content and storing content component(s) formed during generation of the content may be performed by differe... | 12/13/2011 |
| 8074026 | Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory access overhead by supporting address calculation, data shuffling, and fo... | 12/06/2011 |
| 8069309 | Servicing memory in response to system failure Memory is serviced. In response to an input indicating a serious condition, a service is invoked that is unaffected by the serious condition. By the service, it is determined whether other instructions are available to be executed that are not being affected by the ... | 11/29/2011 |
| 8065275 | Systems and methods for cache optimization A server computer identifies a cached document and its associated cache update history in response to a request or in anticipation of a request from a client computer. The server computer analyzes the document's cache update history to determine if the cached docume... | 11/22/2011 |
| 8065485 | Method and apparatus for determining cache storage locations based on latency requirements A method for determining whether to store binary information in a fast way or a slow way of a cache is disclosed. The method includes receiving a block of binary information to be stored in a cache memory having a plurality of ways. The plurality of ways includes a ... | 11/22/2011 |
| 8065484 | Enhanced access to data available in a cache Enhanced access data available in a cache. In one embodiment, a cache maintaining copies of source data is formed as a volatile memory. On receiving a request directed to the cache for a copy of a data element, the requested copy maintained in the cache is sent as a... | 11/22/2011 |
| 8060697 | Dynamically allocated secondary browser cache A method, system, and medium are provided for managing cache allocation between a primary storage and a secondary storage. The system includes a device with a primary storage, secondary storage, and cache manager. The method includes downloading a web resource, stor... | 11/15/2011 |
| 8055846 | Data vaulting in emergency shutdown A method for data storage includes accepting write commands belonging to a storage operation invoked by a host computer, and caching the write commands in a volatile memory that is powered by external electrical power. A current execution status of the storage opera... | 11/08/2011 |
| 8055845 | Method of cooperative caching for distributed storage system An embodiment of a method of cooperative caching for a distributed storage system begins with a step of requesting data from storage devices which hold the data. The method continues with a step of receiving any cached blocks and expected response times for providin... | 11/08/2011 |
| 8051046 | Methods to perform disk writes in a distributed shared disk system needing consistency across failures Techniques are provided for managing caches in a system with multiple caches that may contain different copies of the same data item. Specifically, techniques are provided for coordinating the write-to-disk operations performed on such data items to ensure that olde... | 11/01/2011 |
| 8051246 | Method and apparatus for utilizing a semiconductor memory of a node as a disk cache A method and apparatus for utilizing a semiconductor memory of a node as disk cache is described. In one embodiment, a method of utilizing a semiconductor memory of a second server for a first server, comprising generating a storage access request at a first server,... | 11/01/2011 |
| 8051247 | Trace based deallocation of entries in a versioning cache circuit A circuit for tracking memory operations with trace-based execution is disclosed. Each trace includes a sequence of operations that includes zero or more of the memory operations. The memory operations being executed form a set of active memory operations that have ... | 11/01/2011 |
| 8041893 | System and method for managing large filesystem-based caches Embodiments disclosed herein utilize statistical approximations to manage large filesystem-based caches based on imperfect information. When removing entries from a large cache, which may have a million or more entries, the cache manager does not need to find the ab... | 10/18/2011 |
| 8037249 | Asynchronous memory access queuing A method for queuing asynchronous memory accesses includes pinning memory buffers in a managed memory environment, issuing data transfer requests to a peripheral device, each request corresponding to at least one of the pinned memory buffers, and asynchronously acce... | 10/11/2011 |
| 8032706 | Method and apparatus for detecting a data access violation Machine-readable media, methods, apparatus and system for detecting a data access violation are described. In some embodiments, current memory access information related to a current memory access to a memory address by a current user thread may be obtained. It may ... | 10/04/2011 |
| 8032708 | Method and system for caching data in a storgae system A method for caching data in a storage system involves receiving a request for a first datum stored on a storage disk, retrieving the first datum from the storage disk when a copy of the first datum is not stored on an asymmetric cache device (ACD), storing a first ... | 10/04/2011 |
| 8032707 | Managing cache data and metadata Embodiments of the invention provide techniques for managing cache metadata providing a mapping between addresses on a storage medium (e.g., disk storage) and corresponding addresses on a cache device at data items are stored. In some embodiments, cache metadata may... | 10/04/2011 |
| 8024523 | Opportunistic block transmission with time constraints A technique for determining a data window size allows a set of predicted blocks to be transmitted along with requested blocks. A stream enabled application executing in a virtual execution environment may use the blocks when needed. ... | 09/20/2011 |
| 8024522 | Memory ordering queue/versioning cache circuit A processor includes a circuit for tracking memory operations with trace-based execution. Each trace includes a sequence of operations that includes zero or more of the memory operations. The memory operations being executed form a set of active memory operations th... | 09/20/2011 |
| 8024521 | Atomic operation on non-standard sized data using external cache Atomic operation may be implemented in a processor system comprising a main memory and a power processor element (PPE) including a power processor unit (PPU) coupled to an external cache. The PPE may atomically load data from a lock-line in the main memory into a fi... | 09/20/2011 |
| 8024524 | Method, system, and program for an adaptor to read and write to system memory Provided are a method, system, and program for an adaptor to read and write to system memory. A plurality of blocks of data to write to storage are received at an adaptor. The blocks of data are added to a buffer in the adaptor. A determination is made of pages in a... | 09/20/2011 |
| 8019945 | System and method for transactional cache A computer-implemented method and system to support transactional caching service comprises configuring a transactional cache that are associated with one or more transactions and one or more work spaces; maintaining an internal mapping between the one or more trans... | 09/13/2011 |
| 8019944 | Checking for a memory ordering violation after a speculative cache write An embodiment of the present invention includes a circuit for tracking memory operations with trace-based execution. Each trace includes a sequence of operations that includes zero or more of the memory operations. The memory operations being executed form a set of ... | 09/13/2011 |
| 8015357 | Storage array tile supporting systolic movement operations A tile for use in a tiled storage array provides re-organization of values within the tile array without requiring sophisticated global control. The tiles operate to move a requested value to a front-most storage element of the tile array according to a global systo... | 09/06/2011 |
