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| Number | Title | Issue Date |
| 8095720 | Voltage indicator signal generation system and method The present invention provides for a system comprising a peripheral component interface (PCI) host bridge. The PCI host bridge is configured to be coupled to a PCI bus, and to receive a system reset signal, to generate a PCI bus reset signal based on the received sy... | 01/10/2012 |
| 8095718 | Bridge, information processor, and access control method A downstream port 22 of a bridge 20 connecting a processor unit and a peripheral device acknowledges access from the peripheral device via one of a plurality of downstream channels available for access by the peripheral device to a memory of the proces... | 01/10/2012 |
| 8095719 | Data communication systems and bridges The present invention may be related to a bridge for communications between a first computing device and a second computing device in a data communication system. The bridge may include a first interface, a second interface and a control module. The first interface ... | 01/10/2012 |
| 8095717 | System and method for configuration register synchronization A system includes a data holding module that at least one of stores and receives data based on a first clock signal of a first clock domain. A data output module receives the data from the data holding module and selectively outputs the data based on a load signal a... | 01/10/2012 |
| 8074009 | Sharing of host bus adapter context A system comprises a first host bus adapter (HBA) that uses a first context to facilitate the transmission of packets through a logical connection through the first HBA. The system also comprises a second HBA and memory in which the first context is stored. The memo... | 12/06/2011 |
| 8069295 | Processing system with RF data bus and method for use therewith A processing system includes a plurality of first circuit modules. A plurality of second circuit modules are coupled to an RF data bus via a 60 GHz communications. The RF data bus receives first data from at least one of the plurality of first circuit modules, and t... | 11/29/2011 |
| 8060681 | Interface protocol and API for a wireless transceiver A wireless protocol may be implemented in a smart transceiver device that contains the physical (PHY) and media access control (MAC) layers of the wireless protocol stack. In various embodiments, a serial peripheral interface (SPI) based design may be used. Disclose... | 11/15/2011 |
| 8060680 | Method of allocating memory A method of allocating memory in a memory unit includes creating a data structure containing a list of all available memory segments; and assigning a bias to each available memory segment. The bias indicates how to allocate that available memory segment in response ... | 11/15/2011 |
| 8054619 | Partial-slot card guide installation tool A partial-slot card guide installation tool comprises two opposing runners configured to register with grooves of a full-sized slot of a rack system, and two guides fixed relative to the two opposing runners. The two guides configured to receive a partial-slot card ... | 11/08/2011 |
| 8037228 | Bridge device with page-access based processor interface An integrated circuit bridge device can include a first interface circuit coupled to a buffer circuit and a configurable in response to configuration information to receive command information, address information, and data values on a same multi-bit input/output (I... | 10/11/2011 |
| 8010729 | Image processing controller and image processing device A first interface receives image information and an output destination address from a first external device. A second interface transmits image information to a second external device at a lower communication speed than the first interface. A communication path conn... | 08/30/2011 |
| 8010730 | Bus converter, semiconductor device, and noise reduction method of bus converter and semiconductor device A bus converter is disclosed that converts a signal of a synchronous bus into a signal of an asynchronous bus. The bus converter includes a control signal generation unit that generates n control signals synchronized at different timings of a predetermined synchroni... | 08/30/2011 |
| 8006022 | Data transmission device The invention relates to a data transmission device for transmitting data between a first bus system and a second bus system with a copy table (103) for providing an output sequence of data of the first bus system and a transmission device (101) for tr... | 08/23/2011 |
| 8006021 | Processor local bus bridge for an embedded processor block core in an integrated circuit A processor local bus bridge for a processor block ASIC core for embedding in an IC is described. A core logic-to-core logic bridge includes a slave processor local bus interface, a crossbar switch coupled to the slave processor local bus interface and a master proc... | 08/23/2011 |
| 7966439 | Apparatus, system, and method for a fast data return memory controller A system controller includes a memory controller and a host interface residing in different clock domains. There is a time delay between the time when the memory controller issues a read command to a memory and the data becoming present and available at the host int... | 06/21/2011 |
| 7941583 | Controlled frequency core processor and method for starting-up said core processor in a programmed manner Embodiments of the invention relate to a driven-frequency processor core. It comprises at least one processor, a non-volatile memory comprising a startup program, a bridge interconnecting buses linking the various components of said processor core, an interface comp... | 05/10/2011 |
| 7934042 | Voltage indicator signal generation system and method The present invention provides for a system comprising a peripheral component interface (PCI) host bridge. The PCI host bridge is configured to be coupled to a PCI bus, and to receive a system reset signal, to generate a PCI bus reset signal based on the received sy... | 04/26/2011 |
| 7908420 | Processing system with millimeter wave host interface and method for use therewith A processing system includes a plurality of first circuit modules and a wired data bus, connected to the plurality of first circuit modules. A plurality of second circuit modules are coupled to an RF data bus via a millimeter wave communication path. A millimeter wa... | 03/15/2011 |
| 7865652 | Power control by a multi-port bridge device An embodiment of the present invention includes a communication system configured to conform to SATA and/or SAS standards and causing communication between one or more hosts and a SATA device. A multi-port bridge device is in communication with the one or more hosts... | 01/04/2011 |
| 7840741 | System for transmitting data between two bus systems An interface for transmitting messages between two bus systems including a receiver device for receiving a message from the first bus system, a classification device for classifying the message received from the first receiver device according to one of several pred... | 11/23/2010 |
| 7827343 | Method and apparatus for providing accelerator support in a bus protocol The present invention provides a method and apparatus for processing a bus protocol packet in order to provide accelerator support. A component receives a bus protocol packet having a requester identifier. The component looks up an agent routing field. The component... | 11/02/2010 |
| 7805558 | Method and system of controlling transfer speed of bus transactions A method and system of controlling data transfer speed of bus transactions. At least some of the illustrative embodiments are methods comprising analyzing of a characteristic a first bus transaction that has yet to be applied to a bus, setting a first data transfer ... | 09/28/2010 |
| 7802045 | Bus system for use with information processing apparatus A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection control system. The control system includes a bus-memory connection control... | 09/21/2010 |
| 7793029 | Translation device apparatus for configuring printed circuit board connectors An apparatus and method for selectively configuring a first PCI Express connector and a second PCI Express connector. The apparatus includes a PCB (printed circuit board) having a PCI Express first connector and a PCI Express second connector mounted thereon. A tran... | 09/07/2010 |
| 7761643 | Network media access controller embedded in an integrated circuit host interface A media access controller system embedded in an integrated circuit is described. A platform dependent bridge for communicating with a first processor, where the platform dependent bridge is associated with a platform of the first processor and where the first proces... | 07/20/2010 |
| 7761642 | Serial advanced technology attachment (SATA) and serial attached small computer system interface (SCSI) (SAS) bridging An embodiment of the present invention is disclosed to include a communication system configured to conform to SATA standard and causing communication between one or more hosts and a SATA device. The communication system, in accordance with one embodiment of the inv... | 07/20/2010 |
| 7757031 | Data transmission coordinating method and system A data transmission coordinating method is used between a central processing unit and a bridge chip of a computer system. By entering the computer system into a coordinating state, the data transmission coordinating method is executed. The bridge chip and the CPU ar... | 07/13/2010 |
| 7721038 | System on chip (SOC) system for a multimedia system enabling high-speed transfer of multimedia data and fast control of peripheral devices Provided is a System on Chip (SoC) system for a multimedia system enabling high-speed transfer of a large amount of multimedia data and a processor to rapidly control a peripheral device. The SoC system includes a processor; a plurality of peripheral devices; a plur... | 05/18/2010 |
| 7698491 | Modular patch panel with pluggable personalities A modular patch panel for interconnecting a data storage system controller to data storage enclosures is provided. The modular patch panel includes a chassis and modular interface circuitry. The chassis has a front end and a back end, the front end and the back end ... | 04/13/2010 |
| 7685350 | Remote node index mapping mechanism for serial attached storage devices According to one embodiment, a host bus adapter (HBA) is disclosed. The HBA includes a first lookup table to retrieve a remote node index (RNI) based upon an address received from a remote device as a component of an open address frame, a second lookup table to retr... | 03/23/2010 |
| 7660932 | Composing on-chip interconnects with configurable interfaces Embodiments of apparatuses, systems, and methods are described for a machine-readable medium having instructions stored thereon, which, when executed by a machine, to cause the machine to generate a representation of an apparatus. The apparatus includes a bridge age... | 02/09/2010 |
| 7653772 | Control system, electronic device and image forming apparatus A control system comprising an electronic device equipped with a port, a hub being connectable to multiple external devices and to be connected to the port of the electronic device, and one or more external devices to be connected to the hub, the operation of the ex... | 01/26/2010 |
| 7647445 | Processor bus arrangement A processor bus has several data processing units, each connected to a line system which acts as a bus having bus segments connected in a separable manner through connection units. Functional units arranged on the bus carry out the information thereof. The functiona... | 01/12/2010 |
| 7644219 | System and method for managing the sharing of PCI devices across multiple host operating systems A system and method is disclosed for initializing PCI devices in a computer system or information handling system. Upon initialization of the system, each operating system instance of the system attempts to access a PCI bridge device. The first operating system to a... | 01/05/2010 |
| 7634609 | Data transmission coordinating method In a data transmission coordinating method, the computer system enters a coordinating state, and a first signal is issued from the central processing unit to the data transmission standard storage unit of the bridge chip. In response to the first signal, a second si... | 12/15/2009 |
| 7634608 | Bridging network components A system includes a first and a second network component, and a bridge. The bridge, which resides a Media Access Control (MAC) layer of a host, includes a bridge component, a first virtual network interface card (VNIC) and a second VNIC, wherein the first VNIC is as... | 12/15/2009 |
| 7600067 | Methods for identifying bridge devices and systems thereof Methods for identifying bridge devices and systems thereof. A bridge device receives a standard command. In response to the standard command, output information comprising at least one no-available parameter is generated. The bridge device sets the no-available para... | 10/06/2009 |
| 7600066 | Methods for identifying bridge devices and systems thereof Methods for identifying bridge devices and systems thereof. A bridge device receives an undefined command. In response to the undefined command, output information comprising at least one no-available parameter is generated. The bridge device sets the no-available p... | 10/06/2009 |
| 7594056 | Bridge and data processing method therefor There is provided a bridge which connects between a primary bus and secondary bus. The bridge reads out a descriptor from a primary memory of the primary bus, reads out a status from a secondary memory of the secondary bus, writes, into the primary memory of the pri... | 09/22/2009 |
| 7577781 | Bus system for use with information processing apparatus A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection control system. The control system includes a bus-memory connection control... | 08/18/2009 |
