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Actor Marlon Brando has four patents, all named "Drumhead tensioning device and method."
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| Number | Title | Issue Date |
| 8180941 | Mechanisms for priority control in resource allocation Mechanisms for priority control in resource allocation is provided. With these mechanisms, when a unit makes a request to a token manager, the unit identifies the priority of its request as well as the resource which it desires to access and the unit's resource acce... | 05/15/2012 |
| 8086776 | Device for arbitrating bus accesses and method for controlling same In an information-processing apparatus including a plurality of modules and a first arbiter which arbitrates bus-access requests of the plurality of modules, at least one of the plurality of modules includes a plurality of submodules and a second arbiter which arbit... | 12/27/2011 |
| 7783808 | Embedded self-checking asynchronous pipelined enforcement (escape) A network comprises a plurality of nodes; a plurality of bi-directional point-to-point communication links, wherein a priority-based arbitration scheme is used to communicate over each of the plurality of point-to-point links; and a hub that is communicatively coupl... | 08/24/2010 |
| 7698487 | Share resources and increase reliability in a server environment Methods and systems for a low-cost high density compute environment with increased fail-over support through resource sharing and resources chaining. In one embodiment, one of a number of servers qualified to share resources is elected as a resource server. The shar... | 04/13/2010 |
| 7673087 | Arbitration for an embedded processor block core in an integrated circuit Arbitration for a processor block core is described. Master devices are associated with a processor block core embedded in a host integrated circuit (“IC”). The master devices are coupled to core logic of the host IC via a crossbar switch and a bridge, which are... | 03/02/2010 |
| 7650454 | Arbiter module providing low metastability failure probability An arbiter module receives two or more closely occurring asynchronous requests and provides an output with a low metastability failure probability. The arbiter module includes a request resolving module that receives multiple asynchronous requests for providing a fi... | 01/19/2010 |
| 7647444 | Method and apparatus for dynamic hardware arbitration A method and apparatus for dynamically arbitrating, in hardware, requests for a resource shared among multiple clients. Multiple data streams or service requests require access to a shared resource, such as memory, communication bandwidth, etc. A hardware arbiter mo... | 01/12/2010 |
| 7603503 | Efficiency based arbiter An arbiter decides to grant access from multiple clients to a shared resource (e.g. memory) using efficiency and/or urgency terms. Urgency for a client may be determined based on an “in-band” request identifier transmitted from the client to the resource along w... | 10/13/2009 |
| 7587543 | Apparatus, method and computer program product for dynamic arbitration control A dynamic arbitration controller includes components for reading current state information as well as records of known arbitration states which may cause a deadlock condition, comparing the current state to the records of known arbitration states and resolving deadl... | 09/08/2009 |
| 7555585 | Optimized performance and power access to a shared resource in a multiclock frequency system on a chip application A request from a first processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the first processor at a first clock frequency. A request from a second processor for access to a shared resource in ... | 06/30/2009 |
| 7546405 | Methods and apparatus for dynamic grouping of requestors of resources in a multi-processor system Methods and apparatus provide for: assigning each of a plurality of requesters to a respective one of a plurality of requester groups; receiving tokens from a plurality of resources, where each token is an exchange medium for permitting one of the requesters having ... | 06/09/2009 |
| 7472213 | Resource management device Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority master, one or more of a plurality of masters whose latency in accessin... | 12/30/2008 |
| 7433984 | Time-based weighted round robin arbiter A PCI bus time-based weighted round robin arbiter has a phase table divided into a plurality of phases. Each of the phases is assigned to one of the ports on the PCI bus. An arbiter state machine is coupled to the phase table and looks at the port assignment for the... | 10/07/2008 |
| 7395360 | Programmable chip bus arbitration logic Methods and apparatus are provided for implementing a bus arbitration priority encoding scheme with fairness. Bus arbitration logic is connected to multiple primary components or devices. The multiple primary components send requests to bus arbitration logic. The bu... | 07/01/2008 |
| 7391766 | Packet unstopper system for a parallel packet switch A system for controlling egress buffer saturation includes, for each data packet flow, a comparator for comparing the number of data packets ‘WPC’ temporarily stored within an egress buffer to a predefined threshold value ‘WPCth’. The packet sequence number ... | 06/24/2008 |
| 7389373 | Asynchronous arbitration device and microcontroller comprising such an arbitration device An arbitration device is provided, which is designed to be connected between, on the one hand, a first and a second module and, on the other hand, storing means forming a memory workspace. This arbitration device includes a detector for detecting one or more request... | 06/17/2008 |
| 7386645 | System on a chip with an arbitration unit to grant right of access to a common resource in response to conflicting requests for access from initiator modules, and storage key incorporating the arbitration unit An electronic system comprises a defined number N of functional modules, including a defined number P of initiator modules and a defined number Q of target modules, where N, P and Q are integer numbers such that 2≦P≦N and 1≦Q≦N. In the event of a plurality o... | 06/10/2008 |
| 7383370 | Arbiter circuit and signal arbitration method An arbiter circuit (100) can include a latch circuit (102) that latches competing input signals (MATCH1 and MATCH2) to generate signals on latch output (110-0 and 110-1). A filter section (104) can preve... | 06/03/2008 |
| 7383395 | Storage device A storage system is disclosed for performing control to match data among cache memories corresponding to shared volumes when multiple disk controllers containing cache memories are accessing shared volumes formed in the storage device. The storage system contains a ... | 06/03/2008 |
| 7380037 | Data transmitter between external device and working memory A data transmitter includes a bus master circuit. The bus master circuit obtains the right to use a CPU bus and directly performs data transmission to and from a working memory connected to the CPU bus through a CPU interface section and the CPU bus. ... | 05/27/2008 |
| 7380247 | System for delaying priority boost in a priority offset amount only after detecting of preemption event during access to critical section A system and method is provided for delaying a priority boost of an execution thread. When a thread prepares to enter a critical section of code, such as when the thread utilizes a shared system resource, a user mode accessible data area is updated indicating that t... | 05/27/2008 |
| 7370161 | Bank arbiter system which grants access based on the count of access requests Provided are an arbiter capable of improving memory access efficiency in a multi-bank memory, a memory access arbitration system including the arbiter, and an arbitration method thereof, where the arbiter detects requests that are not included in a busy bank, and al... | 05/06/2008 |
| 7366854 | Systems and methods for scheduling memory requests utilizing multi-level arbitration In an embodiment, a memory scheduler is provided to process memory requests. The memory scheduler may comprise: a plurality of arbitrators that each select memory requests according to age of the memory requests and whether resources are available for the memory req... | 04/29/2008 |
| 7362775 | Exchange mechanisms for digital information packages with bandwidth securitization, multichannel digital watermarks, and key management Responsibility can be established for specific copies or instances of copies of digitized multimedia content using digital watermarks. Management and distribution of digital watermark keys (e.g., private, semiprivate and public) and the extension of information asso... | 04/22/2008 |
| 7359959 | Method and apparatus for using a USB cable as a cluster quorum device A method for obtaining a quorum vote by a first node using a Universal Serial Bus (USB) quorum cable, wherein the USB quorum cable comprises a first end connected to a first node and a second end connected to a second node, including determining whether the USB quor... | 04/15/2008 |
| 7360068 | Reconfigurable signal processing IC with an embedded flash memory device A dynamically reconfigurable processing unit includes a microprocessor, and an embedded Flash memory for non-volatile storage of code, data and bit-streams. The embedded Flash includes a field programmable gate array (FPGA) port. The reconfigurable processing unit f... | 04/15/2008 |
| 7352741 | Method and apparatus for speculative arbitration An arbiter is used so multiple users can use shared resources. The arbiter allocates at least one of the resources speculatively to one of the users for use during a particular access interval in the absence of a request for the resource from the user. The arbiter c... | 04/01/2008 |
| 7350004 | Resource management device Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority master, one or more of a plurality of masters whose latency in accessin... | 03/25/2008 |
| 7350003 | Method, system, and apparatus for an adaptive weighted arbiter An adaptive weighted arbitration algorithm that is user configurable is discussed. The arbitration logic and algorithm considers past arbitration history events and is dynamic to allow for losing bidders to increase their probability of being selected to access the ... | 03/25/2008 |
| 7350015 | Data transmission device A data transmission device forwards data that have been received from a first device, intended for a second device, to the second device. The data transmission device is distinguished in that it has connections for connecting at least two data buses and can output d... | 03/25/2008 |
| 7342887 | Switching device A switching device in a network system for transferring data includes one or more source line cards, one or more destination line cards and a switching fabric coupled to the source line cards and the destination line cards to enable data communication between any so... | 03/11/2008 |
| 7340625 | Process and apparatus for reducing power usage microprocessor devices operating from stored energy sources A process and apparatus for preparing said process for reducing the power consumption of microprocessor-based devices by reducing the frequency of the oscillator governing the logical operation of the microprocessor during periods of use in which system performance ... | 03/04/2008 |
| 7334225 | Method, system, and computer program product for on demand enablement of dormant computing resources A method for enabling dormant computer hardware resources in a computer system having a set of dormant computer hardware resources. The method includes accepting a customer request to enable a set of dormant hardware resources, and providing computer readable instru... | 02/19/2008 |
| 7330833 | System and method for auctioning services over an information exchange network A system and method for auctioning services. A rating system is employed to rate the buyer's transaction history, with respect to their frequency of following through with the bids for jobs that they submitted for auction. This rating system deters those buyers that... | 02/12/2008 |
| 7330832 | Mechanism for sharing of guaranteed resources A method for service allocation among a plurality of entities requiring service allocation in a communications or computing environment comprising the steps of initializing a supply of services of one or more holding entities, endowing one or more bidding entities w... | 02/12/2008 |
| 7330915 | Method for automatically configuring a balanced mass storage system for measuring system performance A method for measuring mass storage system performance in which a mass storage system has a plurality of disk drive storage elements controlled by a disk drive controller, the controller typically having a cache memory, and the controller receiving commands and data... | 02/12/2008 |
| 7330916 | Graphic controller to manage a memory and effective size of FIFO buffer as viewed by CPU can be as large as the memory A system for providing a command stream that includes a controller chip is disclosed. The controller chip includes an engine operative to manage a memory. The engine includes an interface. A storage element is coupled to the engine and the storage element is accessi... | 02/12/2008 |
| 7328292 | Arbitration method and device In an arbitration device, the entire transfer efficiency is improved without increasing the operating frequency and the number of pins. An overflow monitor mechanism generates an alarm once detecting a danger of occurrence of an overflow in an internal buffer group.... | 02/05/2008 |
| 7328291 | System and method for controlling the service engagement in a data bus system Data bus system and method are provided for controlling service engagements for bus users. At least one bus user provides services and other bus users use these services. A resource manager stores information about the available services and information about the se... | 02/05/2008 |
| 7325125 | Computer system for accessing initialization data and method therefor A method and computer system for accessing initialization data stored in a boot memory space. After the power supply starts up, the south bridge starts up and sends an initiating signal to the north bridge for starting up the north bridge. Once the north bridge has ... | 01/29/2008 |
