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| Number | Title | Issue Date |
| 8151013 | Storage system A host I/F unit has a management table for managing an MPPK which is in-charge of the control of input/output processing for a storage area of an LDEV, and if a host computer transmits an input/output request for the LDEV, the host I/F unit transfers the input/outpu... | 04/03/2012 |
| 7975079 | Computer chip set having on board wireless interfaces to support parallel communication A method and apparatus are provided for an embedded wireless interface that is embedded in, for example, one of an input and output controller device for controlling input and output communications with off-board devices, within a memory controller device and a proc... | 07/05/2011 |
| 7921236 | Method and apparatus for simultaneous bidirectional signaling in a bus topology A method and apparatus for providing bidirectional signaling in a bus topology is provided. The bus topology allows more than two electrical circuits or devices to be coupled together along one or more common electrical conductors. For each device on the bus, a tran... | 04/05/2011 |
| 7912996 | Storage system A host I/F unit has a management table for managing an MPPK which is in-charge of the control of input/output processing for a storage area of an LDEV, and if a host computer transmits an input/output request for the LDEV, the host I/F unit transfers the input/outpu... | 03/22/2011 |
| 7831744 | Storage system and ownership transfer method A storage system that includes: a plurality of microprocessors; a plurality of storage areas to be formed to a drive group; an assignment section that assigns, to each of the microprocessors, an ownership of accessing any of the storage areas; a management section t... | 11/09/2010 |
| 7644197 | Queue management by multiple processors Methods and apparatus, including computer program products, implementing and using techniques for processing an ordered sequence of elements in one or more queues. A first element is received from a queue at a first processor. The first element is processed during a... | 01/05/2010 |
| 7565459 | Combination I/O modules in a modular automation controller The invention describes combination I/O modules for automation. Various combinations of inputs and output with different electrical interfaces are offered providing greater flexibility in controller hardware selection. ... | 07/21/2009 |
| 7562165 | USB host system, AV data reproduction apparatus and AV data recording apparatus A USB host system includes a USB host controller including a transfer memory for USB data transfer. In the transfer memory, a plurality of transfer descriptor regions are allocated. Transfer descriptor setting means sets, for the USB host controller, a transfer desc... | 07/14/2009 |
| 7519744 | Method and apparatus for managing I/O paths on a storage network using priority A processing apparatus which stores a first information piece about attributes identifying a specific process generating data input/output requests in such a manner that the first information piece is associated with a second information piece identifying at least o... | 04/14/2009 |
| 7506079 | Data processor and data communication method A data processor capable of preventing the occurrence of overrun, while efficiently performing DMA transfer. An SIO of a data processor starts the transmission of transmission data only when transmission data is stored in a transmission buffer and a reception buffer... | 03/17/2009 |
| 7493423 | Data transfer control device and electronic instrument A data transfer control device including: a node to which is input data to be transferred through serial transfer paths; a LINK circuit which splits the input data into first to pth channels in predetermined units in sequence, and outputs the thus-split data and a s... | 02/17/2009 |
| 7487266 | Communication system and method, and distributed control system and method A communication system performs bidirectional communication through a same communication path every communication cycle period between a master station and a slave station. From the start of the communication cycle period until an interval period shorter than the co... | 02/03/2009 |
| 7444440 | Method and device for providing high data rate for a serial peripheral interface An improved high performance scheme is provided with a serial peripheral interface (SPI) to enable microcontroller-based products and other components and devices to achieve a higher serial transmit and receive data rate. ... | 10/28/2008 |
| 7437484 | Method for optimizing synchronization A method is provided for optimizing a SyncML slow sync between a proprietary client and server. When a slow sync is detected, the client and server can depart from the normal SyncML protocol and process summary data without having to compare all items on a field-by-... | 10/14/2008 |
| 7421515 | Method and system for communications network A system and method of operation are provided for using a network interface to process incoming messages sent by a client device to a network server. The network interface includes a First-In-First-Out (FIFO) buffer for assembling the incoming messages from a serial... | 09/02/2008 |
| 7409469 | Multi-chip digital system having a plurality of controllers with input and output pins wherein self-identification signal are received and transmitted The present invention provides for a system, comprising a controller and a processor. The controller comprises at least an output pin and a plurality of input pins, and is configured to receive self-identify control signals through one or more of the plurality of in... | 08/05/2008 |
| 7389366 | System and method for dual IDE channel servicing using single multiplexed interface having first and second channel transfer over a common bus An integrated receiver with dual channel transport stream decoding and delivery substantially implemented on a single CMOS integrated circuit is described. For multiple channel transfers to hard disk drive storage, a multiplexed IDE host interface is provided with s... | 06/17/2008 |
| 7383364 | Device address locking to facilitate optimum usage of the industry standard IIC bus A mechanism is provided for locking an end device for the period of time that the device is needed, thus disabling access by any other application or process. Having the device locked, rather than the bus, allows other applications to use the bus to access other dev... | 06/03/2008 |
| 7373436 | Storage control device and method for management of storage control device A storage control device, connected to a host processing device through a full-duplex channel and for storing data received through the channel in a data storage means, comprises a plurality of channel processors for conducting a data-input-and-output process to the... | 05/13/2008 |
| 7363396 | Supercharge message exchanger A system with a first random access memory (RAM), a second RAM, a first processor coupled to the first RAM and a second processor coupled to the second RAM. The first RAM is configured to store input/output (I/O) completions from at least two engines. The second RAM... | 04/22/2008 |
| 7363417 | Optimized topographies for dynamic allocation of PCI express lanes using differential muxes to additional lanes to a host Many Peripheral Component Interconnect Express (PCIE) lanes are available between a root complex host and peripherals inserted into slots. Each PCIE lane is a bi-directional serial bus, with a transmit differential pair and a receive differential pair of data lines.... | 04/22/2008 |
| 7346714 | Notification of completion of communication with a plurality of data storage areas It is an object of this invention to expand an SBP-3 protocol such that two data buffers can be independently controlled. To achieve this object, a target sends responses to status blocks corresponding to two commands included in one ORB in the SBP-3, and an initiat... | 03/18/2008 |
| 7343467 | Method to perform parallel data migration in a clustered storage environment A clustered storage array consists of several nodes coupled to one or more storage systems. The nodes provide a LUN-device for access by a client, the LUN-device mapping to a source logical unit corresponding to areas of storage on the one or more storage systems. A... | 03/11/2008 |
| 7320041 | Controlling flow of data between data processing systems via a memory Apparatus, methods and systems for controlling data flow between data processing systems. In an example embodiment, the apparatus includes descriptor logic for generating a plurality of descriptors including a frame descriptor defining a data packet to be communicat... | 01/15/2008 |
| 7320039 | Method for processing consistent data sets The invention relates to a method for processing consistent data sets by asynchronous application of a subscriber in an isochronous, cyclical communication system. According to the invention, by connecting a communication memory and a consistency, transmission and r... | 01/15/2008 |
| 7318090 | Method for utilizing concurrent context switching to support isochronous processes A method for utilizing concurrent context switching to support isochronous processes preferably comprises a main context that is configured to support system execution tasks, a first concurrent context that supports a first set of concurrent execution and loading pr... | 01/08/2008 |
| 7304897 | Method and system for reading data from a memory Methods and systems consistent with this invention comprise a control circuit for reading data from a memory comprising a plurality of data channels. Such control circuits comprise at least one multiplexer, wherein the at least one multiplexer is configured to route... | 12/04/2007 |
| 7298700 | Method for unidirectional and bidirectional label switched path setup in a label switched network Label contention in a label switched network is resolved by applying a contention resolution scheme that reconciles policies for handling unidirectional and bidirectional label switched path setup. ... | 11/20/2007 |
| 7295569 | Selecting a profile for an interface of a network device according to a margin Selecting a profile for an interface of a network device includes accessing profile sequences, where each profile sequence corresponds to an interface. Each profile sequence includes profiles that provide parameters for communicating data. The following are repeated... | 11/13/2007 |
| 7295570 | Determining a profile for an interface of a network device Selecting a profile for an interface of a network device includes accessing profile sequences, where each profile sequence corresponds to an interface. Each profile sequence includes profiles that provide parameters for communicating data. The following are repeated... | 11/13/2007 |
| 7284086 | Storage device controlling device and control method for storage device controlling device A storage device controller has a channel controller; a disk controller; and a first memory for storing data delivered between the channel controller and the disk controller. The channel controller has a circuit board on which a first processor, a file access proces... | 10/16/2007 |
| 7269631 | Architecture for parallel distributed table driven I/O mapping The present invention provides a system and method for creating virtualized storage in a storage area network using distributed table-driven input/output mapping. The present invention distributes the virtualization mapping in multiple parallel, mapping agents that ... | 09/11/2007 |
| 7269832 | Generic virtual device driver A method and apparatus provides for handling communications between an application and a device through a device driver. Calls or commands are used by the device driver to access the hardware that are common to a number of different types of devices that are to be h... | 09/11/2007 |
| 7266719 | Host system for mass storage business continuance volumes A mass storage business continuance time maker function host system that allows one or more MVS mainframe hosts to have the time to: establish business continuation volumes to mirror the standard mass storage volumes; synchronize business continuation volumes with t... | 09/04/2007 |
| 7254654 | Split-FIFO multi-station data transfer system A data transfer device is disclosed for writing data to and reading data from a disk drive system through a plurality of ports of the data transfer device. The data transfer device includes a first buffer for serially receiving, from a host system, control portions ... | 08/07/2007 |
| 7254658 | Write transaction interleaving A bus master 2, 4 sends write transactions to a bus slave 8 which include separate write addresses AW and write data WD. Write transaction identifiers AWID, WID are associated with these write addresses and write data. The bus slave can accept multiple... | 08/07/2007 |
| 7251715 | Double data rate scheme for data output Systems, devices, and methods for a double data rate memory device includes a storage element, a first pipeline, and a second pipeline. The pipelines are connected to the storage unit to pass or output data on rising and falling edges of an external clock signal. Th... | 07/31/2007 |
| 7251709 | Storage device having a lateral storage director A storage device such as a disk drive is provided with a lateral storage director. The lateral storage director is capable of self-assessing the status of the storage device. The lateral storage director also enables one storage device to transfer data files to anot... | 07/31/2007 |
| 7225219 | Distributed caching architecture for computer networks A distributed caching technique for use in computer networks is disclosed. The illustrative embodiment is particularly advantageous in computer networks that comprises a hierarchical topology because it removes some of the computational tasks associated with caching... | 05/29/2007 |
| 7209979 | Storage processor architecture for high throughput applications providing efficient user data channel loading A storage processor particularly suited to RAID systems provides high throughput for applications such as streaming video data. An embodiment is configured as an ASIC with a high degree of parallelism in its interconnections. The communications architecture provides... | 04/24/2007 |
