Bizarre Patents
Decorative Jeweled Wheel Cover
An improved wheel is provided wherein decorative items such as gem stones are embedded in either the wheel surface, a special mounting section attached to the wheel surface, or to a spoke strap that wraps around each spoke and positions embedded gem stones on the outside surface of the spoke.
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| Number | Title | Issue Date |
| 8117364 | Enhanced protocol and architecture for low bandwidth force feedback game controller Haptic features are stored in a haptic device by preloading or otherwise downloading them, e.g., wirelessly, into the haptic device at the time of manufacture, immediately prior to game play, during game play, and/or at any other time. Haptic features may be activat... | 02/14/2012 |
| 8095713 | Smart cables A smart cable apparatus includes resources that provide for additional functionality such as cable authentication and cable identification. The cable apparatus can be configured for coupling an electronic device such as a media player to other electronic devices suc... | 01/10/2012 |
| 8069288 | Mechanism to flexibly support multiple device numbers on point-to-point interconnect upstream ports A method and apparatus for supporting multiple device numbers on point-to-point interconnect upstream ports. In one embodiment, the method includes a downstream component (DC) that performs discovery of internal device components of the DC during initialization of t... | 11/29/2011 |
| 8065455 | Method for data communication of bus users in an open automation system A method for data communication of bus users of an open automation system such that any bus user with an individual and interactive communication may be connected provides for a communication controller (KC) made up of at least one freely-programmable communication-... | 11/22/2011 |
| 8046511 | Implementing signal processing cores as application specific processors Methods and apparatus are provided for efficiently implementing signal processing cores as application specific processors. A signal processing core, such as a Fast Fourier Transform (FFT) core or a Finite Impulse Response (FIR) core includes a data path and a contr... | 10/25/2011 |
| 8041865 | Bus termination system and method A memory system includes a number of integrated circuit chips coupled to a bus. Each of the integrated circuit chips has an input/output node coupled to the bus, the input/output node having a programmable on-die termination resistor. The input/output node of one of... | 10/18/2011 |
| 8015335 | Performing a configuration virtual topology change and instruction therefore In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest configuration, a perform topology function instruction is executed by a guest processor specifying a topol... | 09/06/2011 |
| 8001305 | System and dynamic random access memory device having a receiver A dynamic random access memory device (DRAM) receiver circuit includes an input to receive a data signal, and also includes decision circuitry to make a decision about the received data signal based on a present sampled data signal and a coefficient value correspond... | 08/16/2011 |
| 7996591 | Computing device with flexibly configurable expansion slots and method of operation A computing device that allows for a flexible allocation of bandwidth among peripheral devices using a peripheral bus is disclosed. The computing device includes a peripheral bus and at least two slots. The computing device may be used with a single peripheral card ... | 08/09/2011 |
| 7975085 | Signal processing device and control method, signal processing method, program, and signal processing system A signal processing device controls a plurality of signal processing units that process an input signal inputted via a signal line with wide bandwidth, via a control line with narrow bandwidth or the signal line, and includes: a storing unit configured to store corr... | 07/05/2011 |
| 7975084 | Configuring a host computer using a service processor Technologies are provided herein for configuring aspects of the operation of a server computer using a service processor. The service processor includes a processor, a NAND flash memory organized using a file system, and a hardware data communications interface coup... | 07/05/2011 |
| 7934032 | Interface for establishing operability between a processor module and input/output (I/O) modules Described are electronics systems and methods for distributing a limited number of lanes of a PCI Express-based processor (CPU) module among a plurality of PCI Express-based I/O modules with which the CPU module is in communication. The CPU module receives a code fr... | 04/26/2011 |
| 7934033 | PCI-express function proxy Embodiments are described for executing embedded functions in endpoint devices by proxy in a shared PCI Express subsystem. The shared subsystem comprises a plurality of proxy devices coupled to a PCIe fabric, wherein each one of the proxy devices is associated with ... | 04/26/2011 |
| 7913006 | Self-organized parallel processing system Systems and methods for improving the performance of a multimedia processor system by dynamically evaluating the current performance of the system and, if necessary, updating the configurations of the individual processors to improve the performance of the system. O... | 03/22/2011 |
| 7899963 | Method and apparatus for allocating inputs in microcontrollers, and corresponding microcontroller A method and an apparatus for allocating configuration inputs of a microcontroller, the apparatus being embodied in such a way that at each configuration input, one signal state of at least two possible signal states is to be set, wherein there is connected to each ... | 03/01/2011 |
| 7899964 | Method and system for providing universal plug and play resource surrogates A method and system for providing services in a network including a control point and plural UPnP devices is provided. Surrogates are used to functionally replace the original UPnP device/service functionalities without new hardware or firmware/software updates. The... | 03/01/2011 |
| 7895377 | Multiple removable non-volatile memory cards serially communicating with a host Two or more very small encapsulated electronic circuit cards to which data are read and written are removably inserted into two or more sockets of a host system that is wired to the sockets. According to one aspect of the disclosure, command and response signals are... | 02/22/2011 |
| 7895376 | Hardware configuration information system, method, and computer program product A method for determining configuration information to be reported comprises accessing a table corresponding to a configuration resource associated with the configuration information, wherein the table comprises an entry for each hardware configuration definition to ... | 02/22/2011 |
| 7886094 | Method and system for handshaking configuration between core logic components and graphics processors A system for implementing handshaking configuration to enable coordinated data execution in a computer system. The system includes a core logic component coupled to a system memory and a graphics processor coupled to the core logic component via a graphics bus. The ... | 02/08/2011 |
| 7886095 | I/O space request suppressing method for PCI device To minimize the restriction on the number of available PCI devices although the assignable size of I/O space is limited, an arithmetic unit is provided with a configuration information acquisition device for acquiring the configuration information about PCI devices,... | 02/08/2011 |
| 7840732 | Stacked card address assignment Stacking of electronics modules, boards or cards, hereinafter referred to as cards is described. Each card in a stack is connected logically to a host via a single physical bus slot, and can detect its relative position in the stack on initial power on and make use ... | 11/23/2010 |
| 7840731 | Accelerated data switching on symmetric multiprocessor systems using port affinity A router that includes a plurality of processors (SMPs) where there is “affinity” between particular processors and particular interfaces: Each of the router's interfaces are assigned to one of the processors. A packet arriving at a particular interface will be ... | 11/23/2010 |
| 7840733 | Power optimized dynamic port association A method, device, system, and computer readable medium are disclosed. In one embodiment the method includes dynamically associating a newly active port in a computer system with a first host controller. The first association happens when a total number of currently ... | 11/23/2010 |
| 7827333 | System and method for determining a bus address on an add-in card One embodiment of the present invention sets forth a technique to determine a bus address for an add-in card on a System Management bus (SMbus) that includes a hybrid microcontroller (hEC) and discrete graphics processing unit (dGPU). A graphics driver requests the ... | 11/02/2010 |
| 7822896 | Electronically configurable connector module An input/output module includes a device communication connector apparatus for connecting at least one conductor between the module and at least one device and interface apparatus for causing the module to place any of a plurality of signals on any of a plurality of... | 10/26/2010 |
| 7822897 | System and methods for connecting multiple functional components The present invention relates to a flexible and reconfigurable bus fabric for microelectronic processing units, which can offer efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. I... | 10/26/2010 |
| 7822895 | Scalable CPU (central processing unit) modules for enabling in-place upgrades of electronics systems Described is an electronics enclosure having a midplane, a first field-replaceable CPU (central processing unit) module, and a second field-replaceable CPU module. Each CPU module is independently pluggable into and removable from the midplane. Each CPU module is co... | 10/26/2010 |
| 7822894 | Managing storage system configuration information The present invention unitarily manages the configuration change of a storage system so as to know the latest configuration, and evaluates the reliability in advance when the configuration is changed so that the generation of a failure is suppressed. When the host | 10/26/2010 |
| 7809869 | Throttling a point-to-point, serial input/output expansion subsystem within a computing system Methods, systems, and apparatus are disclosed for throttling a point-to-point, serial I/O expansion subsystem within a computing system that include: receiving, by a link configuration module, an external environmental parameter value representing a condition of an ... | 10/05/2010 |
| 7788429 | Cross coupled unidirectional data ring In a data communication system for communicating data between a plurality of data communicating entities, data is transmitted simultaneously from at least a first data communicating entity and a second data communicating entity onto a serial data ring. A first porti... | 08/31/2010 |
| 7757025 | Programmable logic controller peripheral device and program creation method thereof A peripheral device for a programmable logic controller according to the invention includes: an instruction table for correlatively storing instructions and the input/output types of parameters for the instructions; a search/discrimination means for searching the in... | 07/13/2010 |
| 7743189 | PCI function south-side data management A hypervisor, during device discovery, has code which can examine the south-side management data structure in an adapter's configuration space and determine the type of device which is being configured. The hypervisor may copy the south-side management data structur... | 06/22/2010 |
| 7739434 | Performing a configuration virtual topology change and instruction therefore In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest configuration, a perform topology function instruction is executed by a guest processor specifying a topol... | 06/15/2010 |
| 7725632 | Computer system and management method thereof Disclosed herewith is a composite type computer system that can assure that a PCI tree to be allocated to a computer is configured completely before the computer is powered. The composite type computer system includes a PCI switch that connects plural computers thro... | 05/25/2010 |
| 7698484 | Information processor configured to detect available space in a storage in another information processor An information processor that is connected to at least one other information processor via a network, includes a detecting unit that detects an optional device to be used for information processing, as a target optional device, installed on the other information pro... | 04/13/2010 |
| 7673082 | Method and system to determine device criticality for hot-plugging in computer configurations The invention relates to a method for determining device criticality in a computer system comprising the steps of building a component hierarchy graph using computer configuration information; labeling the nodes of component hierarchy graph with redundancy attribute... | 03/02/2010 |
| 7668991 | Address assignment to plurality of connecting elements in a bus system A connecting element is proposed for weight measurement in a vehicle seat, which has connecting means and bus communications means. The connecting means make possible connecting to a single-wire bus. Furthermore, a method is proposed for making possible the bus comm... | 02/23/2010 |
| 7668992 | Context-based operation reconfigurable instruction set processor and method of operation A reconfigurable context-based operation instruction set processor for use in a processing system capable of executing a first instruction set. The reconfigurable context-based operation instruction set processor comprises: 1) a reconfigurable data path comprising a... | 02/23/2010 |
| 7660922 | Mechanism to flexibly support multiple device numbers on point-to-point interconnect upstream ports A method and apparatus for supporting multiple device numbers on point-to-point interconnect upstream ports. In one embodiment, the method includes a downstream component (DC) that performs discovery of internal device components of the DC during initialization of t... | 02/09/2010 |
| 7660923 | Embedded system design through simplified add-on card configuration Methods for configuring an embedded system are described. One method includes connecting a plurality of add-on cards to a circuit board having a programmable processor. The programmable processor is configured to communicate with the plurality of add-on cards. At le... | 02/09/2010 |
