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An aircraft having vertical takeoff and landing capability provided with at least first and second laterally extending paddle wheels rotatable on a central axis perpendicular to the longitudinal axis of the aircraft fuselage and between its nose and tail.
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| Number | Title | Issue Date |
| 7305614 | Interoperable retrieval and deposit using annotated schema to interface between industrial document specification languages In order to achieve interoperability between diverse types of computer systems for the purpose of e-commerce, a system and method are provided for retrieving data from multiple relational databases into an XEDI document. First, a DTDSA is used to create an intermedi... | 12/04/2007 |
| 7287219 | Method of constructing a document type definition from a set of structured electronic documents A method of generating a definition for a collection of source documents is provided. Patterns common to each source document in the collection of source documents are identified and restrictive general rules based on the identified common patterns are then construc... | 10/23/2007 |
| 7281204 | Hub document preparation method The invention provides a hub document preparation method which collects a plurality of external files and attachment files to be included in a structured document of a hub document format to allow a hub document to be prepared readily, to reduce the burden to a docu... | 10/09/2007 |
| 7085994 | Snippet selection According to the invention, a process for selecting hierarchical information with a computer system user interface is disclosed. In one step, selection of an element in a hierarchy is recognized. A plurality of ancestor elements is determined for the element. A sele... | 08/01/2006 |
| 7039906 | Compiler for enabling multiple signed independent data elements per register A compiler for data processing outputs lower-level code for packing multiple signed data elements per register into a processor's registers using the rules set forth herein, and when executed, the code simultaneously operates on the elements in a register in a singl... | 05/02/2006 |
| 7003489 | Methods and apparatus for submitting information to an automated lending system Methods and apparatus for submitting reports to an automated lending system are described. At a lowest level interface, a user manually submits information via a browser, and at a highest level interface, information is submitted via a print driver. Although the bro... | 02/21/2006 |
| 6728745 | Semiconductor circuit for arithmetic operation and method of arithmetic operation There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by suppressing wasteful processing. There is provided a computing unit for computi... | 04/27/2004 |
| 5958001 | Output-processing circuit for a neural network and method of using same An output-processing circuit for a neural network, which may be implemented on an integrated circuit, comprises at least one latch and at least one adder. Outputs from a plurality of neurons are sequentially received by the output-processing circuit. The ... | 09/28/1999 |
| 5898596 | Adder which employs both carry look-ahead and carry select techniques The hybrid adder of the present invention uses stages of carry select functions to provide serial carries and a carry look-ahead tree structure to compute the final carries in parallel. The longer the carry select stages become, the slower and smaller the... | 04/27/1999 |
| 5629846 | Method and system for document translation and extraction A method and system for translating an electronic document from one format to an electronic document in a second format. Selected portions from a source document are extracted and transformed into the format of a target document. A translation rule set is... | 05/13/1997 |
| 5204831 | Circuit configuration for digital bit-serial signal processing A circuit configuration for digital bit-serial signal processing includes n input shift registers each being written in parallel or serially with an input data word and then read out by shifting to the right. Sign repetition devices are each assigned to a... | 04/20/1993 |
| 5105379 | Incrementing subtractive circuits An incrementing subtractive circuit for use in digital signal processing is constituted by a full adder having data inputs of which at least one is inverted, a sum output, and a carry output which is coupled by way of a half adder circuit to a one bit ups... | 04/14/1992 |
| 4774686 | Serial digital signal processing circuitry A serial-bit digital processing system uses registers and latches to synchronize samples and justify sign-bits. Nominally each processing block in the system includes a sign extend register preceding an arithmetic element and an output register following ... | 09/27/1988 |
| 4417314 | Parallel operating mode arithmetic logic unit apparatus Apparatus is presented for logically combining two input signals in parallel operations to provide AND and OR as well as Exclusive OR outputs as part of the ALU function in a digital computer. The carry function is used in combination with the already gen... | 11/22/1983 |
| 4336600 | Binary word processing method using a high-speed sequential adder The words to be added together by the high-speed sequential adder are stored in shift registers 1l to 1p whose serial outputs are connected to the corresponding inputs of a transcoder 2 producing the binary number of "1's" for each b... | 06/22/1982 |
| 4285047 | Digital adder circuit with a plurality of 1-bit adders and improved carry means A digital adder comprises at least two, first and second 1-bit adders; first and second carry circuits which store therein output signals of carry output terminals of said first and second adders and apply them to carry input terminals of said first and s... | 08/18/1981 |
| 4245327 | Data processor having two types of carry flags Two flip-flops for carry information are provided in a data processor; one for carry of arithmetic operation and the other for carry occuring when a program counter is incremented. A state of the latter flip-flop provides a condition of a conditional bran... | 01/13/1981 |
| 4218751 | Absolute difference generator for use in display systems An absolute difference generator comprises an adder, an Exclusive-OR, two inverters and a latch. One input number is inverted, then presented to one input of the adder while the other input number is presented to the other input of the adder. The carry ou... | 08/19/1980 |
| 3978329 | One-bit full adder A high-speed, low-power 1-bit adder includes a combination of current-mode switches connected in a dual tree configuration in series with respective constant current sources and summing resistors. Input operand signals select particular tree paths, thereb... | 08/31/1976 |
| 3941990 | Series type adder for adding plural binary numbers Series type adder receiving numbers having different polarities, constituted by elementary series type adders combining the positive input numbers and the true complements of the negative input numbers to work out the sum Σ thereof, characterized in that... | 03/02/1976 |
