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| Number | Title | Issue Date |
| 8060550 | Method and apparatus for integer transformation using a discrete logarithm and modular factorization Transforming an integer comprises receiving the integer, where the integer can be expressed as a modular factorization. The modular factorization comprises one or more factors, where each factor has an exponent. The integer is expressed as a product of residues. A d... | 11/15/2011 |
| 7711764 | Pipelined real or complex ALU A method and ALU for implementing logarithmic arithmetic in a multi-stage pipeline is described herein. According to one embodiment, a master function is decomposed into two or more sub-functions. Memory associated with the pipeline stores a look-up table for each s... | 05/04/2010 |
| 7689639 | Complex logarithmic ALU The present invention describes a method and apparatus for performing logarithmic arithmetic with real and/or complex numbers represented in a logarithmic format. In one exemplary embodiment, an ALU implements logarithmic arithmetic on complex numbers represented in... | 03/30/2010 |
| 7353008 | Method and system for optimizing decibel data conversion A Method and System for Optimizing Decibel Data Conversion. This invention provides an ability to convert linear signals into decibel units via digital logic circuitry. The resultant system can present information to users in real-time. This is made possible by perf... | 04/01/2008 |
| 7284027 | Method and apparatus for high speed calculation of non-linear functions and networks using non-linear function calculations for digital signal processing The invention includes apparatus and methods for high-speed calculation of non-linear functions based upon a shifted adder and a offset generator. Various implementations may preferably include a input preprocessor and/or an output post processor. The invention incl... | 10/16/2007 |
| 7233966 | Method and device for generating an output signal as a mathematical function of an input signal A device (1) for generating a digital output signal yLOG(k)/K) as a mathematical function of a digital input signal (xLOG(k)) includes a level-changing device (6), which by amplifying or attenuating the input signal (xLOG | 06/19/2007 |
| 7194615 | Reconfigurable apparatus being configurable to operate in a logarithmic scale An integrated circuit has a command/control bus and a number of processing elements. The processing elements contain a number of parts, each part being connected to said command/control bus. Each one of the processing elements is re-configurable in response to comma... | 03/20/2007 |
| 7184409 | Blind rate detection method and device in asynchronous mobile communication system A blind rate detection method in an asynchronous mobile communication system comprises: restoring data when a path selection (PS) value at a last bit's possible position satisfies a PS condition; determining whether a SER satisfies a SER condition when no error occu... | 02/27/2007 |
| 7171435 | Circuits, systems, and methods implementing approximations for logarithm, inverse logarithm, and reciprocal A digital signal system (30) for determining an approximate logarithm of a value of x having a base b is described. The system comprises circuitry for storing x as a digital representation, identifying a most significant digit (MSD) of the digital representat... | 01/30/2007 |
| 7116955 | Dual loop automatic gain control An AGC circuit includes both wide-band and narrow-band VGAs. Two power monitors monitor the power level of the two VGAs. Based upon the signals provided by the power monitors, the AGC circuit derives two error terms. The AGC circuit filters and combines the error te... | 10/03/2006 |
| 7107300 | Circuits, systems, and methods implementing approximations for inverse logarithm A digital signal system (50) determines an approximate antilog x from a value of ƒ(x), where x has a base b. ... | 09/12/2006 |
| 7085421 | Image processing method for facilitating data transmission An image processing method for facilitating data transmission is provided. An image compression method is performed to convert X-bits binary digital signals to a binary compressed data in a floating-point form of (1.n)*2m. Bit m represents the first bit w... | 08/01/2006 |
| 7080364 | Methods and apparatus for compiling a transcendental floating-point operation Methods and an apparatus for compiling a transcendental floating-point operation are disclosed. The disclosed techniques compile a transcendental floating-point operation by replacing the transcendental floating-point operation with an integer-based routine (e.g., a... | 07/18/2006 |
| 7072926 | Blind transport format detection system and method with logarithm approximation for reliability figure Blind transport format detection with sliding window trace-back for evaluating decodings to candidate block lengths together with piecewise linear approximation of the reliability figure (logarithm of ratio of maximum survivor path metric minus minimum survivor path... | 07/04/2006 |
| 7016541 | Image processing method for facilitating data transmission An image processing method for facilitating data transmission is provided. An image compression method is performed to convert X-bits binary digital signals to a binary compressed data in the form of n*2m, in which n is represented by the former Y bits of... | 03/21/2006 |
| 6993550 | Fixed point multiplying apparatus and method using encoded multiplicand The invention relates to a fixed point multiplying apparatus and method using an encoded multiplicand. The multiplicand is encoded into an independent binary system instead of a conventional binary system and each bit value of the encoded multiplicand is used as a c... | 01/31/2006 |
| 6978289 | Apparatus and method for minimizing accumulated rounding errors in coefficient values in a lookup table for interpolating polynomials An apparatus and method are disclosed for minimizing accumulated rounding errors in coefficient values in a lookup table for interpolating polynomials. Unlike prior art methods that individually round each polynomial coefficient of a function, the method of the pres... | 12/20/2005 |
| 6961744 | System and method for generating an integer part of a logarithm of a floating point operand A logarithm unit computes an integer part of a logarithm of a floating point operand according to an embodiment of the present invention. The logarithm unit analyzes a format of the floating point operand and generates at least one signal representative of the forma... | 11/01/2005 |
| 6934317 | Systems and methods for communicating spread spectrum signals using variable signal constellations According to embodiments of the invention, a communications system includes an error correction encoder that error correction encodes a bitstream according to an error correction code. The system also includes a variable symbol generator that generates a symbol acco... | 08/23/2005 |
| 6678710 | Logarithmic number system for performing calculations in a processor A computation unit employs a logarithmic number system that uses a logarithmic numerical representation that differs from an IEEE standard representation to improve the efficiency of computation, both by reducing the time expended in performing the comput... | 01/13/2004 |
| 6591361 | Method and apparatus for converting data into different ordinal types A method and apparatus that converts integer numbers to/from floating point representations while loading/storing the data. The method and apparatus perform this conversion within a central processing unit having a converter unit and a set of conversion r... | 07/08/2003 |
| 6502118 | Fast system and method for producing a logarithmic signal approximation with variable precision A system and method for producing an output logarithmic digital signal from an input digital signal having a plurality of bit values in which the output logarithmic signal has a precision defined by a parameter is described. The system (45) includes a sea... | 12/31/2002 |
| 6466633 | Methods and apparatus for implementing a receiver filter with logarithmic coefficient multiplication A method of filtering a signal, the method including the steps of sampling analog input signal, thereby providing a purality of digital complex input signal samples the each of the samples indicates a sign and a magnitude, for each of the complex input si... | 10/15/2002 |
| 6345285 | Logarithmic value calculation circuit Logarithm of data x being input is taken to calculate a decibel value y. The input value x is separated into mantissa value a and exponent value b by a separator or on the basis of an expression x=a.multidot.2b. Logarithmic value 10.multidot.lo... | 02/05/2002 |
| 6233595 | Fast multiplication of floating point values and integer powers of two A method for performing fast multiplication in a microprocessor is disclosed. The method comprises detecting multiplication operations that have a floating point operand and an integer operand, wherein the integer operand is an integer power of two. Once ... | 05/15/2001 |
| 6085209 | Method and system for performing an IIR filtering operation A method and system for an IIR filter are provided. A sequence of input signals is converted to a first sequence of log signals, while a sequence of feedback signals is converted to a second sequence of log signals. IIR filtering coefficients are then add... | 07/04/2000 |
| 6065031 | Log converter utilizing offset and method of use thereof A digital log converter is provided which includes a comparator (10) and a log signal generator (20). Upon receiving a digital input signal (12), the comparator (10) determines whether an upper bit-slice of the input signal (12) equals zero. If the upper ... | 05/16/2000 |
| 6055556 | Apparatus and method for matrix multiplication A system (400) alternatively performs real matrix operation in a first mode or performs complex matrix multiplication in a second mode. One input matrix (e.g., {B}) stays in a plurality of memory fields (430-k), while the other input matrix (e.g., {A}) is... | 04/25/2000 |
| 6023719 | Signal processor and method for fast Fourier transformation With reference to FIG. 1 signal processor (10) for performing transformations of sets of input data points comprises a memory for storing a first half input data points and a second half input data points, an adder unit for pairwise adding one real part o... | 02/08/2000 |
| 6003058 | Apparatus and methods for performing arithimetic operations on vectors and/or matrices A multiply-multiply-accumulate (MMA) system (10) efficiently evaluates matrix products X=F*C. Matrix C is dissected into submatrices A and B taking advantage of symmetry in C. LOG unit (14) converts B, A, and F to LOG values B', A' and F'. These are summe... | 12/14/1999 |
| 5961579 | Apparatus using a logarithm based processor An apparatus that includes a logarithm based processor (216) having at least one digital logarithm converter (202) and a power amplifier (208) responsive to the logarithm based processor (216).... | 10/05/1999 |
| 5951629 | Method and apparatus for log conversion with scaling A parallel processor (110) operates in the LOG domain. A LOG converter (114) receives input data in the NORMAL and converts it to the LOG domain for processing in the parallel processing units PPU-k. Scaling of the input data, is performed in the LOG conv... | 09/14/1999 |
| 5951628 | Method and system for performing a convolution operation A method and system for a convolution operation in a digital signal processor (DSP) are provided. The convolution operation is performed in a logarithmic number system (LNS) domain. The DSP includes a plurality of processing elements that executes the con... | 09/14/1999 |
| 5948052 | Apparatus using a logarithm based processor and an audio amplifier An apparatus that includes a logarithm based processor (216) having at least one digital logarithm converter (202) and an audio amplifier (208) responsive to the logarithm based processor (216).... | 09/07/1999 |
| 5944774 | Methods apparatus and computer program products for accumulating logarithmic values The sum of a plurality of logarithmic numbers is determined by expressing the logarithmic numbers as one of a predetermined values. For example, the numbers may be analog values which may be sampled by an 8-bit AtoD converter to be expressed as one of a p... | 08/31/1999 |
| 5936871 | Method and system for performing an L2 norm operation A method and system for an L2 norm operation are provided. A sequence of input signals is converted to a sequence of log signals. The sequence of log signals is distributed through a data pipeline to a plurality of processing elements which eff... | 08/10/1999 |
| 5920596 | Apparatus for amplifying a signal using a digital processor An apparatus for amplifying a signal that includes a digital processor (12) producing a first digital signal (20) and a second digital signal (22), a pulse width modulator (32) receiving the first digital signal (20) and producing a pulse width modulated ... | 07/06/1999 |
| 5801974 | Calculation method and circuit for obtaining a logarithmic approximation value The present invention discloses a calculation method utilizing a circuit and a circuit for obtaining a logarithmic approximation value. The circuit minimizes the error in calculating a logarithmic approximation value by adding a simple circuit. The method... | 09/01/1998 |
| 5798957 | LNS-based computer processor and method of use thereof An LNS-based computer processor is provided for performing high-speed calculations that involve special function values. Special functions include transcendental and hyperbolic functions. The computer processor includes a decoder (11), a memory circuit (1... | 08/25/1998 |
| 5771391 | Computer processor having a pipelined architecture and method of using same A computer processor that performs operations in a logarithmic number system (LNS) domain includes a log converter (20) which generates log signals, a data pipeline (22), a plurality of processing elements (231a-f) coupled to respective stages (24a-d) of ... | 06/23/1998 |
