Class 708/514 - Matrix array

Subclass of Class 708 - Electrical computers: arithmetic processing and calculating
Definition: Subject matter wherein the data is operated on by elements
No. of patents: 23
Last issue date: 07/28/2009

Number	Title	Issue Date
7567996	Vector SIMD processor A data processor whose level of operation parallelism is enhanced by composing floating-point inner product execution units to be compatible with single instruction multiple data (SIMD) and thereby enhancing the operation processing capability is made possible. An o...	07/28/2009
7363200	Apparatus and method for isolating noise effects in a signal A matrix includes samples associated with a first signal and samples associated with a second signal. The second signal includes a first portion associated with the first signal and a second portion associated with at least one disturbance, such as white noise or co...	04/22/2008
7242414	Processor having a compare extension of an instruction set architecture A processor having a compare extension of an instruction set architecture which incorporates a set of high performance floating point operations. The instruction set architecture incorporates a variety of data formats including single precision and double precision ...	07/10/2007
7137005	Method of watermarking digital data A method of introducing a non-perceptional signal (watermark) to a digital media data is disclosed. The method is based on the representation of source digital data using a special matrix, insertion of a digital watermark into the special matrix to receive the water...	11/14/2006
7089393	Data processing using a coprocessor A data processing system using a main processor 8 and a coprocessor 10 provides coprocessor load instructions (USALD) for loading a variable number of data values dependent upon alignment into the coprocessor 10 and also specifying data processi...	08/08/2006
7089159	Method and apparatus for matrix reordering and electronic circuit simulation A matrix reordering method performs reordering of elements of a coefficient matrix created based on coefficients of linear simultaneous equations whose solutions are to be produced by parallel processing of processors of a computer in accordance with Gaussian elimin...	08/08/2006
7075539	Apparatus and method for processing dual format floating-point data in a graphics processing system A computing system has a graphics processor, a graphics memory, main memory, a bridge, and a central processing unit configured to process floating-point data of a first fixed size. An interconnect grid includes communication paths to link the graphics processor, th...	07/11/2006
7028066	Vector SIMD processor A data processor whose level of operation parallelism is enhanced by composing floating-point inner product execution units to be compatible with single instruction multiple data (SIMD) and thereby enhancing the operation processing capability is made possible. An o...	04/11/2006
7010760	Batch-based method and tool for graphical manipulation of workflows An autofill algorithm provides tools for defining and automatically executing batch based procedures in an adaptive hierarchical workflow environment, and may be suitable for a large variety of applications including laboratory procedure planning, execution, documen...	03/07/2006
6820074	Null-line based radial interpolation of gridded data A method and software are disclosed for processing data values of a data array at equally spaced locations in two dimensions where the desired data values are nulls in the data array. The method and software first searches for linear ranges of contiguous nulls, and ...	11/16/2004
6662125	Electromagnetic wave analyzer and program for same An electromagnetic wave analyzer and program which can handle non-uniform cells with smaller computation errors. A given computational domain is divided into a plurality of cells for the purpose of finite difference approximation. For each space point, a ...	12/09/2003
6188240	Programmable function block A programmable function block comprises a core logic circuit having a first argument input group consisting of first through fourth argument input terminals, a second argument input group consisting of first through fourth argument input terminals, first ...	02/13/2001
6009505	System and method for routing one operand to arithmetic logic units from fixed register slots and another operand from any register slot A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a local CPU bus to a conventional processor. The MEU employs vector registers, a vector ALU, and an...	12/28/1999
5859790	Replication of data A computer instruction is provided which replicates a bit sequence to generate a data string consisting only of a plurality of the replicated bit sequences. The computer instruction allows this to be done in a register store having a predetermined bit cap...	01/12/1999
5268856	Bit serial floating point parallel processing system and method A system and method for floating point computations involving matrices or vectors includes a plurality of identical processing units connected to a linear chain with direct data communication links between adjacent processing units. Each such processor is...	12/07/1993
5121351	Floating point arithmetic system A floating point arithmetic system including an operating processor for effecting the floating point operation, a memory device for storing data to be operated and a processing device for controlling the data transfer between the operating processor and t...	06/09/1992
5025407	Graphics floating point coprocessor having matrix capabilities A graphics coprocessor designed to work in conjunction with a host graphic processor in a graphics system. The coprocessor is adapted to perform arithmetic calculations including matrix calculations. The matrix size is such that the intermediate results r...	06/18/1991
4996661	Single chip complex floating point numeric processor A pipelined arithmetic processor includes a pair of multipliers in parallel feeding an ALU that, in turn, feeds a pair of parallel accumulators, the various sections being connected by controllable data paths and controlled by a set of pipelined registers...	02/26/1991
4956801	Matrix arithmetic circuit for processing matrix transformation operations A matrix arithmetic circuit for processing matrix transformation operations includes a random access memory (RAM) for storing a plurality of numbers in Modulo 256 with multiple tap points numbers format. A multiplier multiplies two of the Modulo 256 numbe...	09/11/1990
4888682	Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers A pipelined paralled vector processor decreases the time required to process the elements of a single vector stored in a vector register. Each vector register of a plurality of vector registers is subdivided into a plurality of smaller registers. A vector...	12/19/1989
4884190	High performance parallel vector processor having a modified vector register/element processor configuration A parallel vector processor includes a plurality of vector registers, each vector register being subdivided into a plurality of smaller registers. A vector is stored in each vector register, the vector has a plurality of elements. The elements of the vect...	11/28/1989
4736335	Multiplier-accumulator circuit using latched sums and carries Vector dot multiplication is facilitated in a multiplier in which pipelining techniques are employed. Two vectors u(i), v(i), each having the same number of components (L), the components of the vector u(i) having m bits, and the components of the other v...	04/05/1988
4683547	Special accumulate instruction for multiple floating point arithmetic units which use a putaway bus to enhance performance A data processing system includes a multiple floating point arithmetic unit with a putaway and a bypass bus, which includes a new instruction for handling multiple multiply or divide instructions. These instructions are separated by add operations, includ...	07/28/1987

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Class 708/514 - Matrix array