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| Number | Title | Issue Date |
| 8126949 | Reconfigurable filter node for an adaptive computing machine A reconfigurable filter node including an input data memory adapted to store a plurality of input data values, a filter coefficient memory adapted to store a plurality of filter coefficient values, and a plurality of computational units adapted to simultaneously com... | 02/28/2012 |
| 8051121 | Dual multiply-accumulator operation optimized for even and odd multisample calculations According to some embodiments, a dual multiply-accumulate operation optimized for even and odd multisample calculations is disclosed. ... | 11/01/2011 |
| 7966360 | Finite impulse response filter and digital signal receiving apparatus An A/D conversion section performs oversampling on an analog signal at a rate M times a symbol rate to convert the analog signal into a digital signal. A FIR filtering section has two delay-element sequences, each with a plurality of delay elements. The two delay-el... | 06/21/2011 |
| 7958178 | Finite impulse response filter for a time-synchronized system A Finite Impulse Response (“FIR”) filter that uses an approximation of the time integral of the impulse response derived from data collected at non-uniform intervals and processes time-synchronized measurements taken at uneven intervals. ... | 06/07/2011 |
| 7945610 | Convolution operation circuit There is provided a convolution operation circuit that performs a convolution operation on a provided digital signal. The convolution operation circuit includes a data dividing section that generates a plurality of divided data obtained by dividing respective amplit... | 05/17/2011 |
| 7933943 | Multiplierless FIR digital filter and method of designing the same Provided are a multiplierless FIR digital filter and a method of designing the same, in which a filtering operation is performed by a small addition/subtraction circuit using extracted information after analyzing the property of a given coefficient and extracting in... | 04/26/2011 |
| 7921147 | Filtering integrated circuit A filtering integrated circuit comprises: a storing circuit; a filter coefficient calculating unit configured to receive frequency information that identifies a characteristic frequency of an output signal in a filtering process, and to set filter coefficients calcu... | 04/05/2011 |
| 7882164 | Image convolution engine optimized for use in programmable gate arrays Minimizing the power consumption in a field programmable gate array (FPGA) when used for convolution. The power consuming parts of the calculation are determined, and symmetry in those parts is exploited. For example, when multiplying by a filter have in common Valu... | 02/01/2011 |
| 7877430 | Method and apparatus for accelerating processing of adaptive finite impulse response filtering Finite impulse response filtering is achieved by broadcasting to at least one compute unit an instruction having a plurality of data samples, a conditional field associated with each compute unit, and a set of operator values for operating on each data sample; provi... | 01/25/2011 |
| 7877429 | Movable tap finite impulse response filter FIR filter apparatus comprises an input responsive to an input signal and an FIR filter that comprises three filter stages. A first delay circuit has a first time delay coupled between two of the three filter stages. A second delay circuit has a second time delay co... | 01/25/2011 |
| 7873686 | Complex half-band finite impulse response filter and method of making same An electrical signal filter for processing a discrete-time real signal having a length N. In one embodiment, the filter comprising a delay line having N taps and a corresponding respective N filter coefficients. Values for the filter coefficients are determined by f... | 01/18/2011 |
| 7831646 | Movable tap finite impulse response filter An FIR filter apparatus comprises a coefficient generator to generate first and second coefficients. A first end of a shared wiring is coupled to the coefficient generator. A first memory is coupled to a second end of the shared wiring to store the first coefficient... | 11/09/2010 |
| 7831647 | Movable tap finite impulse response filter A finite impulse response (FIR) filter comprises a first multiplier that receives an input signal and a first tap coefficient. A first delay element receives the input signal and provides a fixed delay. A second multiplier receives a second tap coefficient and an ou... | 11/09/2010 |
| 7827224 | Movable tap finite impulse response filter A method selects a period of delay in an FIR filter having (i) a plurality of delay elements and (ii) a plurality of coefficient taps each associated with a portion of an input signal in corresponding stages of delay from a corresponding delay element, in which at l... | 11/02/2010 |
| 7774395 | Digital filter for transmission-end pulse shaping The digital filter has a finite impulse response, whose length corresponds at most to the duration of N input values, with the filter emitting an output signal which is n-times oversampled in comparison to the input signal (I, Q). In this case, a device (38.1... | 08/10/2010 |
| 7664808 | Efficient real-time computation of FIR filter coefficients Systems and methods for determining coefficients of an Finite Impulse Response (FIR) filter are disclosed. The FIR filter coefficients are computed by determining a sine of an input value and an inverse of the input value. The sine of the input signal and the invers... | 02/16/2010 |
| 7653675 | Convolution operation in a multi-mode wireless processing system A system and method for performing a convolution operation in a multi-mode wireless processing system. The method can include loading an initial value and a stride value into an address generator, generating an address based on the initial value and the stride value... | 01/26/2010 |
| 7631027 | Efficient multichannel filtering for CDMA modems An efficient, multichannel filter for CDMA modems permits multiple serial, digital bit streams to be filtered by digital signal processing techniques including sample weighting and summing functions. Each individual channel may have custom weighting coefficients or ... | 12/08/2009 |
| 7590676 | Programmable logic device with specialized multiplier blocks A specialized multiplier block in a programmable logic device incorporates multipliers and adders, and is configurable as one or more types of finite impulse response (FIR) filter including a Direct Form II FIR filter. The specialized multiplier block further includ... | 09/15/2009 |
| 7590675 | Digital filter, design method thereof, design device, and digital filter design program An original filter is connected to an adjustment filter in the longitudinal way. The original filter has a first filter coefficient of a symmetric numeric string. The adjustment filter has a contact point at a position where the maximum value is acquired in the orig... | 09/15/2009 |
| 7587441 | Systems and methods for weighted overlap and add processing Systems and methods for providing a weighted overlap and add (WOLA) architecture and/or for providing polyphase WOLA FFT processing that may be employed, for example, for separation or channelization of closely-spaced frequencies of an input signal. A WOLA architect... | 09/08/2009 |
| 7584236 | Movable tap finite impulse response filter A finite impulse response (FIR) filter includes a coefficient generator that generates M coefficients, where M is an integer greater than one, M storage elements each storing one of the M coefficients, and a bus. A selector circuit selectively connects the coefficie... | 09/01/2009 |
| 7565389 | Method for determining filter coefficients of a digital filter and digital filter In a method for determining filter coefficients of a digital filter, particularly in UMTS, the predetermined filter coefficients bv are divided by a same scaling factor s and then quantized in that counted from the most significant bit onwards only a certain number ... | 07/21/2009 |
| 7548941 | Digital filter using memory to emulate variable shift register A digital filter uses memory to emulate a variable shift register. Data samples are stored in a memory. The data samples are read from the memory, multiplied with corresponding coefficients stored in the same or a different memory, logically shifted, and written bac... | 06/16/2009 |
| 7529788 | Digital filter design method and device, digital filter design program, and digital filter A digital filter is designed by combining unit filters (L10′, H10′) having a predetermined asymmetric numerical sequence as filter coefficients (H1 to H3). Thus, it is possible to automatically obtain a desired digital filter coeffici... | 05/05/2009 |
| 7509364 | Partial output finite impulse response filter Apparatus and methods are provided to implement an efficient partial output finite impulse response (FIR) filter. In one embodiment, the filter operates by first receiving a set of samples from a streaming data source via a communications medium. Next the set of sam... | 03/24/2009 |
| 7493354 | FIR filter tap architecture for highly dense layout An area-efficient finite impulse response filter having permuted bit-order functional elements that provide substantially straight and direct interconnects with minimized length between adjacent elements. A functional element is coupled with an input data path and a... | 02/17/2009 |
| 7461113 | Reduced complexity adaptive filter A FIR filter for use in an adaptive multi-channel filtering system, includes a first memory for storing data, and a second memory for storing filter coefficients. The second memory stores only non-zero valued coefficients or coefficients that are above a predetermin... | 12/02/2008 |
| 7412471 | Discrete filter having a tap selection circuit A digital signal processing circuit includes a chain of processing units having a selectable number of taps and a tap selection circuit. The tap selection circuit is coupled to the chain of processing units to establish the number of taps of the chains. ... | 08/12/2008 |
| 7409417 | Polyphase filter with optimized silicon area A polyphase filter including M taps, each of the M taps including a filter coefficient. The filter also includes a multiplier-accumulator (MAC) shared by the M taps, a plurality of multiplexors for sequentially selecting a subset of the plurality of taps, and a sche... | 08/05/2008 |
| 7409418 | Linearly scalable finite impulse response filter An improved Finite Impulse Response (FIR) filter is presented which provides linear scalability and implementation without the need for delay lines. A multiprocessor architecture includes a plurality of ALUs (Arithmetic and Logic Unit), Multipliers units, Data cache... | 08/05/2008 |
| 7395291 | Multiplierless correlators for HIPERLAN/2 and IEEE 802.11A wireless local area networks A sliding correlator for timing synchronization in HIPERLAN/2 and IEEE 802.11a wireless local area networks by correlating the received signal with a known waveform is disclosed. The disclosed sliding correlator avoids the large number of complex multiplications per... | 07/01/2008 |
| 7386581 | Performance FIR filter A single bit FIR filter that minimizes computation time by pre-storing outputs or portions of outputs for accumulation and output. ... | 06/10/2008 |
| 7366257 | Carrier recovery device of digital TV receiver A carrier recovery device of a digital TV receiver is disclosed, which can stand a multiple path noise. In the carrier recovery device, it is possible to recover a carrier with a phase error component of the carrier existing on data blocks as well as a carrier signa... | 04/29/2008 |
| 7366746 | Finite impulse response filter method and apparatus Finite response filters (FIRs) are divided into partial filters that filter a same portion of image data to generate partial filtered results. The partial filtered results may be saved and later retrieved to generate complete filter outputs. ... | 04/29/2008 |
| 7352794 | Method and arrangement for use in a single user detector for a CDMA multi-path system A method and arrangement for use in a single user detector in a CDMA multi-path system, comprising providing a finite impulse response (FIR) filter; and configuring the FIR filter to derive at least a first, then a second, then a third, then a fourth of the followin... | 04/01/2008 |
| 7353243 | Reconfigurable filter node for an adaptive computing machine A reconfigurable filter node including an input data memory adapted to store a plurality of input data values, a filter coefficient memory adapted to store a plurality of filter coefficient values, and a plurality of computational units adapted to simultaneously com... | 04/01/2008 |
| 7353244 | Dual-multiply-accumulator operation optimized for even and odd multisample calculations According to some embodiments, a dual multiply-accumulate operation optimized for even and odd multisample calculations is disclosed. ... | 04/01/2008 |
| 7333553 | Tunable duobinary transmitter An apparatus and method for tunably delaying a signal and using that delayed signal in a duobinary transmitter is described. The transmitted duobinary signal is representative of the binary signal, and is formed by, among other things, introducing into a copy of the... | 02/19/2008 |
| 7333539 | High order filters with controllable delay and performance A digital filter is disclosed, the filter comprising a device for determining the initial condition of a partial filter input, using a partitioned filter input signal, and partitioned filter input coefficients and a device for determining the initial condition of a ... | 02/19/2008 |
