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| Number | Title | Issue Date |
| 7885991 | Digital filter having a fir filter and a warped fir filter, and a listening device including such a digital filter A digital filter includes at least a first and a second delayed summation line. One of the delay lines includes a warped finite impulse response (FIR) filter and the other line is a FIR filter. Midpoint elements from the first delayed summation line are used as inpu... | 02/08/2011 |
| 7366746 | Finite impulse response filter method and apparatus Finite response filters (FIRs) are divided into partial filters that filter a same portion of image data to generate partial filtered results. The partial filtered results may be saved and later retrieved to generate complete filter outputs. ... | 04/29/2008 |
| 7352826 | Analog delay circuit An analog delay circuit to impart a group delay to an analog input signal is described. The analog delay circuit may comprise a capacitor to impart at least a portion of the group delay to the analog output signal and a buffer circuit coupled between the capacitor a... | 04/01/2008 |
| 7353244 | Dual-multiply-accumulator operation optimized for even and odd multisample calculations According to some embodiments, a dual multiply-accumulate operation optimized for even and odd multisample calculations is disclosed. ... | 04/01/2008 |
| 7342983 | Apparatus and method for digitally filtering spurious transitions on a digital signal A digital filtering apparatus and method for digitally filtering out undesirable or invalid data from data signal lines. The digital filtering apparatus includes a digital delay element having one or more outputs, a comparator connected to the outputs of the digital... | 03/11/2008 |
| 7315876 | System and method for providing delay line and/or finite impulse response filters using a lossless and dispersion-free transmission line A delay line is constructed using a lossless (or low loss) transmission line which, in turn, can be constructed using an auxiliary conductor inductively coupled to the primary conductor. The auxiliary conductor is driven by the primary conductor through an active sh... | 01/01/2008 |
| 7305100 | Dynamic compression in a hearing aid The present invention relates to a hearing aid with a compressor having a low and gain independent delay and low power consumption. The hearing aid comprises a multi-channel compressor for compensation of dynamic range loss and with a digital input for inputting a d... | 12/04/2007 |
| 7301391 | Filtering variable offset amplifier A current summing FIR filter can be implemented with multiple differential input stages and variable tail currents. The variable tail currents can be used to appropriately weight the present and previous digital input signals. The weighted outputs of the differentia... | 11/27/2007 |
| 7292630 | Limit-cycle-free FIR/IIR halfband digital filter with shared registers for high-speed sigma-delta A/D and D/A converters A multiplexed FIR/IIR digital filter structure (300) which offers linear phase response and low group delay by switching on a FIR filter portion (31) or a IIR filter portion (32). To reduce the silicon area, the FIR/IIR filter (300) share... | 11/06/2007 |
| 7277479 | Reconfigurable fir filter A series of digit processing units (DPUs) are connected to form a finite impulse response (FIR) filter. Each DPU includes a register, a multiplexer, and a coefficient multiplier. The register stores and delays an input digital signal to be filtered. The multiplexer ... | 10/02/2007 |
| 7269291 | Method and apparatus for high speed data compression and decompression A subband processing apparatus useful for wavelet conversion and compression-decompression operations includes a plurality of memories and a plurality of analytic filter banks. The plurality of memories store an input signal in a way such that the input signal is di... | 09/11/2007 |
| 7254198 | Receiver system having analog pre-filter and digital equalizer A receiver system suitable for a local area network contains an analog pre-filter (207 or 619), an analog-to-digital converter (210), a digital equalizer (212), and a decoder (605). A symbol-information-carrying input analog signal... | 08/07/2007 |
| 7239652 | Pipelining of multiplexer loops in a digital circuit An n-level look-ahead network converts input values to intermediate values that are provided to a plurality of multiplexers arranged to form a pipelined multiplexer loop. The first stage of the multiplexer loop consists of a single multiplexer. The second stage cons... | 07/03/2007 |
| 7239753 | Method and apparatus for high speed data compression and decompression A subband processing apparatus useful for wavelet conversion and compression-decompression operations includes a plurality of memories and a plurality of analytic filter banks. The plurality of memories store an input signal in a way such that the input signal is di... | 07/03/2007 |
| 7194500 | Scalable gray code counter The invention is a Gray code counter that uses a carry chain to determine the state of each bit of the counter. An additional bit that toggles at every clock is used to originate the carry chain, and to determine the counter direction. Then, a generic Gray count bit... | 03/20/2007 |
| 7158632 | Adaptive scaling and echo reduction A method, apparatus, and system for scaling a value of an amplitude to a binary value and a method, apparatus and system for reducing an undesirable portion of a signal. ... | 01/02/2007 |
| 7155245 | Multipath distortion eliminating filter An adaptive filter for an FM receiver comprises a digital filter, an error detection section for detecting an error between the amplitude of the output signal of the digital filter and a reference value, and a coefficient updating section for updating tap coefficien... | 12/26/2006 |
| 7152084 | Parallelized infinite impulse response (IIR) and integrator filters A digital parallelized Infinite Impulse Response (IIR) integrator filter comprising a first channel having a first input and second channel having a second input, a first adder to add the two channel inputs, an integrator to integrate the added channel inputs to pro... | 12/19/2006 |
| 7149265 | Timing recovery loop with non-integer length A timing signal is regenerated from an encoded digital signal having a data clock frequency Rb in a receiver using a predetermined sample rate Fs, wherein the data clock period 1/Rb is not an integer multiple of the predetermined sam... | 12/12/2006 |
| 7139037 | Circle correction in digital low-pass filter A filter circuit is provided which has a filtered input and an unfiltered input. The filtered input passes through delay elements to coefficient circuitry. The unfiltered input passes to the coefficient circuitry without passing through the delay elements. In this m... | 11/21/2006 |
| 7103122 | Noise canceller A noise canceller for removing noise components from an input signal includes a noise detector which detects a noise component of the input signal and outputs a hold signal which corresponds to duration of the noise component, a first hold circuit which outputs a sa... | 09/05/2006 |
| 7099907 | Fir filter and ramp-up/-down control circuit using the same An n-bit shift register 102 for shifting input data through successive bit stages and AND gates 103-i (i being 1 to n) corresponding to the bit stages of the shift register 102 are provided. A control circuit 101 feeds out control ... | 08/29/2006 |
| 7088153 | Data storage latch structure with micro-electromechanical switch Micro-electromechanical switches (MEMS) are configured to form a data storage latch to reduce power consumption, to reduce the space used in an integrated circuit, and to improve performance of the integrated circuit. MEMS are implemented at the wiring layer connect... | 08/08/2006 |
| 7076107 | Method and apparatus for high speed data compression and decompression A subband processing apparatus useful for wavelet conversion and compression-decompression operation includes a plurality of memories and a plurality of analytic filter banks. The plurality of memories store an input signal in a way such that the input signal is div... | 07/11/2006 |
| 7061975 | Noncyclic digital filter and radio reception apparatus comprising the filter In accordance with the invention, in a nonrecursive digital filter, the number of times each bit of input data passes through a shift register is reduced to save power. Despreading data is sent to a first shift register and a second shift register, each having a num... | 06/13/2006 |
| 7050641 | Method of providing extension to a signal and apparatus therefor An sequence of data samples X[n] is point symmetrically extended to provide an extended sequence of samples x[n]. The points of symmetry (25) can be at the ends (17, 19) of the sequence (as in FIG. 4 (a)), such that the samples at the end... | 05/23/2006 |
| 7050517 | System and method suitable for receiving gigabit ethernet signals A detector system for high-speed Ethernet LAN is described. One embodiment includes a detector system having N one dimensional sequence detector equalizers in combination with an N-dimensional traceback decoder. The detector system detects N-dimensional symbols tran... | 05/23/2006 |
| 7013319 | Digital filter methods and structures for increased processing rates Digital filters are provided that include a converter and a data processor. The converter converts successive strings of M successive data elements that occur at a system rate Fs in an input data stream Din to M parallel data elements that resp... | 03/14/2006 |
| 7010370 | System and method for adjusting delay of an audio signal A method for adjusting a time delay between a first audio signal and a second audio signal is disclosed. The method includes generating the first audio signal from a buffer as a first data stream and generating the second audio signal from the buffer as a second dat... | 03/07/2006 |
| 6981011 | Precision complex sinusoid generation using limited processing A first value of a sinusoidal-shaped electronic signal is computed based on a Lagrange interpolation using an update phase-angle associated with the electronic signal, a first set of equally-spaced data-values that generally describe the sinusoidal function and a se... | 12/27/2005 |
| 6973144 | Apparatus and method for channel estimation used for link adaption with error feedback A method and an apparatus for a channel estimator comprising a plurality of distinct filters each of which has a set of different coefficients and each of which is selectively coupled to the input and output of the channel estimator. The channel estimator further co... | 12/06/2005 |
| 6952709 | Receiver, programmable circuit and method of calculating digital filters The invention offers a method of calculating digital filters enabling to multiplex various different filters with the aid of a programmable co-processor circuit comprising a calculation element and memory registers. The invention comprises making an anticipated calc... | 10/04/2005 |
| 6946902 | Filtering variable offset amplifier A current summing FIR filter can be implemented with multiple differential input stages and variable tail currents. The variable tail currents can be used to appropriately weight the present and previous digital input signals. The weighted outputs of the differentia... | 09/20/2005 |
| 6940896 | Method for seamlessly combining adjacent filters in a frequency channelizer An improved method is provided for seamlessly combining adjacent subchannels in a signal processing system. Each adjacent subchannel is defined to include a first and a second linear phase digital filter, where the filters are implemented using digital circuitry hav... | 09/06/2005 |
| 6809777 | Pixel calculating device A pixel calculating device for performing vertical filtering that includes 16 pixel processing units 1 to 16 and an input buffer group 22 storing 16 pieces of pixel data and filter coefficients. Each of the pixel processing units performs operations using the... | 10/26/2004 |
| 6625628 | Method and apparatus for digital filter A digital filter having a small amount of hardware is realized by constructing a cosine roll-off filter. In the filter the first and fifth multipliers and the second to fourth multipliers are respectively shared. Three selectors are provided corresponding... | 09/23/2003 |
| 6606641 | System for varying the dynamic range of coefficients in a digital filter A digital filter includes a plurality of filter cells, each of which includes circuitry to determine a coefficient for the filter cell, to adjust the coefficient in accordance with a gain that is used by each of the plurality of filter cells, and to multi... | 08/12/2003 |
| 6590931 | Reconfigurable FIR filter using CSD coefficient representation The present invention is directed to a reconfigurable finite impulse response (FIR) filter that processes data tap values with canonical sign digit (CSD) coefficients. The FIR filter according to the present invention includes a shift group associated wit... | 07/08/2003 |
| 6563869 | Digital signal processing circuit and audio reproducing device using it For a left-channel input audio signal, digital filters 30LL and 30LR are provided for reproduction of impulse responses used for locating an acoustic image outside the head of a listener, and for a right-channel input audio signal, digital filters 30RL an... | 05/13/2003 |
| 6400735 | Glitchless delay line using gray code multiplexer A glitchless delay line using a Gray code multiplexer is provided. The glitchless delay line combines a multi-tap delay circuit with the Gray code multiplexer. Specifically, the multi-tap delay circuit provides a plurality-of sequentially ordered delayed ... | 06/04/2002 |
