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| Number | Title | Issue Date |
| 8090755 | Phase accumulation A method for accumulation of information is described. The information is separated into first portions of MSBs and second portions of LSBs. The first and second portions are respectively input to a first adder and a second adder to provide first and second sums. Th... | 01/03/2012 |
| 8060547 | Pade approximation convert circuit of direct digital frequency synthesizer This invention relates to Pade approximation convert circuit of the direct digital frequency synthesizer in which a multiplier receives and multiplies a first input signal and a variable signal so as to produce a multiplication signal; a divider receives and divides... | 11/15/2011 |
| 7953782 | Digital forced oscillation by direct digital synthesis An opportunity is apparent to develop alternative circuitry. Simplified circuitry without artifacts tied to the clock that drives a digital frequency generator (DFG) is useful in a variety of tunable electronic devices. The present invention relates to digital frequ... | 05/31/2011 |
| 7912882 | Apparatus for generating clock pulses using a direct digital synthesizer The present invention relates to an apparatus for generating clock pulses using a Direct Digital Synthesizer (DDS). The present invention seeks to solve the problems of the conventional clock generator using a Phase Locked Loop (PLL) circuit where the output clock f... | 03/22/2011 |
| 7844650 | Pulse output direct digital synthesis circuit A clock signal generator responsive to a frequency control word and a reference clock signal having a reference clock frequency fref. The clock signal generator generates an output clock signal having a frequency fgen, wherein fgen i... | 11/30/2010 |
| 7606849 | Method and apparatus for improving the frequency resolution of a direct digital synthesizer The present invention is directed to the use of a DDS to generate a high purity reference signal with high frequency resolution by switching a frequency tuning word (FTW) between particular values for particular time durations to produce two or more closely spaced f... | 10/20/2009 |
| 7599977 | Direct digital synthesizer system and related methods A direct digital synthesizer (DDS) has reduced spurious signals and includes a DDS core that produces a digital representation of a signal to be synthesized. A plurality of DDS circuits are operatively connected to the DDS core, each having a digital-to-analog conve... | 10/06/2009 |
| 7577695 | High-order delta-sigma noise shaping in direct digital frequency synthesis A direct digital synthesis (DDS) circuit utilizes high order delta-sigma interpolators to remove frequency, phase and amplitude domain quantization errors. The DDS employs an n-bit accumulator operative for receiving an input frequency word (FCW) representing the de... | 08/18/2009 |
| 7539716 | Method and apparatus for improved direct digital frequency synthesizer An improved DDFS includes a minority-bit detector to permit a series of cascaded transformation stages to perform half or less than half of the rotational operations otherwise required by detecting whether the required rotation or non-rotation operations are in the ... | 05/26/2009 |
| 7506014 | Tunable multi-phase-offset direct digital synthesizer A plasma control system including a direct digital synthesizer (DDS) for generating more than one individual RF power signal, where the individual RF power signals are combined to define a combined RF power signal. The DDS includes an accumulator which receives a ph... | 03/17/2009 |
| 7480688 | Phase persistent agile signal source method, apparatus, and computer program product A phase persistent agile signal source method, apparatus, and/or computer program product provides a direct digital synthesizer (DDS) clock rate, provides a frequency tuning word (FTW) for a desired output frequency, provides a DDS update for a desired DDS update ra... | 01/20/2009 |
| 7421464 | System and method for introducing dither for reducing spurs in digital-to-time converter direct digital synthesis A direct digital synthesizer (DDS) (300) that uses a system for reducing spurious emissions in a digital-to-time converter (DTC) (317). The DDS (300) includes one or more dither sources (307) and a random access memory (RAM) (305).... | 09/02/2008 |
| 7383296 | Apparatus for fractional RF signal synthesis with phase modulation A method to improve the frequency resolution and phase noise of a synthesized RF signal results in superior instantaneous frequency change and phase modulation capability, wide frequency set ability, and suitability for implementation in a digital ASIC. The RF signa... | 06/03/2008 |
| 7356186 | Digital representation of audio waveforms using peak shifting to provide increased dynamic range A system allows greater dynamic range in fixed-width sample representations of waveforms. Known properties of the waveform are used to determine an unlikely, or impossible, data condition to be used as an exception condition. Samples following the exception conditio... | 04/08/2008 |
| 7295151 | Systems and methods for self-test of a radar altimeter Systems and methods for testing a signal generated by a Direct Digital Synthesizer (DDS) in a radar altimeter. In an embodiment of the method, a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based o... | 11/13/2007 |
| 7284025 | DDS pulse generator architecture A DDS pulse generator has an accumulator that accumulates a phase increment value to produce phase accumulator values, and has a lookup table that contains a digital representation of a pulse waveform such that a pulse output signal is produced from the lookup table... | 10/16/2007 |
| 7281025 | Triggered DDS pulse generator architecture A triggered DDS generator architecture accumulates a phase increment value in response to a DDS clock to generate phase accumulator values for addressing a waveform lookup table which contains a desired output signal. A time measurement circuit determines a time int... | 10/09/2007 |
| 7268594 | Direct digital synthesis with low jitter An FPGA having a programmable frequency output is provided that achieves a (theoretical) M-times reduction in output jitter from a conventional direct digital synthesis (DDS) circuit, by running M accumulator circuits in parallel and combining the outputs in a time-... | 09/11/2007 |
| 7242225 | Direct digital frequency synthesizer A frequency synthesizer according to the direct digital synthesis method is provided. The frequency synthesizer includes a phase accumulator for the cyclical incrementation of a phase signal by a phase increment M present at the input of the phase accumulator, a mem... | 07/10/2007 |
| 7221669 | Cellular telephone having improved in-band signaling for data communications over digital wireless telecommunications networks An inband signaling modem communicates digital data over a voice channel of a wireless telecommunications network. An input receives digital data. An encoder converts the digital data into audio tones that synthesize frequency characteristics of human speech. The di... | 05/22/2007 |
| 7209936 | Frequency locked digitally tuned oscillator synthesizer A synthesizer is disclosed and is digitally tuned and locked in a measured frequency. The synthesizer uses both the dual voltage control oscillator, each operating over less than an octave, in combination with the microwave doublers to produce a multi-octave RF outp... | 04/24/2007 |
| 7209937 | Method and apparatus for generation of arbitrary mono-cycle waveforms A waveform generator digitally synthesizes a waveform having a plurality of successive portions that can each be as short as one mono-cycle of the waveform, or a part of one mono-cycle. The waveform generator changes at least one of a frequency, a phase and an ampli... | 04/24/2007 |
| 7205917 | Pulse width modulator quantisation circuit The present invention relates to pulse width modulation (PWM) modulators, especially but not exclusively for digital audio applications; and to quantizers and power switching for the same. The present invention provides a pulse width modulation (PWM) modulator or co... | 04/17/2007 |
| 7205798 | Phase error correction circuit for a high speed frequency synthesizer Circuits, methods, and apparatus for reducing the phase error in an NCO clock output to reduce the clock jitter. This is particularly beneficial where the frequencies of the NCO output and reference signal are unrelated. One embodiment provides a circuit that correc... | 04/17/2007 |
| 7154431 | Signal synthesizer and method therefor A digital synthesizer includes a digital radio frequency memory (DRFM) for storing phase values and corresponding digital signals. The digital synthesizer includes a digital processing circuit receiving input from the DRFM, the circuit including tapped delay lines a... | 12/26/2006 |
| 7143125 | Method and apparatus for noise shaping in direct digital synthesis circuits A direct digital synthesizer (30) with noise shaping circuitry can comprise a ROM-less direct digital synthesizer having a quantizer (40) and a noise shaping loop incorporating the quantizer for shaping a quantization noise due to noise from the quanti... | 11/28/2006 |
| 7139326 | Image-canceling quadrature modulator and method Canceling images in a quadrature modulator includes frequency shifting the baseband signal and images; filtering the frequency shifted baseband signal and images; phase and frequency shifting the baseband signal and images; filtering the phase and frequency shifted ... | 11/21/2006 |
| 7139329 | Receiver in a radio communication system A receiver has a low spurious level and a high frequency precision without increasing power consumption of a local oscillator. The receiver comprises first and second local oscillators; a phase locked loop operating based on an output of the first local oscillator; ... | 11/21/2006 |
| 7124153 | Frequency converter and methods of use thereof An all-digital frequency conversion apparatus is provided that achieves frequency conversion using a simple phase detector and integer and fractional phase feedback information from a digital oscillator output. In an embodiment, a target phase accumulator unit gener... | 10/17/2006 |
| 7103622 | Direct digital synthesizer with output signal jitter reduction A method and apparatus for reducing unwanted harmonics in direct digital synthesizer (DDS) output. The method comprises the steps of providing a set of k phase-shifted clock signals, examining, in succession, each DDS accumulator state, and determining whether the D... | 09/05/2006 |
| 7095349 | Numerically controlled oscillator and method for operating the same A numerically controlled oscillator (NCO) is defined to include counter circuitry and integrator circuitry. The counter circuitry includes a first input for receiving a minimum count value, a second input for receiving a maximum count value, and a third input for re... | 08/22/2006 |
| 7092476 | Direct synthesis clock generation circuits and methods A clock generator includes input circuitry for receiving an input signal and generating a memory address therefrom. A memory stores digital data indexed by the memory address which represents at least a portion of an analog clock. A digital to analog converter conve... | 08/15/2006 |
| 7080304 | Technique for programming clocks in automatic test system A system and method for configuring an automatic test system to produce a plurality of clocks from a reference clock includes a user interface and software. The user interface receives a plurality of inputs that specify desired frequencies of the plurality of clocks... | 07/18/2006 |
| 7072920 | Method and apparatus for digital frequency conversion A general method is provided to achieve frequency conversion in an all-digital frequency conversion device that produces an output signal having a selectable phase and frequency that is substantially synchronous with the input signal to be converted. A multiplicity ... | 07/04/2006 |
| 7069283 | Method and circuit for calculating multiple of unit value and generating a periodic function In order to generate a multiple of a unit U, N times U, by a digital circuit is provided, where U is a rational number and N is a natural number, the method comprises the following steps (1) to (5). (1) Where A, B and C are natural numbers, A>1, B>C and U=A+C/B, the... | 06/27/2006 |
| 7065172 | Precision jitter-free frequency synthesis An electronic system (10) includes a phase-locked loop (30) and a frequency synthesis circuit (20), for generating a jitter-free output clock (CLK1, CLK2) at a desired frequency. The phase-locked loop (30) includes a voltage... | 06/20/2006 |
| 7064616 | Multi-stage numeric counter oscillator A numeric counter oscillator is disclosed comprising a quotient accumulator and a remainder accumulator. The quotient accumulator has a programmable input for receiving a QUOTIENT value, a reference clock input and a multi-bit output. The output is adapted for trans... | 06/20/2006 |
| 7050000 | Radar based application programmable waveform generator component An exemplary radar system includes a waveform generator that generates a control waveform. An in-phase and quadrature modulator receives the control waveform from the waveform generator and in turn generates a waveform output that is amplified by a power amplifier b... | 05/23/2006 |
| 7023368 | Digital-to-analog signal converting apparatus and method to extend usable spectrum over Nyquist frequency A digital-circuit return-to-zero device and method for digital-to-analog conversion is disclosed that uses an internal multiplexer alternatively selecting, or selecting in a scheduled fashion, digital input data and an expansion code. By the using the disclosed mult... | 04/04/2006 |
| 7023378 | Self-calibrating wideband phase continuous synthesizer and associated methods The synthesizer and method provide a relatively wideband swept frequency signal and include generating a first swept frequency signal with a first generator, and successively switching between different frequency signals with a second generator. Such switching creat... | 04/04/2006 |
