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| Number | Title | Issue Date |
| 8156169 | Signal processing method and signal processing circuit A signal processing method includes a first step of calculating a value indicating a value obtained by multiplying a ratio of the number of times of inputting the input signal having any one of values from p to m, where m is a maximum value of values of input signal... | 04/10/2012 |
| 8046397 | Computations of power functions using polynomial approximations A power function is approximated over an applicable data interval with polynomials determined by means of a Chebyshev minimax approximation technique. In some cases, multiple polynomials may be used to approximate the function over respective ranges of the desirable... | 10/25/2011 |
| 7987219 | Incremental umbrella sampling The present invention is an incremental umbrella sampling method to improve the performance of established sampling methods. It is sampling the state space by iteratively generating states xi,t and their weighting factors represented by Formula (a) by fit... | 07/26/2011 |
| 7984090 | Efficient function generator using case detection and output selection A function generator for a digital system includes a plurality of sub-function generators. Each sub-function generator has an input that receives a respective input value and has an output that provides a respective output value responsive to the respective input va... | 07/19/2011 |
| 7707235 | Free-running numerically-controlled oscillator using complex multiplication with compensation for amplitude variation due to cumulative round-off errors A method and apparatus for efficiently generating complex sinusoids of a desired frequency by multiplying a phasor by a predetermined value once every sampling interval, and using the highest order bits within the phasor to identify if the phasor is at an integer mu... | 04/27/2010 |
| 7702708 | Frequency/delay synthesizer architecture An apparatus employing control words to present a synthesized output signal having an output frequency and a delay with respect to an input signal includes: (a) A multiplexer receiving the input signal and having an output and an address input. (b) An output unit ge... | 04/20/2010 |
| 7702707 | Waveform generation A waveform generator for generating a smooth version of an original waveform which contains abrupt transitions, includes a phase accumulator incremented at successive sampling times to produce an output representative of the phase of the original waveform, a phase s... | 04/20/2010 |
| 7680868 | PCR elbow determination by use of a double sigmoid function curve fit with the Levenburg-Marquardt algorithm and normalization Systems and methods for determining characteristic transition values such as elbow values in sigmoid or growth-type curves, such as the cycle threshold (Ct) value in PCR amplification curves. A double sigmoid function with parameters determined by a Levenberg-Marqua... | 03/16/2010 |
| 7668894 | Computation of power functions using polynomial approximations A power function is approximated over an applicable data interval with polynomials determined by means of a Chebyshev minimax approximation technique. In some cases, multiple polynomials may be used to approximate the function over respective ranges of the desirable... | 02/23/2010 |
| 7634524 | Arithmetic method and function arithmetic circuit for a fast fourier transform A cyclic equation setting unit transforms and sets a Taylor series equation for calculating a sine function into a single cyclic equation common to terms of the Taylor series equation, the single cyclic equation having a new known number Q that is defined by multipl... | 12/15/2009 |
| 7631026 | Signal processing method and signal processing circuit A signal processing method includes a first step of calculating a value indicating a value obtained by multiplying a ratio of the number of times of inputting the input signal having any one of values from p to m, where m is a maximum value of values of input signal... | 12/08/2009 |
| 7610323 | Method and apparatus for initializing interval computations through subdomain sampling One embodiment of the present invention provides a system that uses a computer to evaluate a function within a domain using an interval computing technique. During operation, the system receives the function and the domain over which the function is to be evaluated.... | 10/27/2009 |
| 7562105 | Methods and apparatus for generating a delay using a counter Methods, apparatus, and articles of manufacture for generating a delay time using a counter are disclosed. In particular, the methods, apparatus, and articles of manufacture determine a number of loops value associated with the delay time and at least one characteri... | 07/14/2009 |
| 7555508 | Methods and apparatus for performing calculations using reduced-width data Methods, apparatus, and articles of manufacture for performing calculations using reduced-width data are disclosed. In particular, an example method determines reduced-width data values associated with generating and evaluating functions. Some of the reduced-width d... | 06/30/2009 |
| 7509362 | Non-linear function approximation using finite order polynomial in fixed-point arithmetic A system, method, and apparatus for calculating non-linear functions with finite order polynomials are presented herein. Use of finite order polynomials allow calculation of the non-linear functions using fixed point arithmetic operations resulting in significant co... | 03/24/2009 |
| 7472149 | Arithmetic unit for approximating function A look-up table outputs an initial value, an inclination of a straight line and a correction value in response to an entry-of a high-order bit string of an operand. An offset circuit calculates an offset of the low-order bit string. A correction circuit outputs the ... | 12/30/2008 |
| 7457838 | Methods and apparatus for performing calculations using reduced-width data Methods, apparatus, and articles of manufacture for performing calculations using reduced-width data are disclosed. In particular, an example method determines reduced-width data values associated with generating and evaluating functions. Some of the reduced-width d... | 11/25/2008 |
| 7409416 | Digital-to-time converter using cycle selection windowing A signal generator consistent with certain embodiments of the invention has a reference clock (34) producing a periodic sequence of reference clock output pulses. A window generator (38) generates a plurality of time windows through which a selected pl... | 08/05/2008 |
| 7395286 | Method for generating non-overlapping N-phases of divide-by-N clocks with precise 1/N duty ratio using a shift register A divide-by-N clock frequency divider producing N non-overlapping clocks each with precise 1/N duty ratio is implemented by a counter, a token generator and N-bit shift register. Every N clock cycles, a pulse is generated as a token from a logical combination of sig... | 07/01/2008 |
| 7366745 | High-speed function approximation Methods and apparatuses are presented for determining coefficients for a polynomial-based approximation of a function, by iteratively estimating a first coefficient, reducing the first coefficient to a lower precision to obtain a first limited-precision coefficient,... | 04/29/2008 |
| 7366746 | Finite impulse response filter method and apparatus Finite response filters (FIRs) are divided into partial filters that filter a same portion of image data to generate partial filtered results. The partial filtered results may be saved and later retrieved to generate complete filter outputs. ... | 04/29/2008 |
| 7327816 | High resolution synthesizer with improved signal purity An automatic test system using a DDS signal generator to create a signal with high spectral purity or a low jitter digital clock. The low jitter clock has variable frequency and is programmed to control other test functions, such as the generation of arbitrary wavef... | 02/05/2008 |
| 7328229 | Clock divider with glitch free dynamic divide-by change The circuit of this invention performs clock division with dynamic divide-by value change capability. This circuit provides low area and low latency. The clock divider is conventional except for the logic that handles the dynamic divide-by value change. When the div... | 02/05/2008 |
| 7325022 | Methods and apparatus for determining approximating polynomials using instruction-embedded coefficients Methods and apparatus for determining approximating polynomials using instruction-embedded coefficients are disclosed. In particular, the methods and apparatus use a plurality of coefficient values stored in a plurality of instructions. The coefficient values are as... | 01/29/2008 |
| 7321630 | Approximation method for series expansion of input function and system using the same An approximation method and system for series expansion of functions include the steps and functions, respectively, of: expanding an input function in Taylor series up to an (N−1)-th term; expanding the input function in Taylor series up to the N-th term; multiply... | 01/22/2008 |
| 7292247 | Dynamically determining directions of freedom for control points used to represent graphical objects The principles of the present invention relate to dynamically determining directions of freedom for control points used to represent graphical objects such as text. A computing system identifies a first function that represents a first constraint, solutions to the f... | 11/06/2007 |
| 7290020 | Electronic device to calculate and generate linear and non-linear functions Electronic device (10) to calculate linear functions and to calculate and generate non-linear functions, intended to process signals. The electronic device (10) is provided with a calculator unit (11) to calculate linear functions, a device (... | 10/30/2007 |
| 7283590 | Signal processing approach for channel coding based on inter-symbol-interference insertion An inter-symbol-interference (ISI) coder with mapper and linear filter and a technique of channel encoding deliberately inserts inter-symbol-interference (ISI) into the signal using a non-linear precoder to map map input symbol sequences into sequences of extended s... | 10/16/2007 |
| 7277906 | Method for determining an output value having a lowest error value from an input value The present invention teaches a method for generating an output value corresponding to an input value via a first function comprising a first section and a second section with the use of a lookup table, comprising: prestoring a plurality of first sampling points cor... | 10/02/2007 |
| 7277543 | Cryptographic combiner using two sequential non-associative operations A stream cipher cryptosystem includes a keystream generator receiving a key and providing a keystream. A cryptographic combiner combines a first binary data sequence and the keystream with two non-associative operations to provide a second binary data sequence. In e... | 10/02/2007 |
| 7269681 | Arrangement for receiving and transmitting PCI-X data according to selected data modes An integrated device (e.g., an integrated PCI bridge device) buffers received PCI bus strobe signals and distributes strobe signals for PCI receive data relative to the PCI data lines, enabling all PCI receive data to be latched using locally-generated PCI strobe si... | 09/11/2007 |
| 7266576 | Circuits and methods for implementing approximations to logarithms A method for approximating a base 2 logarithm of a binary input and the circuit to implement the method are disclosed. The circuit comprises means for determining the integer portion of the logarithm, a lookup table module, a residual function module, an adder modul... | 09/04/2007 |
| 7260592 | Addressing mode and/or instruction for providing sine and cosine value pairs The present invention relates to a method and system for providing sine and cosine value pairs in a processor. The method includes decoding a sine and cosine instruction having a predetermined source angle and generating an index value for a sine cosine table (SCT) ... | 08/21/2007 |
| 7251734 | Secure integrated circuit including parts having a confidential nature and method for operating the same The secure integrated circuit (1) further includes storage means (2) in which confidential data is stored, such as an encryption programme and at least an encryption key, and a microprocessor unit (3) for executing the encryption programme. Said... | 07/31/2007 |
| 7234899 | Cutting tool having a wiper nose corner The invention is directed towards cutting inserts having a top surface, a bottom surface, at least three side surfaces extending from the top surface to the bottom surface, and a nose corner connecting two adjacent side surfaces. The intersection of the cutting inse... | 06/26/2007 |
| 7236174 | Adaptively filtering outlines of typographic characters to simplify representative control data The principles of the present invention relate to adaptively filtering outlines of typographic characters to simply representative control data. A filtering module receives a set of control points (and instructions for connecting the control points) representing a g... | 06/26/2007 |
| 7203718 | Apparatus and method for angle rotation An angle rotator uses a coarse stage rotation and a fine stage rotation to rotate an input complex signal in the complex plane according to an angle θ. The coarse stage rotation includes a memory device storing pre-computed cosine θM and sine θM | 04/10/2007 |
| 7187382 | Iteratively solving constraints in a font-hinting language The principles of the present invention relate to iteratively solving constraints in a font-hinting language. A computing system accesses a more complex constraint that can not be natively expressed based on the vocabulary of the font-hinting language, the more comp... | 03/06/2007 |
| 7185036 | Look up table based upsampling and digital filtering A system and method are disclosed for processing a signal that includes receiving encoded data including a plurality of input symbols; generating an input symbol set from the plurality of input symbols; looking up a plurality of output samples for the input symbol s... | 02/27/2007 |
| 7171435 | Circuits, systems, and methods implementing approximations for logarithm, inverse logarithm, and reciprocal A digital signal system (30) for determining an approximate logarithm of a value of x having a base b is described. The system comprises circuitry for storing x as a digital representation, identifying a most significant digit (MSD) of the digital representat... | 01/30/2007 |
