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| Number | Title | Issue Date |
| 8166086 | Method and circuit for generating random numbers, and computer program product therefor A random number generator uses the output of a true random generator to alter the behavior of a pseudo-random number generator. The alteration is performed by a mixing logic that builds a random seed for the pseudo-random number generator and includes a generator of... | 04/24/2012 |
| 8024387 | Method for synthesizing linear finite state machines Method and apparatus for synthesizing high-performance linear finite state machines (LFSMs) such as linear feedback shift registers (LFSRs) or cellular automata (CA). Given a characteristic polynomial for the circuit, the method obtains an original LFSM circuit such... | 09/20/2011 |
| 7979482 | Random number generator configured to combine states of memory cells A random number generator includes a plurality of memory cells arranged in a series, a feedback processor for generating a feedback signal and for feeding the feedback signal into one of the memory cells, and a random number outputter formed to combine states of a g... | 07/12/2011 |
| 7895251 | Random number generating method and random number generating apparatus A mask circuit (2) masks a bit sequence of K bits by a predetermined bit pattern. An EXOR circuit (3) EXORs the masked bit sequence. An inverter (9) controls inversion/non-inversion of values of bits of a bit sequence which includes a bit value ... | 02/22/2011 |
| 7822797 | System and method for generating initial vectors Methods and systems are disclosed for generating random numbers and initial vectors. A random number generator generates one or more random numbers that are used to repetitively seed pseudo random number generators so that the pseudo random number generators generat... | 10/26/2010 |
| 7702706 | Configurable multi-step linear feedback shift register The state transition of a linear feedback shift register (LFSR) controlled by a clock (310) with length N and step size W, W being at least two, is accomplished via a next-state function (320). The next-state function deploys a state transition matrix ... | 04/20/2010 |
| 7668893 | Data generator having linear feedback shift registers for generating data pattern in forward and reverse orders Some embodiments of the invention includes a data generator. The data generator includes a data generating circuit having a combination of linear feedback shift registers and shift registers for generating a pseudo-random data pattern in a first order. The data gene... | 02/23/2010 |
| 7480687 | Pseudorandom number generator for a stream cipher A pseudorandom number generator includes a unit for providing a number of 2n sequences of numbers, n being greater than or equal to 2. The sequences of numbers are combined by a unit such that at first all the sequences of numbers are combined with one another in an... | 01/20/2009 |
| 7433906 | Method of updating a shift register There is disclosed a method of updating a pseudo noise code shift retiser in a noise code shift register in a software implemented CDMA system from a current value, including representing a tap polynomial as a tap polynomial binary sequence logically AND-ing the val... | 10/07/2008 |
| 7426528 | Method and device for calculating an iterated state for a feedback shift register arrangement A final state in a shift register arrangement is obtained from an initial state by means of N-fold iteration using an iteration rule prescribed by a characteristic polynomial f(x) of n-th order. To determine the final state, a tap mask which is characteristic of Nâ€... | 09/16/2008 |
| 7412057 | Fast-software-implemented pseudo-random code generator Embodiments of the present invention provide a fast, software-implemented data scrambling system for data communications. For pseudo-random codes that are periodic within a predetermined number of bits, a memory array may be populated with segments of the code, one ... | 08/12/2008 |
| 7398287 | Fast linear feedback shift register engine A method of generating a pseudo-noise sequence without masking a linear feedback shift register (LFSR) generator is provided. An offset pseudo-noise sequence is generated at a desired offset from a reference psuedo-noise sequence by determining a corresponding initi... | 07/08/2008 |
| 7389316 | Method and apparatus for true random number generation Method and apparatus for true random number generation is described. One aspect of the invention relates to a digital logic circuit that includes N logic gates, where N is an integer greater than two. For each logic gate in the N logic gates: a first input terminal ... | 06/17/2008 |
| 7383295 | Selective sequence generation method and apparatus A sequence generator is configured to be re-initialized to a value selected derived from a candidate group that is derived from a predetermined value. If and when the re-initializing is performed, it is fully performed within about one clock cycle of setting the seq... | 06/03/2008 |
| 7359968 | Pseudo-random n-out-of-N packet sampling A method for sampling n-out-of-N packets in a network. Initially, the packet index corresponding to the N packets is pseudo-randomly shuffled. The shuffle function rearranges a set of numbers pseudo-randomly with a one-to-one mapping and no overlap. One way to perfo... | 04/15/2008 |
| 7356551 | Method and apparatus of retaining maximum speed of flip-flop metastability based random number generators An apparatus, system and method for retaining the maximum speed of flip-flop metastability based random number generators includes a fixed delay unit having an input for receiving a common signal from a digital signal generator, and a variable delay unit having an i... | 04/08/2008 |
| 7356552 | VLSI implementation of a random number generator using a plurality of simple flip-flops A random number generator includes a plurality of groups of independent flip flops, each of the groups having different configurations. Each of the outputs of the plurality of groups of flip flops being connected in an exclusive-or (XOR) arrangement, with a latch co... | 04/08/2008 |
| 7352862 | Encryption method, communication system, transmission device, and data input device An encryption method includes the steps of (a) generating random data including a first part and a second part, the first part specifying an operation to be performed on plain text data and the second part being used in the operation, (b) performing the specified op... | 04/01/2008 |
| 7346834 | Randomizer systems for producing multiple-symbol randomizing sequences A system that produces one or more non-repeating randomizer sequences of up to 2m−1 or more m-bit symbols includes a randomizer circuit that is set up in accordance with a polynomial with primitive elements of GF(2m) as coefficients. The syst... | 03/18/2008 |
| 7340496 | System and method for determining the Nth state of linear feedback shift registers The Nth state of an n-stage linear feedback shift register (LFSR) used to generate pseudo random binary sequences or patterns, and which may be configured as a multiple input signature register (MISR) or single input signature register (SISR) to compress data and ge... | 03/04/2008 |
| 7340059 | Programmable scrambler and De-scrambler for digital telephony equipment A scrambler circuit for digital telephony equipment receives a sequence of input bits, generates the sequence of output bits based on the input bits and stores the sequence of output bits. The generating of the sequence of output bits includes selecting at least one... | 03/04/2008 |
| 7333583 | Information processing apparatus and data communication method An information apparatus switches a display at a predetermined area which includes at least a part of a portion where an electromagnetic-wave emitting unit used for data communications with a data storage device is disposed, according to data communication processin... | 02/19/2008 |
| 7325021 | VLSI implementation of metastability-based random number generator using delay ladders A random number generator includes a chain of pairs of D-type flip-flops 205, 215 . . . having D and L inputs, a chain of substantially identical cascaded upper buffers 210,220 . . . each having a predetermined delay d1 and respective output... | 01/29/2008 |
| 7317776 | Efficient pseudo-noise sequence generation for spread spectrum applications The invention solves the problem of efficiently generating pseudo noise sequences with an arbitrary offset delay. Novel and improved architectures are used, based on the matrix-vector pseudo noise generators. A first embodiment of this invention includes a plurality... | 01/08/2008 |
| 7315874 | Electronic circuit for random number generation A random number generator includes a flip-flop, and a pair of independent free-running oscillators having a respective set of 4 switches controlled with a non-inverted and inverted output of the flip-flop. An output from each of the oscillators is fed back to their ... | 01/01/2008 |
| 7313162 | Apparatus and method for calculating and implementing a Fibonacci mask for a code generator An apparatus and method for calculating and implementing a Fibonacci mask for a code generator is disclosed herein. The first step receives a desired code offset from a reference code state in a Fibonacci field. Next, a field vector in a Galois field with the same c... | 12/25/2007 |
| 7309017 | Secure physical documents, and methods and apparatus for publishing and reading them A security document, comprises a printed document and one or more memory circuits adapted to be read wirelessly attached to or incorporated within the printed document, wherein data in the memory circuit is protected from access by an unauthorised reader, and wherei... | 12/18/2007 |
| 7299355 | Fast SHA1 implementation Provided is an architecture (hardware implementation) for an authentication engine to increase the speed at which SHA1 multi-loop and/or multi-round authentication algorithms may be performed on data packets transmitted over a computer network. As described in this ... | 11/20/2007 |
| 7293054 | Random number source and associated methods A random number source includes a ring oscillator generating an internal clock signal having random phase noise, and a first linear feedback shift register connected to the ring oscillator. A counter is connected to a first tap of the first linear feedback shift reg... | 11/06/2007 |
| 7286589 | Method and apparatus for generation of downlink scrambling code in wideband CDMA mobile devices An initialization method is performed to initialize the states for producing downlink scrambling code for a wideband code division multiple access (WCDMA) mobile device. The initialization method uses an auxiliary linear feedback shift register (x-LFSR) advance the ... | 10/23/2007 |
| 7283926 | Counter circuits and distance estimation methods Counting circuits applied to distance estimation for ultra wideband (UWB) application, in which a first counting unit generates a sequence of pseudo-random number series not including zero, a first recoding unit records a first series and a second series from the se... | 10/16/2007 |
| 7277543 | Cryptographic combiner using two sequential non-associative operations A stream cipher cryptosystem includes a keystream generator receiving a key and providing a keystream. A cryptographic combiner combines a first binary data sequence and the keystream with two non-associative operations to provide a second binary data sequence. In e... | 10/02/2007 |
| 7269258 | Cryptographic key, encryption device, encryption/decryption device, cryptographic key management device, and decryption device A cryptographic key 1 constituted to be freely attachable and detachable to/from a personal computer 2 encrypting and decrypting data by use of a cipher key includes: a pseudo random number generator 14 for generating a pseudo random number of a... | 09/11/2007 |
| 7266575 | Random number generator which can generate a random number based on an uniform distribution A random number generator includes a random pulse generator, a scrambler and a counter. The random pulse generator generates a plurality of random pulses. The scrambler generates an initial value. The counter generates a random number code based on the initial value... | 09/04/2007 |
| 7263470 | Digital gaussian noise simulator A Gaussian noise is simulated by discrete analogue ri,j. A first parameter α and pluralities of first and second integers i and j are selected. A plurality of points i,j are identified and a magnitude si,j is calculated for each point based on... | 08/28/2007 |
| 7260591 | Method for synthesizing linear finite state machines Method and apparatus for synthesizing high-performance linear finite state machines (LFSMs) such as linear feedback shift registers (LFSRs) or cellular automata (CA). Given a characteristic polynomial for the circuit, the method obtains an original LFSM circuit such... | 08/21/2007 |
| 7257149 | Obtaining initial code synchronization in a CDMA communication system A code detector which may rapidly obtain initial code synchronization by generating different phases of a pseudo noise (PN) codes by a plurality of PN code generators. Also, the code detector implements multipliers in the code detector to perform simple and rapid mu... | 08/14/2007 |
| 7251734 | Secure integrated circuit including parts having a confidential nature and method for operating the same The secure integrated circuit (1) further includes storage means (2) in which confidential data is stored, such as an encryption programme and at least an encryption key, and a microprocessor unit (3) for executing the encryption programme. Said... | 07/31/2007 |
| 7248696 | Dynamic system bus encryption using improved differential transitional encoding The present invention provides data encryption for a differential bus employing transitional coding. The present invention maps, encodes and encrypts input data as a logic status for a given bus transfer cycle. The mapping, encoding and encrypting of the input data ... | 07/24/2007 |
| 7243117 | Random number generator and probability generator A random number generator includes a flip-flop in which an output state (0 or 1) becomes definite according to a phase difference between signals inputted to two input units, a delay unit for producing the phase difference in these two input signals, and a feedback ... | 07/10/2007 |
