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"I hate what they've done to my child...I would never let my own children watch it. "
Vladimir Zworykin, television pioneer ; Talking about an invention in which he played a critical role.
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| Number | Title | Issue Date |
| 7441197 | Risk management information interface system and associated methods A graphical and interactive interface system manages risk management information. A secure database stores risk management information that is accessible by authorized access through a network. A graphics interface generates graphic data of the risk management infor... | 10/21/2008 |
| 7363280 | Methods for multi-objective optimization using evolutionary algorithms In the field of multi-objective optimization using evolutionary algorithms conventionally different objectives are aggregated and combined into one objective function using a fixed weight when more than one objective needs to be optimized. With such a weighted aggre... | 04/22/2008 |
| 7272585 | Operation circuit and operation control method thereof A product-sum operation circuit includes a pulse width/digital conversion circuit (9) which converts a pulse signal having a pulse width representing an operand value into a digital signal, a sorting circuit (4) which outputs, in descending or ascendin... | 09/18/2007 |
| 7035835 | High-precision current-mode pulse-width-modulation circuit A current-mode pulse-width-modulation (PWM) circuit converts analog current signals into pulse signals. The PWM circuit includes a first I-V converter and one or more second I-V converters, each of the one or more second I-V converters being coupled to one of the cu... | 04/25/2006 |
| 6980656 | Chaotic communication system and method using modulation of nonreactive circuit elements A chaotic communication system employs transmitting and receiving chaotic oscillating circuits. One improvement to first-generation systems is the ability to modulate a nonreactive element in the transmitting circuit, thus increasing modulation bandwidth. Other feat... | 12/27/2005 |
| 6844582 | Semiconductor device and learning method thereof A learning method of a semiconductor device of the present invention comprises a neuro device having a multiplier as a synapse in which a weight varies according to an input weight voltage, and functioning as a neural network system that processes analog data, compr... | 01/18/2005 |
| 6754645 | Voltage-mode pulse width modulation VLSI implementation of neural networks A voltage-mode pulse width modulation (PWM) VLSI implementation of neural networks, comprising: a voltage-pulse converter for converting an input voltage into a neuron-state pulse; a synapse multiplier, including a multiplier cell for multiplying the neuron-state pu... | 06/22/2004 |
| 6625588 | Associative neuron in an artificial neural network An associative artificial neuron and method of forming output signals of an associative artificial neuron includes receiving a number of auxiliary input signals; forming from the auxiliary input signals a sum weighted by coefficients and applying a non-li... | 09/23/2003 |
| 6601049 | Self-adjusting multi-layer neural network architectures and methods therefor A method and apparatus for using a neural network to process information includes multiple nodes arrayed in multiple layers for transforming input arrays from prior layers or the environment into output arrays for subsequent layers or output devices. Lear... | 07/29/2003 |
| 6405184 | Process for producing fault classification signals A method for generating fault classification signals which identify faulty loops which develop in a multiphase energy supply network observed in the event of a fault from a protective device with a starting arrangement. To be able to generate such fault c... | 06/11/2002 |
| 6341275 | Programmable and expandable hamming neural network circuit A Hamming neural network circuit which can be programmed and expanded is disclosed. The Hamming neural network includes an I/O circuit for inputting and outputting a plurality of standard patterns. A bi-directional transmission gate array is connected to ... | 01/22/2002 |
| 6047276 | Cellular neural network to implement the unfolded Chua's circuit A neural cellular network for implementing a so-called Chua's circuit, and comprising at least first, second and third cells having respective first and second input terminals and respective state terminals, the first and second input terminals being to r... | 04/04/2000 |
| 6041322 | Method and apparatus for processing data in a neural network A digital artificial neural network (ANN) reduces memory requirements by storing sample transfer function representing output values for multiple nodes. Each nodes receives an input value representing the information to be processed by the network. Additi... | 03/21/2000 |
| 5983211 | Method and apparatus for the diagnosis of colorectal cancer A process is set forth in which cancer of the colon is assessed in a patient. The probabilities of developing cancer involves the initial step of extracting a set of sample body fluids from the patient. Fluids can be evaluated to determine certain marker ... | 11/09/1999 |
| 5875439 | Nonrecurrent binary code recognizer A nonrecurrent version of the Neural Network Binary Code Recognizer is disclosed. This Nonrecurrent Binary Code Recognizer, which decodes an input vector of n analog components into a decoded binary word of n bits, comprises an analog-to-digital converter... | 02/23/1999 |
| 5717833 | System and method for designing fixed weight analog neural networks A system and method for designing a fixed weight analog neural network to perform analog signal processing allows the neural network to be designed with off-line training and implemented with low precision components. A global system error is iteratively ... | 02/10/1998 |
| 5696883 | Neural network expressing apparatus including refresh of stored synapse load value information A self-organizable neural network expressing unit includes a plurality of neuron units electronically expressing nerve cell bodies, and a plurality of synapse expressing units electronically expressing synapses for coupling neuron units through programmed... | 12/09/1997 |
| 5687292 | Device and method for determining a distribution of resources of a physical network A device for distributing resources of a given physical network among logical links by subdividing physical link capacities into logical links using an algorithm. The device comprises a first neural network, in which one part of the algorithm is implement... | 11/11/1997 |
| 5666468 | Neural network binary code recognizer A neural network binary code recognizer for decoding n-bit binary code words. This apparatus includes inputs for inputting n signals into the recognizer, each of the n signals representing a bit value of an n-bit binary code word, which may or may not be ... | 09/09/1997 |
| 5648926 | Silicon neuron An integrated circuit having a plurality of interdependent differential pairs of CMOS transistors emulates the functional characteristics of a biological neuron. The gate voltage of a first one of each pair of transistors is settable to a threshold value ... | 07/15/1997 |
| 5632006 | Circuit and method of error correcting with an artificial neural network An artificial neural network performs error correction on an input signal vector. The input signal vector is process in a forward direction through synapses in each of a plurality of neurons for providing an output signal from each of the neurons. The out... | 05/20/1997 |
| 5630021 | Hamming neural network circuit A Hamming neural network circuit is provided with N binary inputs and M exemplar template outputs, and has a template matching calculation subnet and a winner-take-all subnet. The template matching calculation subnet includes M first neurons in which M ex... | 05/13/1997 |
| 5627943 | Neural network processor including systolic array of two-dimensional layers The invention provides a pattern recognition processing apparatus and a technique for realizing a neural network of a complex structure within the processing apparatus. The apparatus includes a neural network having two-dimensional layers connected to for... | 05/06/1997 |
| 5542054 | Artificial neurons using delta-sigma modulation An artificial neuron for use in a neural processing network comprises a plurality of input signal lines, an arrangement for computing a nonlinear function of the sum of the inputs multiplied by associated weights, and a saturating delta-sigma modulator wh... | 07/30/1996 |
| 5530393 | Low power analog absolute differencing circuit and architecture A low power analog absolute differencing circuit and architecture is disclosed. The circuit includes an integrating amplifier with an input node connected to a common integration line. The common integration line is connected to a set of analog comparison... | 06/25/1996 |
| 5519811 | Neural network, processor, and pattern recognition apparatus Apparatus for realizing a neural network of a complex structure, such as the Neocognitron, in a neural network processor comprises processing elements corresponding to the neurons of a multilayer feed-forward neural network. Each of the processing element... | 05/21/1996 |
| 5517139 | Non-linear circuit and chaotic neuron circuit using the same A non-linear circuit includes a first variable resistor one end of which is applied with an input signal, an amplifier whose inverting input is connected to the other end of the first variable resistor and whose non-inverting input is connected to ground,... | 05/14/1996 |
| 5509105 | Electronic neuron apparatus A multi-well diode is disclosed which can be used with other electronic components as an electronic neuron circuit. The multi-well diode has an S-shaped current-voltage characteristic curve at forward bias whereby it remains in a low conductance state unt... | 04/16/1996 |
| 5463717 | Inductively coupled neural network A data processing system based on the concept of a neural network includes a normalizing circuit and driving elements. Each driving element has an output inductor magnetically coupled to an input inductor of the normalizing circuit. In the normalizing cir... | 10/31/1995 |
| 5438293 | Low power analog absolute differencing circuit and architecture A low power analog absolute differencing circuit includes an integrating amplifier with an input node connected to a common integration line. The common integration line is connected to a set of analog comparison circuits to form an analog vector absolute... | 08/01/1995 |
| 5412256 | Neuron for use in self-learning neural network A neuron for use in a self-learning neural network comprises a current input node at which a plurality of synaptic input currents are summed using Kirchoff's current law. The summed input currents are normalized using a coarse gain current normalizer. The... | 05/02/1995 |
| 5381516 | Binary resistor network and its use for labelling related components of digitised images in artificial vision A binary resistor network is provided for the labelling of related components of binary or binary-converted images and for artificial vision comprising a plurality of peaks each joined by arches forming binary resistors. Each peak is provided with an elem... | 01/10/1995 |
| 5371834 | Adaptive neuron model--an architecture for the rapid learning of nonlinear topological transformations A method and an apparatus for the rapid learning of nonlinear mappings and topological transformations using a dynamically reconfigurable artificial neural network is presented. This fully-recurrent Adaptive Neuron Model (ANM) network has been applied to ... | 12/06/1994 |
| 5359700 | Neural network incorporating difference neurons An artificial neural network incorporating difference type, non-MP (McCullough-Pitts) neuron cells and a method and apparatus for training this network. More specifically, the output of each neuron cell is a nonlinear mapping of a distance metric of a dif... | 10/25/1994 |
| 5355528 | Reprogrammable CNN and supercomputer This invention has 3 parts. Part 1 proposes a new CNN universal chip architecture with analog stored programs and time-multiplex templates. This breakthrough replaces hundreds of dedicated CNN chips with a single programmable, real-time VLSI chip with com... | 10/11/1994 |
| 5355438 | Weighting and thresholding circuit for a neural network An analog circuit which performs weighting and thresholding for a neural network. Each neuron of the neural network includes an operational amplifier receiving an input signal, the output of which is connected to a transistor. The transistor conducts only... | 10/11/1994 |
| 5341051 | N-dimensional basis function circuit The circuit generates an output value of an N-dimensional basis function. The circuit includes a string of sub-circuits, each sub-circuit computing a one-dimensional basis function. Each lower dimension sub-circuit is coupled to the adjacent higher dimens... | 08/23/1994 |
| 5329610 | Neural network employing absolute value calculating synapse A neural network employing absolute difference calculating synapse cells comprising a pair of floating gate devices coupled in parallel between an internal cell node and column line of the network. The network further includes a switched-capacitor circuit... | 07/12/1994 |
| 5319737 | Network structure for path generation A network structure for path generation includes an operational amplifier circuit (200) implementation. The circuit (200) implements a finite difference approximation template for computing the weighted sum of its four "neighbors." The circuit implementat... | 06/07/1994 |
| 5315163 | Analogic neuronal network The network comprises cells each constituted by a first channel (4, 4') of a material having selectively a superconductive state and a resistive state, refrigeration apparatus to maintain the first channel at a temperature below that which ensures superco... | 05/24/1994 |
