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| Number | Title | Issue Date |
| 8086438 | Method and system for instruction-set architecture simulation using just in time compilation A method of simulating a program. Compiled and interpretive techniques are combined into a just-in-time cached compiled technique. When an instruction of a program simulation is to be executed at run-time, a table of compiled instructions is accessed to determine wh... | 12/27/2011 |
| 8060356 | Processor emulation using fragment level translation Processor emulation using fragment level translation is disclosed. A target system having a main target processor, a secondary target processor element and an instruction memory associated with the secondary target processor element may be emulated with a host syste... | 11/15/2011 |
| 8024172 | Method and system for emulating tape libraries A method and system for emulating tape library commands is disclosed. Tape library commands implemented in response to commands received from a data protection application are emulated in a disk based storage medium so that existing data protection applications may ... | 09/20/2011 |
| 7983894 | Data processing A data processor is arranged to execute software to emulate an instruction-handling processor having an instruction preparation stage and an instruction execution stage. The software is operable first to emulate the instruction preparation stage in respect of a grou... | 07/19/2011 |
| 7957952 | Translation block invalidation prehints in emulation of a target system on a host system Emulation systems and method involving invalidating blocks of translated code in emulation of a target system on a host system in are disclosed. One or more blocks of target system code are translated by the host system to produce one or more corresponding blocks of... | 06/07/2011 |
| 7899663 | Providing memory consistency in an emulated processing environment Memory consistency is provided in an emulated processing environment. A processor architected with a weak memory consistency emulates an architecture having a firm memory consistency. This memory consistency is provided without requiring serialization instructions o... | 03/01/2011 |
| 7885806 | Simulation method and simulation system of instruction scheduling There is provided a simulation method of instruction scheduling comprising detecting a loop from an instruction sequence to be simulated, registering an instruction scheduling target instruction sequence in a loop detection state, comparing a current scheduling targ... | 02/08/2011 |
| 7818162 | Information processing device, information processing method, semiconductor device, and computer program for executing instructions by using a plurality of processors An information processing device is provided for realizing the interpreter method emulation by using a processor having a performance requested for the compile method emulation. In one embodiment, an information processing device includes a host processor 1 f... | 10/19/2010 |
| 7792666 | Translation block invalidation prehints in emulation of a target system on a host system Emulation systems and method involving invalidating blocks of translated code in emulation of a target system on a host system in are disclosed. One or more blocks of target system code are translated by the host system to produce one or more corresponding blocks of... | 09/07/2010 |
| 7783471 | Communication device for emulating a behavior of a navigation device The invention provides a communication device for emulating a behavior of a navigation device in response to executing a device firmware program installed on the navigation device. The communication device comprises a provider for providing information relating to t... | 08/24/2010 |
| 7765095 | Conditional branching in an in-circuit emulation system An In-Circuit Emulation system. A real microcontroller (device under test) operates in lock-step with a virtual microcontroller so that registers, memory locations and other debugged data can be retrieved from the virtual microcontroller without disrupting operation... | 07/27/2010 |
| 7752030 | Virtualization as emulation support A processor based system including a processor and a storage subsystem communicatively coupled with the processor, an operating system stored in the storage subsystem to schedule instructions for execution, including a driver in which are included a virtual machine ... | 07/06/2010 |
| 7739100 | Emulation system, method and computer program product for malware detection by back-stepping in program code A system, method, and computer program product are provided for detecting malware. In use, a search is conducted for known elements of computer code. Upon the detection of at least one known element of computer code, various operations are performed. In particular, ... | 06/15/2010 |
| 7729898 | Methods and apparatus for implementing logic functions on a heterogeneous programmable device A heterogeneous device including multiple types of resources is provided to implement multiple logic functions. Logic functions are provided with multiple configuration options. In one example, an optimal set of configuration options along with a target device are s... | 06/01/2010 |
| 7684973 | Performance improvement for software emulation of central processor unit utilizing signal handler As fast and powerful commodity processors have been developed, it has become practical to emulate on platforms built using commodity processors the proprietary hardware systems of powerful older computers. High performance is typically a key requirement for a system... | 03/23/2010 |
| 7617088 | Interpage prologue to protect virtual address mappings In a computer which translates instructions from a target instruction set to a host instruction set, a method for determining validity of a translation of a target instruction linked to an earlier translation including the steps of testing a memory address of a targ... | 11/10/2009 |
| 7617087 | Memory management method for dynamic conversion type emulator A construction of the present invention includes a procedure of setting in advance a storing area in a converted instruction storing area table for recording a corresponding relation between a program before conversion and a storing address of a converted program at... | 11/10/2009 |
| 7606699 | Modeling of forecasting and production planning data A forecast class is defined that represents forecasts of different types and identifies relationships of a forecast with various entities related to the forecast. ... | 10/20/2009 |
| 7596484 | Network node emulator and method of node emulation A method and apparatus is provided for network node emulation, including a node emulator, comprising a node interface, a memory, and a CPU. A method of generating an emulated network node includes the steps of generating an emulation script using a network node emul... | 09/29/2009 |
| 7593841 | Emulation export sequence with distributed control Emulation information including emulation control information and emulation data is exported from a data processor by arranging the emulation information into information blocks, and outputting a sequence of the information blocks from the data processor. Some of th... | 09/22/2009 |
| 7574346 | Kernel emulator for non-native program modules Described herein is a technology facilitating the operation of non-native program modules within a native computing platform. This invention further generally relates to a technology facilitating the interoperability of native and non-native program modules within a... | 08/11/2009 |
| 7571090 | Emulating a host architecture in guest firmware Systems and methods provide for emulating a host architecture in guest firmware. One aspect of the systems and methods comprises determining whether an emulated instruction would cause a transition into a legacy mode. A current execution context is converted into a ... | 08/04/2009 |
| 7496494 | Method and system for multiprocessor emulation on a multiprocessor host system A method (and system) for executing a multiprocessor program written for a target instruction set architecture on a host computing system having a plurality of processors designed to process instructions of a second instruction set architecture, includes representin... | 02/24/2009 |
| 7496495 | Virtual operating system device communication relying on memory access violations Attempts by drivers of a virtualized legacy computer game to communicate with nonexistent legacy game system hardware are converted into calls to actual hardware of the host computer game system. An access control list (ACL) restricting and/or reducing page permissi... | 02/24/2009 |
| 7434210 | Interposing library for page size dependency checking A method for checking page size dependency including generating an interposing library comprising a first modified interface, wherein the first modified interface is dependent on a native page size, intercepting a call into a kernel by the interposing library, where... | 10/07/2008 |
| 7415323 | Control apparatus and program for vehicles, and method for developing the program A vehicle control apparatus comprises: a computer operable to execute a control program, a first memory storing the control program, and a second memory storing the produced data. The control program includes: a platform program for inputting data from a hardware de... | 08/19/2008 |
| 7406406 | Instructions to load and store containing words in a computer system emulator with host word size larger than that of emulated machine Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a “containing” word stored in the memory of the host machine... | 07/29/2008 |
| 7403887 | Emulated memory management A first software program executing on a computing device emulates a second computing device executing a software program using emulated memory. The first software program permits the second software program to perform an operation on a contiguous portion of the emul... | 07/22/2008 |
| 7394409 | Method of doing pack ASCII zSeries instructions Emulation methods are provided for two PACK instructions, one for Unicode data and the other for ASCII coded data in which processing is carried out in a block-by-block fashion as opposed to a byte-by-byte fashion as a way to provide superior performance in the face... | 07/01/2008 |
| 7392172 | Providing virtual device access via firmware Hardware access is provided for an operating system by allocating a portion of firmware address space of a data processing arrangement for use as a virtualized data interface that emulates a first hardware device. The virtualized data interface is presented to the o... | 06/24/2008 |
| 7392527 | Driver-specific context for kernel-mode shimming The kernel is a shared environment. Accordingly, many different kernel-mode drivers utilize services provided by the kernel. Furthermore, when shimming of drivers is necessary, it is desirable to support shim reuse amongst drivers with similar problems or issues, ra... | 06/24/2008 |
| 7376546 | User configurable ultra320 SCSI target device simulator and error injector Disclosed is a SCSI target device simulator consisting of a personal computer, a SCSI host adapter board, and simulator software. The SCSI target device simulator is employed to test SCSI host adapter systems by simulating multiple SCSI target devices for test purpo... | 05/20/2008 |
| 7373463 | Antifraud method and circuit for an integrated circuit register containing data obtained from secret quantities An integrated circuit and an antifraud method implementing at least one operation involving at least one secret quantity, and functionally including upstream and downstream of the operator at least one source register and at least one destination register, respectiv... | 05/13/2008 |
| 7373647 | Method and system for optimizing file table usage An operating system directed to using special properties of a common inter-process communications mechanism (IPC), namely UNIX domain socket-pairs or stream-pipes alternatively as a storage medium for file-descriptors of UNIX processes. When a file-descriptor is wri... | 05/13/2008 |
| 7370179 | Microprocessor The invention relates to a microprocessor having a plurality of components which are selected from registers (14,16), arithmetic logic units (30,32), memory (36,38), input/output circuits and other similar components where the plurality of compo... | 05/06/2008 |
| 7366650 | Software and hardware simulation A verification environment is provided that co-verifies a software component 8 and a hardware component 10. Within the same environment using a common test controller 18 both hardware stimuli and software stimuli may be applied to their respecti... | 04/29/2008 |
| 7363364 | Methods, systems, and products for verifying integrity of web-server served content Methods, systems, and products are disclosed for verifying the integrity of web server content. One method receives results from a client-resident integrity program operating on a client computer. The client-resident integrity program verifies integrity of a web res... | 04/22/2008 |
| 7363600 | Method of simulating bidirectional signals in a modeling system A method of modeling a design in a high level modeling system that supports unidirectional data flow, may comprise identifying a bus-block to represent a connectivity of a bi-directional bus in an system. The bus-block may be represented in serial relationship with ... | 04/22/2008 |
| 7360062 | Method and apparatus for selecting an instruction thread for processing in a multi-thread processor The selection between instruction threads in a SMT processor for the purpose of interleaving instructions from the different instruction threads may be modified to accommodate certain processor events or conditions. During each processor clock cycle, an interleave r... | 04/15/2008 |
| 7360031 | Method and apparatus to enable I/O agents to perform atomic operations in shared, coherent memory spaces Method and apparatus to enable I/O agents to perform atomic operations in shared, coherent memory spaces. The apparatus includes an arbitration unit, a host interface unit, and a memory interface unit. The arbitration unit provides an interface to one or more I/O ag... | 04/15/2008 |
