Did You Know...
...that Robert Adler has the dubious distinction of being the Father of the Couch Potato? Back in 1955 Adler was employed by what was then Zenith Radio Corp., where he was charged to invent something that would allow viewers to turn down the TV volume without leaving their chairs. After a series of flops (such as a wired contraption that people tripped over), Adler hit on the idea of using sound waves. Thus the Remote Control was born...
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| Number | Title | Issue Date |
| 8185338 | Low pin interface testing module A low pin interface module is provided for testing an integrated circuit. The interface module includes an input-output module, a controlling module, a processing module and a storage module specific to the integrated circuit to be tested. The interface module reduc... | 05/22/2012 |
| 8150647 | Electric device and diagnostic apparatus An electric device includes a plurality of circuits that operate in synchronization with a clock signal, a plurality of flip-flops each of which acquires a data value of a signal from a corresponding one of the plurality of circuits in synchronization with the clock... | 04/03/2012 |
| 8136082 | Method for testing integrated circuits A method of testing an integrated circuit. The method includes selecting a set of physical features of nets and devices of the integrated circuit, the integrated circuit having pattern input points and pattern observation points connected by the nets, each of the ne... | 03/13/2012 |
| 8117004 | Testing module, testing apparatus and testing method To increase the overall efficiency of a test apparatus, provided is a test module that includes an instruction information storage section that stores instruction information indicating an order in which basic patterns are expanded; a basic pattern data storage sect... | 02/14/2012 |
| 8103476 | Abnormal simulation signal analysis methods and abnormal signal simulation analysis module for 4˜20mA instrumental system The present invention relates to a negative pulse transient signal analysis methods and negative pulse transient signal analysis module for a PC base simulation equivalent circuit capable of grasping and improving error causes through an abnormal signal analysis aft... | 01/24/2012 |
| 8103475 | Apparatus for testing multiple conductor wiring and terminations for electronic systems An apparatus for testing connections in a system has a plurality of inputs each adapted to couple to a test point in the system under test and a switching module. The switching module includes a first output selectively coupled to receive a first group of one or mor... | 01/24/2012 |
| 8078424 | Test apparatus Provided is a test apparatus 10, which includes: a plurality of test modules 150, each of which is connected to any of the plurality of devices under test 100 to supply a test signal to the connected device under test 100; a plurality of ... | 12/13/2011 |
| 8060333 | Test apparatus and test method Provided is a test apparatus that tests a device under test, including a pattern list storage section that stores a plurality of pattern lists that each designate, in a prescribed order, the test patterns to be output by the device under test, and a pattern list pro... | 11/15/2011 |
| 8041531 | Burn-in test apparatus A burn-in test apparatus and a semiconductor device using the same are disclosed. The burn-in test apparatus includes a flag signal generating unit configured to receive an external input signal and an external address externally inputted for a burn-in test and gene... | 10/18/2011 |
| 8036848 | Semiconductor wafer testing apparatus and method of testing semiconductor wafer In a method of testing a semiconductor wafer, semiconductor chips of a predetermined number are selected from among a plurality of semiconductor chips formed on a semiconductor wafer, and a first test is performed on I/O pins of each of the selected semiconductor ch... | 10/11/2011 |
| 7987066 | Components and configurations for test and valuation of integrated optical busses An apparatus and method is provided for the testing of an optical bus, that method having: loading transmission test data and address information for at least one receiving cell via an electronic bus in a first register; setting a clock rate for the optical bus; emp... | 07/26/2011 |
| 7970569 | Apparatus and method for connection test on printed circuit board A connection test apparatus includes a controlling section, controlling each connection test device to switch the operation mode between the first and the second modes such that a first connection test device among the connection test devices is in the first mode an... | 06/28/2011 |
| 7971176 | Method for testing integrated circuits A method of testing an integrated circuit. The method includes selecting a set of physical features of nets and devices of the integrated circuit, the integrated circuit having pattern input points and pattern observation points connected by the nets, each of the ne... | 06/28/2011 |
| 7962304 | Device for thorough testing of secure electronic components An apparatus including a test circuit, an output circuit and a control circuit. The test circuit may be configured to generate test data in response to one or more test vectors. The output circuit may be configured to present data in a first mode and prevent present... | 06/14/2011 |
| 7899641 | Testable electronic circuit An electronic circuit contains groups of flip-flops (12a-c), coupled to data terminals (11a-c) of the circuit and to a functional circuit (10). Each group (12a-c) has a clock input for clocking th... | 03/01/2011 |
| 7890286 | Test circuit for performing multiple test modes A test circuit includes a first reset pulse generator configured to generate a first reset pulse when a test mode is performed or when power is up, a test mode maintenance signal generator configured to provide a test mode maintenance signal activated in response to... | 02/15/2011 |
| 7890285 | Scalable integrated tool for compliance testing Methods, tools, systems and computer readable media for compliance testing instrumentation and/or software. Data from one or more analytical instruments and/or software is inputted, and calculations are performed on the data to produce one or more outputs. At least ... | 02/15/2011 |
| 7844411 | Semiconductor integrated circuit A temperature detector sets the level of a temperature detecting signal to a level indicating a high temperature state, detecting that the chip temperature is higher than a first boundary temperature. The temperature detector sets the level of thereof to a level ind... | 11/30/2010 |
| 7840368 | Test circuit for performing multiple test modes A test circuit includes a first reset pulse generator configured to generate a first reset pulse when a test mode is performed or when power is up, a test mode maintenance signal generator configured to provide a test mode maintenance signal activated in response to... | 11/23/2010 |
| 7831405 | Semiconductor package capable of performing various tests and method of testing the same A semiconductor package includes an input pin that receives a first signal from the outside of the semiconductor package, a pad that is coupled to the input pin, and a test mode driving circuit that receives the first signal from the pad and outputs a plurality of t... | 11/09/2010 |
| 7792656 | Test apparatus A test apparatus that tests a device under test is provided, including a plurality of testing units that are mapped to a control bus address space and that test the device under test; a control processor that executes a plurality of test control programs to control ... | 09/07/2010 |
| 7739069 | Test prepared RF integrated circuit In an example embodiment, an integrated circuit comprises a mixer circuit and a local oscillator circuit. During testing a frequency divider circuit in the integrated circuit divides a local oscillator signal to a frequency below a normal operating range of the loca... | 06/15/2010 |
| 7668683 | Numerical test data reporting in an image file and subsequent analysis The present disclosure is directed to numerical test data reporting using an image file and subsequent analysis of the test data. A method for capturing and analyzing test data in accordance with an embodiment includes: capturing multi-bit integer values of test dat... | 02/23/2010 |
| 7653506 | Tensile support strength monitoring system and method A system and method monitoring the health of a support structure for an elevator based on an electrical characteristic, such as resistance, of the support structure and not the temperature of the structure. The resistance of a virgin support structure under the same... | 01/26/2010 |
| 7571069 | Data assurance workflow derivation and execution A method for providing data assurance includes receiving selected input data to perform data assurance thereon, and receiving selected parameters for the data assurance. Data assurance modules are provided that translate the input data and the parameters and that de... | 08/04/2009 |
| 7571068 | Module, electronic device and evaluation tool A module (100) has test controller (140) for evaluating a functional block (120). The test controller (140) includes a first register (142) coupled between an input pin (162) and an output pin (164) from a plurality o... | 08/04/2009 |
| 7519495 | Method and device for executing method steps A device and a method for executing method steps wherein an output signal is produced. Dependent on whether an output mode is switched on, the output signal is outputted. The output signal comprises items of information concerning the environment wherein the output ... | 04/14/2009 |
| 7519496 | Electronic circuit comprising a secret sub-module The invention relates to an electronic circuit including a sub-module assembly (2) connected to the rest of the circuit, the sub-module assembly including a secret sub-module (4) for performing a function, scan chains; a built-in self test circuit incl... | 04/14/2009 |
| 7509227 | High-speed digital multiplexer A high-speed digital multiplexer is disclosed, The multiplexer includes a plurality of input pins for receiving a plurality of digital input signals ad switching circuitry coupled to the input pins. The switching circuitry has respective outputs coupled to a common ... | 03/24/2009 |
| 7478004 | Method for testing a connection between an audio receiving device and a motherboard A method for testing a connection between an audio receiving device and a motherboard is disclosed. The method includes the steps of: preparing a data storage medium containing an original audio data file; playing the data storage medium on an audio playing device w... | 01/13/2009 |
| 7457717 | System for trouble shooting and verifying operation of spare assets A system for testing components of a simulator has a slave device. A master controller is coupled to the slave device. The master controller transmits chip select and data signals to the slave device for testing a component of the simulator. A computer system is cou... | 11/25/2008 |
| 7440866 | System and method for validating an input/output voltage of a target system A target interface system for interfacing selected components of a communication system and methods for manufacturing and using same. Being reconfigurable to support an extensive range of conventional input/output technologies, the target interface system downloads ... | 10/21/2008 |
| 7440865 | Screening optical transceiver modules for electrostatic discharge damage A general method is given for screening laser diodes for electrostatic discharge, (ESD), damage. The laser diode may be selectively isolated from the laser driver so that a current-voltage (I-V), curve can be taken and then compared to curves taken previously on the... | 10/21/2008 |
| 7424383 | Abnormality detection device for detecting an abnormality in a communication bus An abnormality detection device detects an abnormality in a communication bus. The abnormality detection device comprises a timer counter connected to the communication bus so as to measure a time during which a signal having a first logical level is transmitted in ... | 09/09/2008 |
| 7421365 | Automated circuit board test actuator system An apparatus for automatically inserting connectors and coupling test probes to circuit boards, such as computer system boards and the like. The apparatus enables connectors to be automatically inserted into mating connectors on a circuit board device under test (DU... | 09/02/2008 |
| 7412343 | Methods for delay-fault testing in field-programmable gate arrays Systems and methods for delay-fault testing field programmable gate arrays (FPGA's), applicable both for off-line manufacturing and system-level testing, as well as for on-line testing within the framework of the roving self-test area (STARs) approach are described.... | 08/12/2008 |
| 7400996 | Use of IC-based potentiometers to enable voltage rail variation under BMC control The present invention provides a voltage margin testing system incorporated in an electronic system, such as, a computer system (e.g., a server), having a plurality of components for at least some of which voltage margin testing is required. A voltage margin testing... | 07/15/2008 |
| 7395170 | Methods and apparatus for data analysis A method and apparatus for data analysis according to various aspects of the present invention is configured to automatically select one or more outlier identification algorithms for identifying statistical outliers in test data for components. ... | 07/01/2008 |
| 7395475 | Circuit and method for fuse disposing in a semiconductor memory device A fuse disposing circuit executes a same test as in a state before a fuse is cut, even in case the fuse is cut. For this, the fuse disposing circuit in accordance with the invention includes a test mode enable confirmation section for informing whether a test mode i... | 07/01/2008 |
| 7376769 | Wireless computing device having an application and wireless subsystem and method therefore Briefly, in accordance with one embodiment of the invention, a portable computing or communication device may include an application subsystem coupled to a wireless subsystem with an interface. The interface may provide isolation between the application subsystem an... | 05/20/2008 |
