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| Number | Title | Issue Date |
| 7636642 | Direct jitter analysis of binary sampled data A technique for determining the timing location and/or jitter of a signal edge includes computing differences between pairs of adjacent samples of the signal edge to yield difference values. First and second statistical moments are computed directly from the differe... | 12/22/2009 |
| 7603248 | Testing circuit and testing method for semiconductor device and semiconductor chip A testing circuit for a semiconductor device having a test mode in which the information about built-in memory cannot be read after conducting a test on a semiconductor device, and cutting a pad formed in a scribe area is provided. The scribe PAD and the scribe ROM ... | 10/13/2009 |
| 7590504 | Graphical user interface for creation of IBIST tests A graphical user interface (GUI) that configures a test for a circuit. More particularly, the circuit includes a built-in-self-test (BIST) compatible device and has a test configuration. The device has an associated value. Moreover, the circuit, the device, and the ... | 09/15/2009 |
| 7577540 | Re-configurable embedded core test protocol for system-on-chips (SOC) and circuit boards A test system for a circuit board , wherein the circuit board has a plurality of cores such that at least one of the plurality of cores is adapted to use a test protocol independent of a communication fabric used in the circuit board. A system-on-chip (SOC) with an ... | 08/18/2009 |
| 7536268 | Collecting information to identify defective locations of a display monitor Indications of user inputs with respect to a diagnostic image displayed on a display monitor are received to identify defective locations of the display monitor. Information is collected based on the received user inputs that identify defective locations of the disp... | 05/19/2009 |
| 7474979 | Integrated circuit device test system and method A method for integrated device testing can include the steps of: receiving wafer test data that identifies wafer test failures with the dice tested while part of a shared common substrate; receiving package test data that identifies test failures for at least a subs... | 01/06/2009 |
| 7444258 | Automated simulation testbench generation for serializer/deserializer datapath systems Embodiments herein present a method for automated simulation testbench generation for serializer/deserializer datapath systems. The method provides a database of transactors for generating and checking data within the datapath system, wherein the transactors are ada... | 10/28/2008 |
| 7444257 | Generation of a testbench for a representation of a device A system and method for generating a testbench for a representation of a device to be incorporated in a data processing apparatus is provided. The representation of the device is configurable based on configuration data specifying predetermined attributes of one or ... | 10/28/2008 |
| 7444256 | System and method for testing hardware or software modules via a computer network The present invention is a system for facilitating the access by an end user to a component to be tested via a global computer network comprising an interface for enabling an end user to access a central computer network in communication with a component to be teste... | 10/28/2008 |
| 7440864 | Controller system for pool and/or spa A method of programming a microcomputer based controller system for a bathing installation. The microcomputer is configured to receive input command and sensor information from a plurality of input devices including a control panel and a bathing installation sensor,... | 10/21/2008 |
| 7430486 | Datalog support in a modular test system A method for communicating test information from a source to a destination is disclosed. The method includes providing a modular test system, where the modular test system comprises a system controller for controlling at least one site controller, the at least one s... | 09/30/2008 |
| 7430697 | Method of testing circuit blocks of a programmable logic device A method of testing circuits in a programmable logic device is described. According to one embodiment of the invention, a method comprises steps of configuring a configurable logic block of the programmable logic device with a test signal source and a logic circuit;... | 09/30/2008 |
| 7415377 | Relay testing system and method A programmable system for testing relays and controlling systems is provided. In one embodiment the present disclosure provides a programmable device capable of, for example, testing relays. The device includes a signal generator for generating signals to test relay... | 08/19/2008 |
| 7404071 | Memory modules having accurate operating current values stored thereon and methods for fabricating and implementing such devices Memory modules having accurate operating current values stored thereon and methods for fabricating and implementing such devices to improve system performance. Memory modules comprising a number of volatile memory devices may be fabricated. Operating current values ... | 07/22/2008 |
| 7395170 | Methods and apparatus for data analysis A method and apparatus for data analysis according to various aspects of the present invention is configured to automatically select one or more outlier identification algorithms for identifying statistical outliers in test data for components. ... | 07/01/2008 |
| 7386411 | Automatic hi-pot test apparatus and method An exemplary automatic hi-pot test apparatus (20) includes a high voltage supply (21), a transmission device configured for transmitting an electronic device (26) to be tested, a connecting device electrically connected to the high voltage suppl... | 06/10/2008 |
| 7373360 | Methods and apparatus that use contextual test number factors to assign test numbers In a method for assigning test numbers, current testflow context information is maintained during the execution of a testflow. If one or more test number factors have been specified for one or more levels of the current testflow context, the test number factors are ... | 05/13/2008 |
| 7373263 | Analog-type measurements for a logic analyzer A logic analyzer that performs analog-type measurements on digital data includes circuitry in its acquisition system that is programmable to search through acquired data to detect analog-type signal characteristics. In a first embodiment, the logic analyzer includes... | 05/13/2008 |
| 7369958 | System and method for setting motherboard testing procedures The present invention discloses system and method for setting motherboard testing procedures. The method includes the steps of: selecting the required testing mode numeral corresponding to one of a plurality of BIOS programs, which required a next testing station vi... | 05/06/2008 |
| 7370087 | Method and apparatus for providing access to a peripheral device management interface Embodiments of the present invention provide mechanisms and techniques for providing access to a peripheral management interface, such as a Web-based graphical user interface (GUI) associated with a peripheral device. In order to access a GUI associated with a perip... | 05/06/2008 |
| 7366991 | Method and system for providing an extensible user interface Displaying a custom user interface in response to a determination that the application program is configured to display the custom user interface. To create the custom user interface, the end user can customize one or more default user interface files to create cust... | 04/29/2008 |
| 7365554 | Integrated circuit for determining a voltage An integrated circuit includes a current generator circuit with a first input terminal for applying a reference voltage and a second input terminal for applying an input voltage, which is generated internally from an externally applied supply voltage by a voltage ge... | 04/29/2008 |
| 7363188 | Apparatus and method for operating automated test equipment (ATE) An apparatus and method of operating automated test equipment (ATE) in a networked environment of multiple external test controllers. The system resources responsible for coordinating the shared uses of the ATE by the multiple external test controllers are centraliz... | 04/22/2008 |
| 7359490 | Systems and methods for facilitating placement of telecommunications test calls A method for placing a test call in a telecommunications network. The method includes retrieving an indication of a translation change for a telecommunications switch from storage and placing a test call to test whether the translation change was successful. ... | 04/15/2008 |
| 7359819 | Evaluation of device driver output The testing of driver output is automated. Embodiments of the invention filter out data that is known to change between two similar outputs of a driver. By filtering this dynamic data out, the remaining data can be compared to known-good data to identify any variati... | 04/15/2008 |
| 7359822 | Testing device A testing device that tests an electronic device includes a test pattern outputting unit operable to output a test pattern to the electronic device, a deciding unit operable to decide whether an output signal from the electronic device satisfies a predetermined cond... | 04/15/2008 |
| 7360184 | Method and apparatus for scenario search based random generation of functional test suites A method of describing a set of tests capable of being performed on a device under test (DUT) is disclosed. The method includes identifying a scenario space of the DUT. ... | 04/15/2008 |
| 7359820 | In-cycle system test adaptation Disclosed are a method, information processing system and computer readable medium for performing a system test on a program. The method comprises creating a test plan associated with a system test. The system test is for testing a program within an environment. At ... | 04/15/2008 |
| 7356436 | Method, system, and storage medium for estimating and improving test case generation A technique for estimating and improving the test coverage for large machines, while accumulating minimum information of past test cases (i.e., minimum feedback) is provided. The technique is scalable in the sense that the number of machine instructions needed to me... | 04/08/2008 |
| 7356633 | Composing on-chip interconnects with configurable interfaces Embodiments of apparatuses, systems, and methods are described for composing on-chip interconnects with configurable interfaces. A configurable interface includes a configurable agent and interface port. The configurable agent has a first input and a first output wi... | 04/08/2008 |
| 7356804 | Language integrated unit testing Techniques for testing production code include providing a common source unit having production source code and test source code, the test source code having test methods for testing the production source code. Executable production code is produced based on the pro... | 04/08/2008 |
| 7356432 | System test management system with automatic test selection Various approaches for testing an electronic system are disclosed. The hardware units of a hardware configuration of the system are determined, and a time constraint parameter value is input. Also input is a hardware unit type identifier that specifies a first type ... | 04/08/2008 |
| 7353474 | System and method for accessing signals of a user design in a programmable logic device Access to a signals of a user design in a programmable logic device (PLD) is provided without a compilation delay following selection of the signals. The system may include a generator, a compiler, a selector, the PLD, and a monitor. The generator selects sets of si... | 04/01/2008 |
| 7349777 | Car display capture apparatus An in-vehicle information retrieval system includes a data generating module for generating data within the vehicle. A data capture module is in communication with the data generating module for capturing data from the data generating module. A printing unit is moun... | 03/25/2008 |
| 7350089 | System for memory hot swap A system may include a motherboard, a chipset coupled to the motherboard, a memory module mount coupled to the chipset, a power transistor electrically coupled to the memory module mount, a voltage regulator to provide power to the power transistor, and an I/O expan... | 03/25/2008 |
| 7350108 | Test system for integrated circuits A test board includes a plurality of sockets for connection to a plurality of integrated circuit chips to be tested. A test control device on the board turns on at least one test engine for testing the plurality of chips simultaneously. A checking circuit verifies t... | 03/25/2008 |
| 7346736 | Selecting basis functions to form a regression model for cache performance One embodiment of the present invention provides a system that selects bases to form a regression model for cache performance. During operation, the system receives empirical data for a cache rate. The system also receives derivative constraints for the cache rate. ... | 03/18/2008 |
| 7343372 | Direct navigation for information retrieval A method of document retrieval is provided. The method includes assigning concept labels to documents contained in a collection according to grammar rules, receiving a query, converting the query to a query concept using the grammar rules, and mapping the query conc... | 03/11/2008 |
| 7343558 | Configurable automatic-test-equipment system A method and system for measuring a device under test includes connecting a first test instrument and a second test instrument to a programmable logic device. The programmable logic device is configured to comply with interface specifications of the first test instr... | 03/11/2008 |
| 7339891 | Method and system for evaluating wireless applications The present invention provides a method and system for evaluating wireless applications utilizing a test console, an application model builder, a test repository manager, a simulator, a test controller, test agents, and a comparator in order to test the performance ... | 03/04/2008 |