Bizarre Patents
Combination Beverage Container and Spittoon
A combination beverage container and spittoon includes a bottom portion including outer wall and a first inner wall defining a spittoon space.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7439302 | Low refractive index polymers as underlayers for silicon-containing photoresists A new underlayer composition that exhibits high etch resistance and improved optical properties is disclosed. The underlayer composition comprises a vinyl or acrylate polymer, such as a methacrylate polymer, the polymer comprising at least one substituted or unsubst... | 10/21/2008 |
| 7416992 | Method of patterning a low-k dielectric using a hard mask By using a non-metallic hard mask for patterning low-k dielectric materials of advanced semiconductor devices, an enhanced degree of etch fidelity is obtained. The present invention may readily be applied to via first-trench last, trench first-via last schemes. ... | 08/26/2008 |
| 7405153 | Method for direct electroplating of copper onto a non-copper plateable layer A process for the formation of an interconnect in a semiconductor structure including the steps of forming a dielectric layer on a substrate, forming a first barrier layer on the dielectric layer, forming a second barrier layer on the first barrier layer, wherein th... | 07/29/2008 |
| 7326646 | Nitrogen-free ARC layer and a method of manufacturing the same The present invention provides a nitrogen-free ARC layer, which is formed on the basis of silane and carbon dioxide by PECVD in a nitrogen-free deposition atmosphere. The optical characteristics may be tuned in a wide range, wherein, in particular, a back reflection... | 02/05/2008 |
| 7244334 | Apparatus used in reshaping a surface of a photoresist The invention relates to a method of improving control over the dimensions of a patterned photoresist, which enables better control of the critical dimensions of a photomask or reticle which is fabricated using the patterned photoresist. In addition, the method may ... | 07/17/2007 |
| 7238624 | System and method for manufacturing semiconductor devices using a vacuum chamber The present disclosure relates generally to the manufacturing of semiconductor devices, and more particularly to semiconductor manufacturing using a vacuum chamber. In one example, a method for semiconductor manufacturing includes: providing a photoresist layer for ... | 07/03/2007 |
| 7172960 | Multi-layer film stack for extinction of substrate reflections during patterning A method including introducing a dielectric layer over a substrate between an interconnection line and the substrate, the dielectric layer comprising a plurality of alternating material layers; and patterning an interconnection to the substrate. An apparatus compris... | 02/06/2007 |
| 7163879 | Hard mask etch for gate polyetch A transistor gate structure that is free from notches is formed by using a hard mask. The hard mask has a bilayer structure of a BARC (bottom antireflective coating) over a silicon dioxide layer. A photoresist layer is formed over a portion corresponding to the gate... | 01/16/2007 |
| 7125741 | Rework process of patterned photo-resist layer A rework process of patterned photo-resist layer is provided. First, a substrate is provided with a first DARC, a first primer and a first patterned photo-resist layer being sequentially formed thereon. Next, remove the first patterned photo-resist layer and the fir... | 10/24/2006 |
| 7125783 | Dielectric anti-reflective coating surface treatment to prevent defect generation in associated wet clean A method for preventing the formation of watermark defects includes the steps of forming a pad oxide, a silicon nitride layer and a silicon oxynitride layer over a semiconductor substrate. A photoresist mask is formed over the resulting structure, with the silicon o... | 10/24/2006 |
| 7119013 | Method for fabricating semiconductor device with fine patterns A method for fabricating a semiconductor device capable of preventing a hard mask from being lifted and patterns from being defective. Particularly, an inter-layer insulation layer and an etch stop layer formed on a substrate structure provided with conductive struc... | 10/10/2006 |
| 7118959 | Integrated circuit capacitor having antireflective dielectric A capacitor (100) is disclosed that is formed as part of an integrated circuit (IC) fabrication process. The capacitor (100) has conductive top and bottom electrodes (140, 144) and a nonconductive capacitor dielectric (142). In one exampl... | 10/10/2006 |
| 7105431 | Masking methods The invention includes masking methods. In one implementation, a masking material comprising boron doped amorphous carbon is formed over a feature formed on a semiconductor substrate. The masking material comprises at least about 0.5 atomic percent boron. The maskin... | 09/12/2006 |
| 7101806 | Deep trench formation in semiconductor device fabrication A method for etching a deep trench in a semiconductor substrate. The method comprises the steps of (a) forming a hard mask layer on top of the semiconductor substrate, (b) etching a hard mask opening in the hard mask layer so as to expose the semiconductor substrate... | 09/05/2006 |
| 7064080 | Semiconductor processing method using photoresist and an antireflective coating A semiconductor processing method includes forming an antireflective coating comprising Ge and Se over a substrate to be patterned. Photoresist is formed over the antireflective coating. The photoresist is exposed to actinic radiation effective to pattern the photor... | 06/20/2006 |
| 7061075 | Shallow trench isolation using antireflection layer A film stack for forming shallow trench isolation among transistors and other devices on a semiconductor substrate is provided, including a plurality of light absorbing layers alternating between a layer of SiON and a layer of SiO2 and having a combined e... | 06/13/2006 |
| 7060635 | Method of manufacturing semiconductor device and method of forming pattern The present invention provides a method of manufacturing a semiconductor device which includes a step of forming a laminated film for pattern formation on a substrate, in which the laminated film for pattern formation includes an innermost layer, an inner layer and ... | 06/13/2006 |
| 7030044 | Method of forming a cap layer having anti-reflective characteristics on top of a low-k dielectric A method of forming a multi-layer stack over a low-k dielectric layer is disclosed, wherein the multi-layer stack provides an improved anti-reflective effect and an enhanced protection of the underlying low-k dielectric material during the chemical mechanical polish... | 04/18/2006 |
| 7012012 | Method of etching substrates Thinning and dicing substrates using inductively coupled plasma reactive ion etching (ICP RIE). When dicing, a hard photo-resist pattern or metal mask pattern that defines scribe lines is formed on a sapphire substrate or on a semiconductor epitaxial layer, benefici... | 03/14/2006 |
| 6974766 | In situ deposition of a low κ dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application The present invention provides a SiC material, formed according to certain process regimes, useful as a barrier layer, etch stop, and/or an ARC, in multiple levels, including the pre-metal dielectric (PMD) level, in IC applications and provides a dielectric layer de... | 12/13/2005 |
| 6951826 | Silicon carbide deposition for use as a low dielectric constant anti-reflective coating The present invention generally provides a process for depositing silicon carbide using a silane-based material with certain process parameters that is useful for forming a suitable ARC for IC applications. Under certain process parameters, a fixed thickness of the ... | 10/04/2005 |
| 6936383 | Method of defining the dimensions of circuit elements by using spacer deposition techniques By using conventional spacer and etch techniques, microstructure elements, such as lines and contact openings of integrated circuits, may be formed with dimensions that are mainly determined by the layer thickness of the spacer layer. In a sacrificial layer, an open... | 08/30/2005 |
| 6933236 | Method for forming pattern using argon fluoride photolithography A method for forming a photoresist pattern with minimally reduced transformations through the use of ArF photolithography, including the steps of: forming an organic anti-reflective coating layer on a an etch-target layer already formed on a substrate; coating a pho... | 08/23/2005 |
| 6933244 | Method of fabrication for III-V semiconductor surface passivation A method passivates a surface of a semiconductor structure. The method provides III-V semiconductor material having a surface to be passivated. Upon the surface of the III-V semiconductor material to be passivated an oxide layer is formed. Thereafter, the surface of... | 08/23/2005 |
| 6930028 | Antireflective structure and method The present invention provides integrated circuit fabrication with a silicon oxynitride antireflective layer for gate location plus patterned photoresist linewidth reduction for gate length definition followed by interconnect definition without patterned photoresist... | 08/16/2005 |
| 6927178 | Nitrogen-free dielectric anti-reflective coating and hardmask Methods are provided for depositing a dielectric material. The dielectric material may be used for an anti-reflective coating or as a hardmask. In one aspect, a method is provided for processing a substrate including introducing a processing gas comprising a silane-... | 08/09/2005 |
| 6924230 | Method for forming a conductive layer A method for forming a conductive layer is disclosed, which has the following steps. First, a substrate is provided, and then a patterned photoresist layer having an undercut is formed on the substrate. After that, at least one conductive layer is deposited on the s... | 08/02/2005 |
| 6841465 | Method of forming dual damascene pattern in semiconductor device Disclosed is a method of forming the dual damascene pattern in the semiconductor device. After forming the trench, a photoresist pattern in which a via hole region is defined is formed by exposure and development processes in a state that a photoresist is thinly coa... | 01/11/2005 |
| 6787452 | Use of amorphous carbon as a removable ARC material for dual damascene fabrication An improved method of controlling a critical dimension during a photoresist patterning process is provided which can be applied to forming vias and trenches in a dual damascene structure. An amorphous carbon ARC is deposited on a substrate by a PECVD method. Preferr... | 09/07/2004 |
| 6774032 | Method of making a semiconductor device by forming a masking layer with a tapered etch profile A method for making a semiconductor device is described. That method includes forming a sacrificial layer on a substrate, then forming a layer of photoresist on the sacrificial layer. After the photoresist layer is patterned, to form a patterned photoresist layer th... | 08/10/2004 |
| 6764964 | Method for forming patterns of a semiconductor device A method for forming patterns of a semiconductor device is disclosed which inhibits collapse of photoresist patterns in photoresist pattern-forming processes of the semiconductor device by forming micro-bends in an anti-reflective film to increase the contact area b... | 07/20/2004 |
| 6759322 | Method for forming wiring structure After a plurality of grooves are formed in an insulating film and in an anti-reflection film on the insulating film, a barrier metal film and a conductive film are deposited on the anti-reflection film such that each of the wiring grooves is filled therewith. Subseq... | 07/06/2004 |
| 6713234 | Fabrication of semiconductor devices using anti-reflective coatings Techniques are disclosed for fabricating a device using a photolithographic process. The method includes providing a first anti-reflective coating over a surface of a substrate. A layer which is transparent to a wavelength of light used during the photolithographic ... | 03/30/2004 |
| 6706600 | Method of fabricating a split-gate semiconductor device A split-gate semiconductor device is fabricated by forming floating gates on the sidewalls of the control gates of transistors, then using a bottom anti-reflective coating as a mask while removing unnecessary floating gates, preferably by an isotropic dry etching pr... | 03/16/2004 |
| 6699795 | Gate etch process A method of making a semiconductor structure includes etching an anti-reflective coating layer at a pressure of 10 millitorr or less; etching a nitride layer with a first nitride etch plasma having a first F:C ratio; and etching the nitride layer with a s... | 03/02/2004 |
| 6686272 | Anti-reflective coatings for use at 248 nm and 193 nm The present invention is directed to a silicon carbide anti-reflective coating (ARC) and a silicon oxycarbide ARC. Another embodiment is directed to a silicon oxycarbide ARC that is treated with oxygen plasma. The invention includes method embodiments for... | 02/03/2004 |
| 6677216 | Method of making IC capacitor Embodiments of the present invention relate to a method of making an IC capacitor. In one embodiment, the method comprises providing a substrate, forming a polycide layer on the substrate, and forming an insulating amorphous silicon layer on the polycide ... | 01/13/2004 |
| 6670280 | Methods of microstructuring ferroelectric materials A method of micro-structuring a surface of a sample of ferroelectric material, the method comprising: (a) taking a sample of ferroelectric material having a -z face which is to be etched; (b) illuminating the -z face with ultraviolet light to define illum... | 12/30/2003 |
| 6664180 | Method of forming smaller trench line width using a spacer hard mask An exemplary method of forming trench lines includes providing a photoresist pattern over an anti-reflective coating (ARC) layer where the ARC layer is deposited over a layer of material; etching the ARC layer according to the photoresist pattern to form ... | 12/16/2003 |
| 6645868 | Method of forming shallow trench isolation using antireflection layer Shallow trench isolation among transistors and other devices on a semiconductor substrate is provided by initially forming a layer of highly absorbing silicon rich nitride to serve as a hardmask between a semiconductor substrate and a photoresist. The hig... | 11/11/2003 |
