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| Number | Title | Issue Date |
| 6897164 | Aperture masks for circuit fabrication Aperture masks and deposition techniques for using aperture masks are described. In addition, techniques for creating aperture masks and other techniques for using the aperture masks are described. The various techniques can be particularly useful in creating circui... | 05/24/2005 |
| 6809035 | Hot plate annealing A rapid thermal processor, having a process chamber, including a stable heat source in the form of a heatable mass. Heat is provided to the heatable mass using a series of heating devices. The temperature of the heatable mass establishes the temperature of a semicon... | 10/26/2004 |
| 6759328 | Masks and method for contact hole exposure A mask and method for contact hole exposure. First, a mask including a transparent substrate, a phase shift layer installed on the transparent substrate to define a series of patterns having contact hole areas set in array, an a plurality of metal lines installed on... | 07/06/2004 |
| 6716736 | Method for manufacturing an under-bump metallurgy layer In a method for manufacturing an under-bump metallurgy (UBM) layer, a plate having a plurality of openings is prepared. Then, the plate is placed on the wafer. Finally, the material of the under-bump metallurgy layer is sputtered on the wafer using the plate as a sp... | 04/06/2004 |
| 6667215 | Method of making transistors A method for making transistors comprises depositing source electrode and drain electrode features onto a substrate through a single aperture in a stationary shadow mask, said aperture having at least two opposing edges; wherein the shapes of the features... | 12/23/2003 |
| 6548115 | System and method for providing coating of substrates A modular coating apparatus is disclosed which is adapted to couple to a host system, such as a cluster or in-line type coating system, as well as to operate in stand-alone fashion. The coating apparatus uses extrusion to initially deposit a film having a... | 04/15/2003 |
| 6406988 | Method of forming fine pitch interconnections employing magnetic masks In the construction of electronic devices with one or more flip chips and, in some cases, one or more leadless components, mounted on a substrate, the interconnections are made with conductive adhesive deposited using specialized masks. A magnetic metal m... | 06/18/2002 |
| 6248659 | Method for forming an interconnect structure In one embodiment, a masking chuck (68) is placed in contact with an integrated circuit structure (70) that contains conductive members (90). The masking chuck (68) is used to deposit a dielectric layer (92) on the integrated circuit structure (70). The d... | 06/19/2001 |
| 6087274 | Nanoscale X-Y-Z translation of nanochannel glass replica-based masks for making complex structures during patterning The present invention is a process for making complex structures with nanoscale resolution in parallel by placing an NCG replica-based mask (or other suitable mask) in close proximity to a substrate and controlling, with nanoscale accuracy and precision, ... | 07/11/2000 |
| 6046066 | Method of forming cantilever structure in microelectromanical system The present invention relates to a new process of the cantilever structure in the micro-electro-mechanical system (MEMS), and more particularly, to a process that could overcome the contamination problem on the undesired areas during the thin-film growth.... | 04/04/2000 |
| 5698063 | Intermediate workpiece employing a mask for etching an aperture aligned with the crystal planes in the workpiece substrate A method for differentially etching an N-sided polygon aperture through a first major surface of a silicon wafer along the planes begins with depositing a mask and defining therein a first intermediate polygon aperture having at least 4N+2 sid... | 12/16/1997 |
| 5627100 | Method for the making of surface-emitting laser diodes with mechanical mask, the apertures having inclined flanks A method for making a set of surface-emitting laser diodes comprises the making of reflectors by the epitaxial growth of at least one semiconductor material through a mask having apertures with inclined flanks. This method leads to the obtaining of the Br... | 05/06/1997 |
| 5532188 | Global planarization of multiple layers A method is disclosed for performing global planarization of the top layer of a structure having multiple patterned layers, during fabrication of an integrated circuit (10). An integrated circuit fabricated using the method is also disclosed. The method i... | 07/02/1996 |
| 5518963 | Method for forming metal interconnection of semiconductor device A method for forming a metal interconnection capable of minimizing plasma etching damage on a metal layer having a relatively higher step when forming a via hole. The method for forming a metal interconnection of a semiconductor device where a first metal... | 05/21/1996 |
| 5494839 | Dual photo-resist process for fabricating high density DRAM A dual photo-resist process for fabricating capacitor plates of a DRAM is disclosed including the step of forming a capacitor on a semiconductor IC surface. A first plurality of photo-resist regions which are separated from each other by spaces are then f... | 02/27/1996 |
| 5466636 | Method of forming borderless contacts using a removable mandrel A semiconductor fabrication process for forming borderless contacts (130, 170, 172) using a removable mandrel (110). The process involves depositing a mandrel on an underlying barrier layer (100) designed to protect underlying structures (40) formed on a ... | 11/14/1995 |
| 5420067 | Method of fabricatring sub-half-micron trenches and holes A non-optical method for the formation of sub-half micron holes, vias, or trenches within a substrate. For example, a substrate having at least two buttresses or a trench having a interbuttress distance or a width of 1.0 to 0.5 microns, respectively, is c... | 05/30/1995 |
| 5336630 | Method of making semiconductor memory device A method of making a semiconductor memory device wherein a storage node having a plurality of pillars, capable of increasing the storage node surface area and thus the cell capacitance. The storage node is formed by depositing a storage node polysilicon f... | 08/09/1994 |
| 5174201 | Thick film mask separation detection system An apparatus and method for screening a pattern of material onto a surface including detection of the instant of separation of the mask from the surface after screening. Particularly as applied to a process for making a multi-layer ceramic device with an ... | 12/29/1992 |
| 5147812 | Fabrication method for a sub-micron geometry semiconductor device A method for fabricating a sub-micron geometry semiconductor device using a chromeless mask. An optical exposure system (22) directs light through a chromeless mask (21). The chromeless mask (21) uses destructive interference of light to pattern a light s... | 09/15/1992 |
| 5023191 | Method of producing a semiconductor device using a single mask method for providing multiple masking patterns A single mask method for providing multiple masking patterns, using excess etching techniques, which is usable for developing a semiconductor substrate for a semiconductor device which results in an increased current being required before latchup occurs i... | 06/11/1991 |
| 4397078 | Method and apparatus for measuring a gap distance between a mask and a wafer to be used in fabrication of semiconductor integrated circuits On a mask to be used in fabrication of semiconductor integrated circuits is formed an electrode outside of an integrated circuit pattern area with the same material as said pattern area in the same thickness as said pattern area, this mask is positioned a... | 08/09/1983 |
| 4335161 | Thin film transistors, thin film transistor arrays, and a process for preparing the same A process for the preparation of thin film transistors and thin film transistor arrays as described wherein, in a single pump-down, the semiconductive pad, the source electrode, the drain electrode and an insulating layer over the source electrode, drain ... | 06/15/1982 |
| 4140610 | Method of producing a PN junction type solar battery A PN junction type solar battery comprising a plurality of alternate P-type and N-type semiconductor layers provided in a laminated manner parallel to an incident-light-receiving plane, connection ears provided opposite to each other and integrally connec... | 02/20/1979 |
