Class 438/941 - LOADING EFFECT MITIGATION

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Art collection involving the minimalization of localized
No. of patents: 19
Last issue date: 05/06/2008

Number	Title	Issue Date
7368372	Methods of fabricating multiple sets of field effect transistors The invention includes methods of fabricating multiple sets of field effect transistors. In one implementation, an etch stop layer is formed over an insulative capping layer which is formed over a conductive gate layer formed over a substrate. The etch stop layer, t...	05/06/2008
7060570	Methods of fabricating multiple sets of field effect transistors The invention includes methods of fabricating multiple sets of field effect transistors. In one implementation, an etch stop layer is formed over an insulative capping layer which is formed over a conductive gate layer formed over a substrate. The etch stop layer, t...	06/13/2006
7060569	Methods of fabricating multiple sets of field effect transistors The invention includes methods of fabricating multiple sets of field effect transistors. In one implementation, an etch stop layer is formed over an insulative capping layer which is formed over a conductive gate layer formed over a substrate. The etch stop layer, t...	06/13/2006
6927135	Methods of fabricating multiple sets of field effect transistors The invention includes methods of fabricating multiple sets of field effect transistors. In one implementation, an etch stop layer is formed over an insulative capping layer which is formed over a conductive gate layer formed over a substrate. The etch stop layer, t...	08/09/2005
6720274	Method for fabricating a semiconductor device and a substrate processing apparatus A semiconductor device fabricating method includes the steps of loading one or more substrates into a boat disposed in a waiting room positioned next to a reaction furnace; vacuum-evacuating the waiting room to a vacuum state at a base pressure; loading the boat int...	04/13/2004
5997588	Semiconductor processing system with gas curtain A gas curtain for use with a semiconductor processing system to prevent unwanted gases from entering a processing chamber. The gas curtain includes both upward and downward flows of gas surrounding an isolation valve adjacent a delivery port into the proc...	12/07/1999
5801104	Uniform dielectric film deposition on textured surfaces Uniformity of thin deposited layers on textured surfaces is enhanced by reducing the total surface area available to film deposition. The backside surface area of a semiconductor wafer is reduced prior to film deposition, thereby reducing the available su...	09/01/1998
5744049	Plasma reactor with enhanced plasma uniformity by gas addition, and method of using same The invention improves etch uniformity across a silicon wafer surface in an RF plasma etch reactor. In a first aspect of the invention, etch uniformity is enhanced by reducing the etchant species (e.g., Chlorine) ion and radical densities near the wafer e...	04/28/1998
5681423	Semiconductor wafer for improved chemical-mechanical polishing over large area features The present invention is a semiconductor wafer, and a method of fabricating the semiconductor wafer, that reduces dishing over large area features in chemical-mechanical polishing processes. The semiconductor wafer has a substrate with an upper surface, a...	10/28/1997
5639345	Two step etch back process having a convex and concave etch profile for improved etch uniformity across a substrate A novel method for improving the etch back uniformity for inter-metal-dielectric planarization was accomplished. Conventional single etch backs use a high polymer chemistry gas mixture (CF4 /CHF3) to etch back the planar spin-on-glas...	06/17/1997
5635421	Method of making a precision capacitor array Capacitor arrays may be incorporated within silicon integrated circuits as part of analog-to-digital or digital-to-analog converters. Capacitance ratios between individual capacitors need to be controlled to better than 1%. Because of microloading effects...	06/03/1997
5622899	Method of fabricating semiconductor chips separated by scribe lines used for endpoint detection A process has been developed in which photoresist thinning at the edges of silicon chips, resulting from photoresist flowing from semiconductor chips, exhibiting features with raised topographies, to flat scribe regions, has been reduced. The reduction in...	04/22/1997
5618757	Method for improving the manufacturability of the spin-on glass etchback process Spin-on glass etchback is a technique commonly used to planarize the surface of a semiconductor wafer during fabrication. The etch rate of spin-on glass is largely affected by the amount of oxide exposed during the spin-on glass etchback process. The amou...	04/08/1997
5552996	Method and system using the design pattern of IC chips in the processing thereof The techniques of the present invention facilitate the control of an IC chip fabrication level of a fabrication process based upon the design pattern of the IC chip being fabricated. A grid having multiple sections is imposed over the design pattern of a ...	09/03/1996
5552017	Method for improving the process uniformity in a reactor by asymmetrically adjusting the reactant gas flow A method for improving the etch rate uniformity and the chemical vapor deposition uniformity in a single-wafer reaction chamber was achieved. The method utilizes an asymmetric gas distribution system to increase the reactant gas flow over regions of the w...	09/03/1996
5415728	Method of performing plain etching treatment and apparatus therefor Disclosed herein are a dry etching method and a dry etching apparatus. The method comprises a step of applying an etching inhibiting gas to that portion of a workpiece where etching speed is high, while the workpiece is being etched with reactive-gas plas...	05/16/1995
5057462	Compensation of lithographic and etch proximity effects In the manufacture of integrated-circuit devices, patterned features are made on a substrate by etching a deposited layer. The pattern comprises features which are closely spaced, as well as others which are more isolated. Etching is in approximate confor...	10/15/1991
4980314	Vapor processing of a substrate Proposed is a method of fabricating semiconductor devices involving vapor etching of channels and/or growth of layers in a substrate. The etch or growth rate is controlled by opening up additional regions in the mask which are separated from the opening u...	12/25/1990
4226665	Device fabrication by plasma etching Plasma etching as applied to many of the materials encountered in the fabrication of LSI's is complicated by loading effect--the dependence of etch rate on the integrated surface area to be etched. This problem is alleviated by appropriate choice of etcha...	10/07/1980

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Class 438/941 - LOADING EFFECT MITIGATION