Class 438/924 - To facilitate selective etching

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Art collection under 914 involving doping selected regions
No. of patents: 84
Last issue date: 09/30/2008

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Number	Title	Issue Date
7429534	Etching a nitride-based heterostructure An improved solution for producing nitride-based heterostructure(s), heterostructure device(s), integrated circuit(s) and/or Micro-Electro-Mechanical System(s) is provided. A nitride-based etch stop layer that includes Indium (In) is included in a heterostructure. A...	09/30/2008
7396726	Methods of fabricating surrounded-channel transistors with directionally etched gate or insulator formation regions An elongate stacked semiconductor structure is formed on a substrate. The stacked semiconductor structure includes a second semiconductor material region disposed on a first semiconductor material region. The first semiconductor material region is selectively doped ...	07/08/2008
7279383	Liquid crystal display device and method of fabricating the same There is disclosed a liquid crystal display device and a fabricating method thereof that reduce the number of processes and production cost. A liquid crystal display device and a fabricating method thereof according to an embodiment of the present invention forms a ...	10/09/2007
7247578	Method of varying etch selectivities of a film A method of patterning a crystalline film. A crystalline film having a degenerate lattice comprising first atoms in a first region and a second region is provided. Dopants are substituted for said first atoms in said first region to form a non-degenerate crystalline...	07/24/2007
7074684	Elevated source drain disposable spacer CMOS In one embodiment of the invention, source and drain regions are formed as well as source and drain contact regions. Thereafter source and drain extension regions are formed. In another embodiment, elevated source and drain regions are formed as well as source and d...	07/11/2006
7049241	Method for forming a trench in a layer or a layer stack on a semiconductor wafer Preferably using a positive resist, a resist ridge (20) is formed in a photosensitive resist (16) applied on a semiconductor wafer (1) above a hard mask layer (12). The resist ridge (20) serves as a mask for a subsequent implantati...	05/23/2006
6773991	Method of fabricating EEPROM having tunnel window area Heavily concentrated impurities are selectively introduced into an exposed region of an oxide film. The exposed region of the oxide film where the impurities are introduced is selectively etched so that a surface of the semiconductor substrate is exposed An oxidizin...	08/10/2004
6638781	Semiconductor device and method of fabricating the same There is provided a high quality liquid crystal panel having a thickness with high accuracy, which is designed, without using a particulate spacer, within a free range in accordance with characteristics of a used liquid crystal and a driving method, and i...	10/28/2003
6553332	Method for evaluating process chambers used for semiconductor manufacturing A process chamber (12) is used for plasma etching of a wafer (21) disposed therein. A gas mixture supplied to the chamber eventually passes through openings (28) in a baffle plate (27). After the chamber has been cleaned, several test wafers are etched un...	04/22/2003
6498079	Method for selective source diffusion Deep profile and highly doped impurity regions can be formed by diffusing from a solid source or doped silicon glass and using a patterned nitride layer. An oxide etch stop and polysilicon sacrificial layer are left in place in the patterned regions and t...	12/24/2002
6326300	Dual damascene patterned conductor layer formation method A method for forming through a dielectric layer a trench contiguous with a via. There is first provided a substrate having a contact region formed therein. There is then formed upon the substrate a blanket first dielectric layer. There is then formed upon...	12/04/2001
6300156	Process for fabricating micromechanical devices A process for fabricating a MEMS device is disclosed. The device has at least one hinged element. The MEMS device including the hinged element is delineated and defined on a semiconductor substrate. The substrate is placed device side down in a chamber. T...	10/09/2001
6287961	Dual damascene patterned conductor layer formation method without etch stop layer A method for forming through a dielectric layer a trench contiguous with a via. There is provided a substrate having a contact region formed therein. There is then formed upon the substrate a patterned first dielectric layer defining a via accessing the c...	09/11/2001
6251802	Methods of forming carbon-containing layers In one aspect, the invention includes an etching process, comprising: a) providing a first material over a substrate, the first material comprising from about 2% to about 20% carbon (by weight); b) providing a second material over the first material; and ...	06/26/2001
6136717	Method for producing a via hole to a doped region A method for producing a via hole to a doped region in a semiconductor device, including the steps of: producing the doped region in a substrate such that the doped region is limited by insulating regions at least at a surface of the substrate; depositing...	10/24/2000
5928969	Method for controlled selective polysilicon etching An ammonia-based etchant is employed, in dilute aqueous solution and preferably with a moderating agent, to etch polysilicon. Ammonium fluoride and ammonium hydroxide are the preferred etchants, with acetic acid and isopropyl alcohol the preferred moderat...	07/27/1999
5817174	Semiconductor substrate and method of treating semiconductor substrate A method of treating a semiconductor substrate, which comprises the steps of subjecting a surface of the semiconductor substrate to an annealing treatment, performing an etching treatment of the surface of the semiconductor substrate under a condition whe...	10/06/1998
5811345	Planarization of shallow- trench- isolation without chemical mechanical polishing A new method for planarization of shallow trench isolation is disclosed by the wet etching and plasma etching, due to the surface sensitivity of SACVD O3 -TEOS that depends on substrate. The method described herein includes a pad oxide layer, a...	09/22/1998
5683546	Method of etching silicon substrate at different etching rates for different planes of the silicon to form an air bridge The present invention is for enlarging a freedom of layout including an air bridge pattern and enhancing the availability for various purposes. A mask layer including an air bridge pattern is formed on a (100) plane of a silicon substrate, isotropic etchi...	11/04/1997
5674758	Silicon on insulator achieved using electrochemical etching Bulk crystalline silicon wafers are transferred after the completion of circuit fabrication to form thin films of crystalline circuitry on almost any support, such as metal, semiconductor, plastic, polymer, glass, wood, and paper. In particular, this tech...	10/07/1997
5643803	Production method of a semiconductor dynamic sensor It is intended to provide an etching method for semiconductor devices in which the etching depth or the thickness of a thin thickness portion can be precisely controlled. According to experiment results, when a P-type substrate in which an N-type epitaxia...	07/01/1997
5593906	Method of processing a polysilicon film on a single-crystal silicon substrate A method of processing a polysilicon film formed on a single-crystal silicon substrate which can remove the polysilicon film with good selectivity in a fabrication process of semiconductor devices. First, a polysilicon film having an N-portion to be remov...	01/14/1997
5565060	Methods and compositions for the selective etching of silicon Methods and compositions for the selective etching of silicon in the presence of p-doped silicon are disclosed whereby a portion of a silicon surface may be dissolved while a p-doped pattern in the surface remains substantially undissolved. The compositio...	10/15/1996
5518966	Method for wet etching polysilicon A method is disclosed for the wet etching of polysilicon, which comprises the steps of: annealing a lamination structure of a doped polysilicon and an undoped polysilicon at a predetermined temperature for a predetermined period; and applying to the annea...	05/21/1996
5500385	Method for manufacturing a silicon capacitor by thinning For manufacturing a silicon capacitor, hole openings are produced in an n-doped silicon substrate, a p+ -doped region is formed at the surface thereof and this surface is provided with a dielectric layer together with a conductive layer. The si...	03/19/1996
5492596	Method of making a micromechanical silicon-on-glass tuning fork gyroscope A micromechanical tuning fork gyroscope fabricated by a dissolved silicon wafer process whereby electrostatic bonding forms a hermetic seal between an etched glass substrate, metal electrodes deposited thereon, and a silicon comb-drive tuning fork gyrosco...	02/20/1996
5445718	Electrochemical etch-stop on n-type silicon by injecting holes from a shallow p-type layer The invention generally includes a method of selectively etching a body of silicon material wherein a silicon wafer is used as a working electrode and having an n-type region and a relatively shallow p-type layer. The working electrode and a counterelectr...	08/29/1995
5436174	Method of forming trenches in monocrystalline silicon carbide A trench is formed in a monocrystalline silicon carbide substrate by amorphizing a portion of the monocrystalline silicon carbide substrate to define an amorphous silicon carbide region therein. The amorphous silicon carbide region is then removed, to pro...	07/25/1995
5431777	Methods and compositions for the selective etching of silicon Methods and compositions for the selective etching of silicon in the presence of p-doped silicon are disclosed whereby a portion of a silicon surface may be dissolved while a p-doped pattern in the surface remains substantially undissolved. The compositio...	07/11/1995
5395802	Process for making semiconductor acceleration sensor having anti-etching layer A semiconductor acceleration transducer is fabricated so that the semiconductor beam and the piezoelectric transducing element are accurately positioned relative to each other, and the impact resistance is improved. The fabrication process comprises a waf...	03/07/1995
5358908	Method of creating sharp points and other features on the surface of a semiconductor substrate A method of producing sharp points on the surface of a substrate is described. The points are useful as field emitter tips, and may also be used to collect radiant energy and for the production of micromachined objects such as micron sized gears and lever...	10/25/1994
5356829	Silicon device including a pn-junction acting as an etch-stop in a silicon substrate The method of making a silicon device including a pn-junction includes the steps of providing a p-doped monocrystalline silicon substrate (1) with a doping concentration CS ; making a pn-junction by forming a first n-doped layer portion (21) di...	10/18/1994
5310449	Process of making a solid state microanemometer A solid state microanemometer is micromachined from a crystal to a shape with four thick external sides that define an outer rectangle, four thin sections that define an inner rectangle and four diagonally directed branches interconnecting the corners of ...	05/10/1994
5242533	Method of structuring a semiconductor chip Processes are proposed for structuring monocrystalline semiconductor substrates provided with a basic doping, in particular silicon substrates with a (100) or (110) crystal orientation. In this process, at least one main surface of the semiconductor subst...	09/07/1993
5240883	Method of fabricating SOI substrate with uniform thin silicon film A thin Silicon film On Insulator (SOI) material fabricating method which is capable of providing a very high thickness uniformity of the silicon film, a process simplification and a considerable reduction of processing cost is disclosed, in which a silico...	08/31/1993
5225377	Method for micromachining semiconductor material A structure is formed from two layers of material having opposite conductivity types. A first region is formed within the structure, and extends at least in part into a layer to be etched. A surface of the structure is then masked and etched. The result i...	07/06/1993
5213657	Method for making uniform the thickness of a Si single crystal thin film A Si single crystal thin film is classified according to the thickness into several areas such that the areas where the thin film is thicker is made oxide layer-free and the areas where the thin film is thinner is covered with oxide layer. Then, oxidation...	05/25/1993
5149676	Silicon layer having increased surface area and method for manufacturing A silicon layer having an increased surface area by providing a highly granulated surface area, and a method for manufacturing the same are disclosed. The highly granulated surface of the silicon layer of the present invention provides greater surface are...	09/22/1992
5141597	Thin polysilicon resistors Polycrystalline silicon resistors are formed by reducing the initial thickness of a poly layer to a magnitude such that the etch end point of the lightly doped resistors is equal to the etch end point of the heavily doped interconnection....	08/25/1992
5129982	Selective electrochemical etching A method of selectively etching a body of a semiconductor material, such as single crystalline silicon, having regions of n-type and p-type conductivity to remove at least a portion of the n-type region. The body is placed in an etching solution of an etc...	07/14/1992

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Class 438/924 - To facilitate selective etching