Did You Know...
...that several people are credited with the invention of the flush toilet? Most people have heard of Thomas Crapper (1837-1910), the sanitary engineer who invented the valve-and-siphon arrangement that made the modern toilet possible. Another claimant to "the throne" was British inventor Alexander Cumming who patented a toilet in 1775. Then there's a nameless Minoan (a native of ancient Crete) who lived 4,000 years ago who supposedly was ahead of his time and created the first flush toilet!
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| Number | Title | Issue Date |
| 6987054 | Method of fabricating a semiconductor device having a groove formed in a resin layer A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external sh... | 01/17/2006 |
| 6855994 | Multiple-thickness gate oxide formed by oxygen implantation A semiconductor device including a gate oxide of multiple thicknesses for multiple transistors where the gate oxide thicknesses are altered through the growth process of implanted oxygen ions into selected regions of a substrate. The implanted oxygen ions accelerate... | 02/15/2005 |
| 6756290 | Method for the production of a semiconductor device A method for making a semiconductor device having a pattern of highly doped regions located some distance apart in a semiconductor substrate and regions of low doping located between the highly doped regions. A diffusion barrier material is applied to the semiconduc... | 06/29/2004 |
| 6730566 | Method for non-thermally nitrided gate formation for high voltage devices A method is provided for non-thermally nitrided gate formation of high voltage transistor devices. The non-thermally nitrided gate formation is useful in the formation of dual thickness gate dielectric structures. The non-thermally nitrided gate formation comprises ... | 05/04/2004 |
| 6660569 | Method for producing a power semiconductor device with a stop zone A method of fabricating a silicon power semiconductor with a stop zone includes forming a stop zone by driving oxygen into a semiconductor substrate in a targeted manner and subsequently heating the oxygen with the semiconductor substrate to form thermal ... | 12/09/2003 |
| 6555484 | Method for controlling the oxidation of implanted silicon Two different regions of a semiconductor substrate are implanted with dopants/ions. The implantation may occur though a sacrificial oxide layer disposed over the substrate. Following implantation in one or both regions, the substrate may be annealed and t... | 04/29/2003 |
| 6218270 | Method of manufacturing semiconductor device having shallow junction A method of manufacturing a semiconductor device having a silicon substrate containing an impurity diffusion layer is disclosed, that comprises the steps of doping impurities to the silicon substrate through a silicon oxide film with a thickness of 2.5 nm... | 04/17/2001 |
| 6057216 | Low temperature diffusion process for dopant concentration enhancement Doped semiconductor with high dopant concentrations in small semiconductor regions without excess spreading of the doped region are formed by: (a) applying a dopant-containing oxide glass layer on the semiconductor surface, (b) capping the dopant-containing ox... | 05/02/2000 |
| 5854120 | Semiconductor device manufacturing method A polysilicon film is deposited in a trench formed in a silicon element substrate. The polysilicon film in the trench and on the silicon element substrate is anisotropically etched, so that the film remains on the side wall of the trench. The polysilicon ... | 12/29/1998 |
| 5728624 | Bonded wafer processing Low temperature wafer bonding using a silicon-oxidizing bonding liquid permits introduction of radiation hardening dopants and electrically active dopants as constituents of the bonding liquid. Oxidizers such as nitric acid may be used in the bonding liqu... | 03/17/1998 |
| 5691212 | MOS device structure and integration method This invention describes a new method for forming self-aligned silicide for application in MOSFET, and a new structure of MOSFET device featuring elevated source and drain, with the objectives of reducing silicide penetration into the source and drain jun... | 11/25/1997 |
| 5648282 | Autodoping prevention and oxide layer formation apparatus To form a MOS transistor with a LDD structure, the transistor is formed in a well region. There is formed a gate oxide layer on a silicon substrate and an N+ type poly-silicon layer serving as a gate electrode is formed on the gate oxide layer... | 07/15/1997 |
| 5643810 | Methods of forming BiCMOS semiconductor devices Methods of forming BiCMOS semiconductor devices include steps for forming bird's beak shaped oxide extensions between the gate electrodes and drain and source regions of CMOS devices to inhibit drain leakage currents and reduce gate-to-drain capacitance. ... | 07/01/1997 |
| 5578502 | Photovoltaic cell manufacturing process Provided is a method for controlling electrical properties and morphology of a p-type material of a photovoltaic device. The p-type material, such as p-type cadmium telluride, is first subjected to heat treatment in an oxidizing environment, followed by r... | 11/26/1996 |
| 5506169 | Method for reducing lateral dopant diffusion A process is disclosed for inhibiting lateral diffusion of dopants in a semiconductive material. At least one conductivity dependent region is formed in the semiconductor, and a blocking layer is provided in overlying relation with the conductivity depend... | 04/09/1996 |
| 5308789 | Method of preparing diffused silicon device substrate In a method of preparing a diffused silicon device substrate for use in the fabrication of a MOS power device, a drive-in diffusion step is followed by a thermal donor formation heat treatment which is achieved by heating the silicon device substrate at a... | 05/03/1994 |
| 5278095 | Method for making passivated mesa semiconductor A process for forming a semiconductor device begins by diffusing an N layer having a relatively high concentration into a P wafer having a relatively low concentration. Next, the wafer is etched to yield a plurality of mesa semiconductor structures, each ... | 01/11/1994 |
| 5219783 | Method of making semiconductor well structure A method of forming doped well regions in a semiconductor layer 14 is disclosed herein. At least one n-doped region 30 and at least one p-doped region 36 are formed in the semiconductor layer 14. The n-doped region 30 is separated from the p-doped region ... | 06/15/1993 |
| 5188978 | Controlled silicon doping of III-V compounds by thermal oxidation of silicon capping layer The method for silicon doping of III-V compounds by depositing a layer of silicon on the surface of a III-V compound substrate and subjecting the silicon capped substrate to thermal oxidation at temperatures and in an oxidizing atmosphere sufficient to ca... | 02/23/1993 |
| 5171708 | Method of boron diffusion into semiconductor wafers having reduced stacking faults A method of diffusing boron into semiconductor wafers is disclosed which essentially includes boron deposition and boron diffusion. The deposition is performed from 900° to 1,000° C. and the diffusion at a temperature of 890° to 1000° C. Oxidation ind... | 12/15/1992 |
| 4980315 | Method of making a passivated P-N junction in mesa semiconductor structure A process for forming a semiconductor device begins by diffusing an N layer having a relatively high concentration into a P wafer having a relatively low concentraton. Next, the wafer is etched to yield a plurality of mesa semiconductor structures, each h... | 12/25/1990 |
| 4960731 | Method of making a power diode with high reverse voltage rating In making a power diode with high reverse voltage rating, corrosion of the silicon wafer surface by gettering substances is avoided by employing two different diffusion steps. In the first step, boron and phosphorus are respectively applied to opposing ma... | 10/02/1990 |
| 4925806 | Method for making a doped well in a semiconductor substrate A method for making a dopant well in a semiconductor substrate, wherein a dopant is implanted directly into an exposed surface of a semiconductor substrate through an opening in a dopant-absorbing coating and the substrate is heated to drive the implanted... | 05/15/1990 |
| 4897154 | Post dry-etch cleaning method for restoring wafer properties A post dry etching process for restoring wafers damaged by dry etching such as RIE, comprising the steps of removing any dry etch residue layer from the etched portions of the wafer and forming an oxide on those etched portions; rapid thermal annealing th... | 01/30/1990 |
| 4806499 | Method of manufacturing Bi-CMOS semiconductor IC devices using dopant rediffusion The invention relates to a method of manufacturing a Bi-CMOS semiconductor IC device in which the bipolar transistor structure contained therein has a flat PN plane junction between its base and emitter regions, said device having improved breakdown volta... | 02/21/1989 |
| 4784964 | EPI defect reduction using rapid thermal annealing Formation of defects in epi-layers above buried layers, particularly above arsenic buried layers, is substantially reduced by providing a brief high temperature Rapid Thermal Annealing (RTA) step after buried layer implantation, annealing-activation, and ... | 11/15/1988 |
| 4761385 | Forming a trench capacitor A trench capacitor having increased capacitance. By means of the oxidation enhanced diffusion (OED) effect, locally outdiffused regions in the doped substrate of a semiconductor material may be formed. Thus, greater capacitance can be achieved for a trenc... | 08/02/1988 |
| 4725564 | Method of manufacturing a semiconductor device, in which a dopant is diffused from its oxide into a semiconductor body A method of manufacturing a semiconductor device, in which a layer (12) comprising silica and an oxide of a dopant is provided on a surface (9) of a silicon semiconductor body (1). The semiconductor body is then subjected to a heat treatment at a temperat... | 02/16/1988 |
| 4720469 | Method for diffusing aluminum For the p-type doping of silicon, particularly for power semiconductor components, aluminum from an Al target is precipitated by cathode sputtering in an argon plasma on a major face (2) of a silicon wafer (1) by which means a comparatively high purity of... | 01/19/1988 |
| 4717687 | Method for providing buried layer delineation A simplified process is used to obtain pattern delineation for a buried layer by making use of the metastable state of silicon to grow oxide at different rates on the surface of the silicon. A silicon substrate having dopants implanted in a predetermined ... | 01/05/1988 |
| 4682407 | Means and method for stabilizing polycrystalline semiconductor layers Implantation of oxygen or nitrogen in polysilicon layers to a dose above about 1015 ions/cm2 retards rapid grain boundary migration of conventional dopants such as B, P, As, Sb, and the like during dopant activation. Pre-annealing of... | 07/28/1987 |
| 4514440 | Spin-on dopant method A single step method for boron dopant diffusion implementing both deposition and drive-in diffusions in one furnace process is provided. By using a spin-on dopant in a diffusion furnace with pyrogenic steam and thermal ramping capabilities, sheet resistiv... | 04/30/1985 |
| 4471524 | Method for manufacturing an insulated gate field effect transistor device An overall method for manufacturing an IGFET device having extremely shallow source and drain regions and reduced gate to source and drain overlap capacitances is disclosed. For silicon MOS devices, the method also provides for the formation of metal sili... | 09/18/1984 |
| 4472212 | Method for fabricating a semiconductor device A method for forming a shallow and highly concentrated arsenic doped surface layer in a silicon bulk region includes the steps of forming an arsenic doped polysilicon layer in contact with a preselected area of a bulk region surface in which the surface l... | 09/18/1984 |
| 4437897 | Fabrication process for a shallow emitter/base transistor using same polycrystalline layer A method for fabricating a high performance bipolar device having a shallow emitter and a narrow intrinsic base region is described. The method uses a minimum number of process steps. The method involves providing a silicon semiconductor body having regio... | 03/20/1984 |
| 4409726 | Method of making well regions for CMOS devices This invention significantly reduces the problem of undesired lateral diffusion of P type dopants into the P type active area. A thin oxide/nitride sandwich is formed on the surface of a semiconductor wafer and patterned to serve as a mask defining the to... | 10/18/1983 |
| 4403392 | Method of manufacturing a semiconductor device A method for manufacturing a semiconductor device having a high breakdown voltage and a high reliability, comprises (a) forming on a semiconductor substrate an insulating layer having a diffusion window; (b) forming an impurity-doped poly-silicon layer on... | 09/13/1983 |
| 4306915 | Method of making electrode wiring regions and impurity doped regions self-aligned therefrom A semiconductor device suitable for a high-density integrated circuit is disclosed. The semiconductor device comprises an electrode wiring layer made of silicon with a substantially flat surface deposited on a major surface of a semiconductor substrate, t... | 12/22/1981 |
| 4301588 | Consumable amorphous or polysilicon emitter process The process employs ion implantation for precise dopant control. The implantation is performed into a thin layer of amorphous silicon covering the emitter and collector opening. The implantation energy is chosen so that the damage is confined to the amorp... | 11/24/1981 |
| 4295266 | Method of manufacturing bulk CMOS integrated circuits The method presented may be utilized in manufacturing CMOS integrated circuits either in an isoplanar or in a LOCOS process. The method entails the simultaneous formation of the well region with the oxide isolation regions by a drive-in diffusion which is... | 10/20/1981 |
