Class 438/917 - Deep level dopants (e.g., gold (Au), chromium (Cr), iron (Fe), nickel (Ni), etc.)

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Art collection under 914 involving the utilization of dopants
No. of patents: 23
Last issue date: 10/07/2008

Number	Title	Issue Date
7432171	Silicon carbide and related wide-bandgap transistors on semi-insulating epitaxy for high-speed, high-power applications A silicon carbide semi-insulating epitaxy layer is used to create power devices and integrated circuits having significant performance advantages over conventional devices. A silicon carbide semi-insulating layer is formed on a substrate, such as a conducting substr...	10/07/2008
7041530	Method of production of nano particle dispersed composite material A method of the production of a nanoparticle dispersed composite material capable of controlling a particle size and a three dimensional arrangement of the nanoparticles is provided. The method of the production of a nanoparticle dispersed composite material of the ...	05/09/2006
6960486	Mid-IR microchip laser: ZnS:Cr2+ laser with saturable absorber material A method of fabrication of laser gain material and utilization of such media includes the steps of introducing a transitional metal, preferably Cr2+ thin film of controllable thickness on the ZnS crystal facets after crystal growth by means of pulse laser...	11/01/2005
6884718	Semiconductor manufacturing process and apparatus for modifying in-film stress of thin films, and product formed thereby An apparatus and process for depositing a barrier film on a substrate is disclosed. In particular, deposition of the barrier film is carried out on the substrate having an applied pressure. This applied pressure flexes the substrate to reduce in-plane stresses, wher...	04/26/2005
6878579	Semiconductor device and method of manufacturing the same An aspect of the present invention includes a first conductive type semiconductor region; a gate electrode formed on the first conductive type semiconductor region; a channel region formed immediately below the gate electrode in the first conductive type semiconduct...	04/12/2005
6747352	Integrated circuit having multiple power/ground connections to a single external terminal An integrated circuit having multiple power/ground connections to a single external terminal and method for manufacturing an integrated circuit provides an integrated circuit having a reduced number of external power/ground terminals. The multiple connections may be...	06/08/2004
6432844	Implanted conductor and methods of making The present invention is directed toward the formation of implanted thermally and electrically conductive structures in a dielectric. An electrically conductive structure, such as an interconnect is formed through ion implantation into several levels with...	08/13/2002
5960322	Suppression of boron segregation for shallow source and drain junctions in semiconductors A method in the manufacture of ultra-large scale integrated circuit semiconductor devices suppresses boron loss due to segregation into the screen oxide during the boron activation rapid thermal anneal. A nitridation of the screen oxide is used to incorpo...	09/28/1999
5679603	Method of making semiconductor device including high resistivity layer A high resistance compound semiconductor layer included in a semiconductor device including a plurality of compound semiconductor layers having different compositions includes a compound semiconductor that is vapor phase grown employing an organic metal c...	10/21/1997
5661053	Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers Techniques of forming a flash EEPROM cell array with the size of individual cells being reduced, thereby increasing the number of cells which may be formed on a semiconductor substrate of a given size. Use of dielectric spacers in several steps of the pro...	08/26/1997
5441900	CMOS latchup suppression by localized minority carrier lifetime reduction A unique approach to suppressing latchup in CMOS structures is described. Atomic species that exhibit midgap levels in silicon and satisfy the criteria for localized action and electrical compatibility can be implanted to suppress the parasitic bipolar be...	08/15/1995
5283202	IGBT device with platinum lifetime control having gradient or profile tailored platinum diffusion regions For IGBT, MCT or like devices, the substrate is formed with P+, N+ and N- layers and PN diffusions to define body and source regions in the N-layer and a MOS-gated channel at the upper surface. The N-layer is sized and doped (~1014 /cm3	02/01/1994
5252512	TEOV doping of gallium arsenide GaAs films compensated with TEOV to reduce free electron concentration are grown having superior morphology by heating the TEOV above the temperature used in the prior art, filtering the other constituents but not the TEOV, and reducing the arsenic ambien...	10/12/1993
5227315	Process of introduction and diffusion of platinum ions in a slice of silicon A process is provided for introduction and diffusion of platinum ions in a slice of silicon material. The slice of silicon is subjected to a succession of thermal steps at high temperature for the formation of at least one semiconductor device. Later proc...	07/13/1993
5060110	High frequency MOSCAP A MOSCAP that includes a semiconductor layer (103) having gold impurities sufficient to increase the density of deep recombination traps in the semiconductor bandgap. During operation of the MOSCAP in high frequency, reverse bias operating conditions, the...	10/22/1991
4853077	Process for the preparation of mono-crystalline 3-5 semi-insulating materials by doping and use of the semi-insulating materials thus obtained The present invention relates to a process for the preparation of mono-crystalline 3-5 semi-insulating materails by doping, characterized in that the starting charge of type .rho. is doped with at least one deep donor due to a transition element. It relat...	08/01/1989
4755856	Znse green light emitting diode A green color light emitting ZnSe diode having a pn junction is fabricated by the use of a ZnSe crystal having a good crystal perfection and being obtained by a solution growth method relying on the temperature difference technique using a solvent contain...	07/05/1988
4717588	Metal redistribution by rapid thermal processing A method for diffusing a metal dopant into a semiconductor switching device is provided by the use of a rapid thermal heating apparatus. This method provides a procedure for the selectively placing of a metal dopant in a region of the device or circuit. T...	01/05/1988
4578126	Liquid phase epitaxial growth process A liquid phase epitaxial growth process for particular use in growing semi-insulating epitaxial layers of III-V semiconductor compounds such as indium phosphide, indium gallium arsenide, and indium gallium arsenide phosphide. The high resistivity of the l...	03/25/1986
4203780	Fe Ion implantation into semiconductor substrate for reduced lifetime sensitivity to temperature A method of an iron Fe ion implantation into a semiconductor substrate of an N-type conductivity is disclosed. The method comprises the steps of implanting Fe ions into an N-type semiconductor substrate from its one surface with the dose amount of 10...	05/20/1980
4160261	MIS Heterojunction structures In a metal-insulator-semiconductor (MIS) structure, the I-layer comprises a single-crystal, semi-insulating layer which forms a substantially lattice-matched heterojunction with the underlying S-layer. Illustratively, the structure, grown by MBE, includes...	07/03/1979
4107731	Silicon doped with cadmium to reduce lifetime A semiconductor device is doped with a multiple acceptor impurity having a monovalent energy level for forming a recombination center of carriers within the semiconductor body, and at least one multivalent energy level for capturing carriers within a depl...	08/15/1978
3953243	Method for setting the lifetime of charge carriers in semiconductor bodies A method of setting the lifetime of charge carriers in a semiconductor body by the formation of recombination centers in the semiconductor body. The quantity of the recombination centers forming material necessary to provide the desired concentration in t...	04/27/1976

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Class 438/917 - Deep level dopants (e.g., gold (Au), chromium (Cr), iron (Fe), nickel (Ni), etc.)