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Class 438/903 - CATALYST AIDED DEPOSITION


Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Art collection involving the use of a catalyst to facilitate
No. of patents: 49
Last issue date: 08/12/2008


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NumberTitleIssue Date
7410911Method for stabilizing high pressure oxidation of a semiconductor device
A method and apparatus for preventing N2O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace are disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N2O ...
08/12/2008
7333695Singulated dies in a parallel optics module
A parallel optics module including singulated dies. A first singulated die includes a first semiconductor optical component, and a second die includes a second semiconductor optical component. The first and second dies are mounted to a substrate. The first and secon...
02/19/2008
7282457Apparatus for stabilizing high pressure oxidation of a semiconductor device
A method and apparatus for preventing N2O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace is disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N2O a...
10/16/2007
7241690Method for conditioning a microelectronics device deposition chamber
The present invention provides, in one aspect, a method of conditioning a deposition chamber 100. An undercoat is placed on the walls of a deposition chamber 100 and a pre-deposition coat is deposited over the undercoat with a plasma gas mixture conducted at a high ...
07/10/2007
7202935Imprinting apparatus with independently actuating separable modules
An imprinting apparatus including a plate unit, and a plurality of imprinting modules provided on a lower surface of the plate unit. Each imprinting module is self-aligned by a compliance of six degree of freedom and vertically moved along with the plate unit by a c...
04/10/2007
7183131Process for producing a nanoelement arrangement, and nanoelement arrangement
A process for producing a nanoelement arrangement and to a nanoelement arrangement. A first nanoelement is at least partially covered with catalyst material for catalyzing the growth of nanoelements. Furthermore, at least one second nanoelement is grown on the catal...
02/27/2007
7044821Method of manufacturing a plasma display panel by decomposing impurities in exhaust gas with a catalyst
Plural first exhaust pipes are disposed as exhaust paths at an upper portion of a heat treatment apparatus. Exhaust gases are discharged from the inside of the heat treatment apparatus to the respective exhaust pipes. Inlets of catalyst units are connected to outlet...
05/16/2006
6992000Method of plating nonconductor product
A nonconductor product is soaked in a solution suspending a semiconducting powder and is subjected to light irradiation in the solution so that polar group is formed on the surface of the nonconductor product, and then electroless plating is performed on the surface...
01/31/2006
6955996Method for stabilizing high pressure oxidation of a semiconductor device
A method and apparatus for preventing N2O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace are disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N2O ...
10/18/2005
6949478Oxide film forming method
A method of forming an oxide film having high insularity capability is performed within an ultra clean environment, using charged particles. ...
09/27/2005
6936906Integration of barrier layer and seed layer
The present invention generally relates to filling of a feature by depositing a barrier layer, depositing a seed layer over the barrier layer, and depositing a conductive layer over the seed layer. In one embodiment, the seed layer comprises a copper alloy seed laye...
08/30/2005
6844260Insitu post atomic layer deposition destruction of active species
Systems and methods for insitu post atomic layer deposition (ALD) destruction of active species are provided. ALD processes deposit multiple atomic layers on a substrate. Pre-cursor gases typically enter a reactor and react with the substrate resulting in a monolaye...
01/18/2005
6827790Apparatus for stabilizing high pressure oxidation of a semiconductor device
a method and apparatus for preventing N2O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace are disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N2O ...
12/07/2004
6780664Nanotube tip for atomic force microscope
Various microscopy probes and methods of fabricating the same are provided. In one aspect, a method of fabricating a microscopy probe is provided that includes providing a member and forming a first film on the member. The first film fosters growth of carbon nanotub...
08/24/2004
6774052Method of making nanotube permeable base transistor
A method of making a permeable base transistor (PBT) is disclosed. According to the method, a semiconductor substrate is provided, a base layer is provided on the substrate, and a semiconductor layer is grown over the base layer. The base layer includes metallic nan...
08/10/2004
6653212Method and apparatus for thin-film deposition, and method of manufacturing thin-film semiconductor device
A thin film forming apparatus S having a vacuum chamber 1, a substrate 10, a thermal catalyst 5, and a heating means 5a for heating this thermal catalyst 5, wherein a gas introduction system 3 for feeding the gas is connected in the vacuum chamber 1, the ...
11/25/2003
6596651Method for stabilizing high pressure oxidation of a semiconductor device
A method and apparatus for preventing N2 O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace are disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N
07/22/2003
6495458Method for producing low carbon/oxygen conductive layers
The present invention provides a method for forming a substantially carbon- and oxygen-free conductive layer, wherein the layer can contain a metal and/or a metalloid material. According to the present invention, a substantially carbon- and oxygen-free co...
12/17/2002
6451694Control of abnormal growth in dichloro silane (DCS) based CVD polycide WSix films
In a process for mitigating and/or eliminating the abnormal growth of underlying polysilicon in dichloro silane-based CVD polycide WSix films, a first technique conducts the deposition of the underlying polysilicon layer at a temperature that substantiall...
09/17/2002
6423649Method and apparatus for stabilizing high pressure oxidation of a semiconductor device
A method and apparatus for preventing N2 O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace are disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N
07/23/2002
6294404Semiconductor integrated circuit having function of reducing a power consumption and semiconductor integrated circuit system comprising this semiconductor integrated circuit
A semiconductor integrated circuit according to the present invention comprises a synchronous SRAM, a signal generation circuit generating a chip selection signal, a clock signal etc. supplied to the synchronous SRAM, a voltage set circuit setting the vol...
09/25/2001
6291364Method and apparatus for stabilizing high pressure oxidation of a semiconductor device
A method and apparatus for preventing N2 O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace are disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N
09/18/2001
6126989Copper electroless deposition on a titanium-containing surface
A method for depositing copper on a titanium-containing surface of a substrate is provided. The method includes forming a patterned catalyst material on the substrate, such that the titanium-containing surface is exposed in selected regions. The catalyst ...
10/03/2000
5792705Optimized planarization process for SOG filled vias
A planarization process, featuring removal of spin on glass, used to fill narrow spaces between metal lines, has been developed. A dual dielectric, of underlying silicon oxide, and overlying silicon nitride, are initially used to passivate the metal lines...
08/11/1998
5508228Compliant electrically connective bumps for an adhesive flip chip integrated circuit device and methods for forming same
Compliant electrically connection bumps for an adhesive flip chip integrated circuit device and various methods for forming the bumps include the steps of forming polymer bumps on a substrate or an integrated circuit die and coating the polymer bumps with...
04/16/1996
5470800Method for forming an interlayer film
A process for forming an interlayer membrane by chemical vapor deposition comprises the steps of supplying gaseous materials to a reaction chamber in which a wafer to be deposited is installed, supplying a catalyst gas to the reaction chamber separately f...
11/28/1995
5366919Method of making a memory cell of a semiconductor memory device
A method of making a memory cell having a transistor and a capacitor of a semiconductor memory device comprises the steps of: forming on a substrate on a surface of which the transistor is formed, an interlayer insulating film having a contact hole reachi...
11/22/1994
5360768Method of forming oxide film
The present invention relates to a method of forming an oxide film comprising; a first step to form an oxide film on the surface of a substrate by bringing a solution containing oxygen and/or oxygen-containing molecule in contact with the surface of said ...
11/01/1994
5290721Method of making a stacked semiconductor nonvolatile memory device
This invention is directed to a process for the fabrication of a stacked semiconductor nonvolatile memory device, which process is adapted to define a longitudinal length of a floating gate in self-alignment with overlying control gate and interlayer insu...
03/01/1994
5231056Tungsten silicide (WSix) deposition process for semiconductor manufacture
A semiconductor manufacturing process for depositing a tungsten silicide film on a substrate includes deposition of a tungsten silicide nucleation layer on the substrate using a (CVD) process with a silane source gas followed by deposition of the tungsten...
07/27/1993
5198389Method of metallizing contact holes in a semiconductor device
A TiW layer (14 and 14') between a nickel plug (16 and 16') and a silicon substrate (1) of a semiconductor device precludes the formation of nickel silicides. The nickel plugs are formed by means of an electroless nickel bath to which stabilizers are adde...
03/30/1993
5063169Selectively plating conductive pillars in manufacturing a semiconductor device
Electrical connection to a device region (3,4) of a semiconductor device is formed by providing a semiconductor body (1) having adjacent one major surface (12) a device region (3,4) bounded by an insulating region (19a,19b,9), providing an activating laye...
11/05/1991
4897150Method of direct write desposition of a conductor on a semiconductor
An improved method of patterning a conductive interconnect on a semiconductor element is disclosed. A catalytic layer of, for example, amorphous silicon is deposited on a semiconductor element. The areas over which a conductive pattern is to be formed is ...
01/30/1990
4873119Catalytic deposition of semiconductors
The invention provides a method for preparing amorphous semiconductors by (a) activating a semiconductane gas using a activator to produce mononuclear, reactive fragments or gaseous condensation products which serve as precursors for the deposition of an ...
10/10/1989
4843030Semiconductor processing by a combination of photolytic, pyrolytic and catalytic processes
A semiconductor processing method is provided for growing a semiconductor film from a semiconductorbearing gas on a substrate at a substrate temperature below the pyrolytic threshold of the gas. The gas is photodissociated to a collisionally stable specie...
06/27/1989
4822749Self-aligned metallization for semiconductor device and process using selectively deposited tungsten
A self-aligned metallization for an MOS device is described in which a first layer of tungsten is selectively deposited on the exposed silicon surfaces of the device including at least the source, drain and gate regions of the device, a layer of material ...
04/18/1989
4784963Method for light-induced photolytic deposition simultaneously independently controlling at least two different frequency radiations during the process
Semiconductor components which have a plurality of layers lying on top of one another are manufactured with the assistance of a method for light-induced, photolytic deposition. Particularly, periodically alternating layers (hyperfine structure elements) a...
11/15/1988
4735921Nitridation of silicon and other semiconductors using alkali metal catalysts
Nitride layers are formed on semiconductor substrates utilizing alkali metals as catalysts. The surface of the semiconductor substrate first has a thin layer of an alkali metal deposited thereon and then is exposed to nitrogen from a nitrogen source at te...
04/05/1988
4701347Method for growing patterned metal layers
Patterned metal growth is obtained on a substrate by illuminating the substrate in the presence of a metal containing molecule adsorbed on the substrate. After initial illumination, the photoreacted molecules catalyze further metal growth without further ...
10/20/1987
4696834Silicon-containing coatings and a method for their preparation
The invention relates to the formation of silicon-containing coatings from the vapor phase thermal decomposition of halosilanes, polyhalodisilanes, polyhalosilanes or mixtures thereof in the presence of a metal catalyst. The instant invention also relates...
09/29/1987
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