Class 438/902 - CAPPING LAYER

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Art collection involving the use of an overlayer serving
No. of patents: 105
Last issue date: 05/01/2007

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Number	Title	Issue Date
7211481	Method to strain NMOS devices while mitigating dopant diffusion for PMOS using a capped poly layer The present invention facilitates semiconductor fabrication by providing methods of fabrication that apply tensile strain to channel regions of devices while mitigating unwanted dopant diffusion, which degrades device performance. Source/drain regions are formed in ...	05/01/2007
7172960	Multi-layer film stack for extinction of substrate reflections during patterning A method including introducing a dielectric layer over a substrate between an interconnection line and the substrate, the dielectric layer comprising a plurality of alternating material layers; and patterning an interconnection to the substrate. An apparatus compris...	02/06/2007
7141494	Method for reducing tungsten film roughness and improving step coverage A tungsten nucleation film is formed on a surface of a semiconductor substrate by alternatively providing to that surface, reducing gases and tungsten-containing gases. Each cycle of the method provides for one or more monolayers of the tungsten film. The film is co...	11/28/2006
7091601	Method of fabricating an apparatus including a sealed cavity A method of fabricating an apparatus including a sealed cavity and an apparatus embodying the method is disclosed. To fabricate the apparatus, a device chip including a substrate and at least one circuit element on the substrate is fabricated. Also, a cap is fabrica...	08/15/2006
7084060	Forming capping layer over metal wire structure using selective atomic layer deposition Methods of forming a capping layer over a metal wire structure of a semiconductor device are disclosed. In one embodiment, the method includes providing a partially fabricated semiconductor device having exposed surfaces of the metal (e.g., copper) wire structure an...	08/01/2006
7008885	Chemical treatment of semiconductor substrates A method is disclosed for removing liquids from a semiconductor substrate by contacting the liquid on the substrate with a liquid which attracts the liquid on the substrate, separating the liquids from the substrate, and inducing a phase transition in a layer on the...	03/07/2006
6972252	Method of improving adhesion between two dielectric films A method of improving adhesion between layers in the formation of a semiconductor device and integrated circuit, and the resultant intermediate semiconductor structure, which include a substrate layer with a low k insulating layer thereover. The low k insulating lay...	12/06/2005
6929831	Methods of forming nitride films A silicon nitride film, for example, is deposited by introducing into a plasma region of a chamber a silicon containing gas, molecular nitrogen and sufficient hydrogen to dissociate the nitrogen to allow the silicon and nitrogen to react to form a silicon nitride fi...	08/16/2005
6913946	Method of making an ultimate low dielectric device A method of making a semiconductor device comprising: providing a semiconductor substrate having a plurality of discrete devices formed therein, and a plurality of metal layers and support layers, the support layers comprising an uppermost support layer and other su...	07/05/2005
6884641	Site-specific methodology for localization and analyzing junction defects in mosfet devices This invention relates to a method for electrically localizing site-specific defective sub 130 nm node MOSFET devices with shallow (less than 80 nm deep) source/drain junctions utilizing bulk silicon, or Silicon on Insulator (SOI), or strained silicon (SE), followed...	04/26/2005
6838369	Method for forming contact hole of semiconductor device A method for forming a contact hole of a semiconductor device, wherein a polymer residual on a bottom surface of the contact hole is treated with plasma of mixture gas containing oxygen to convert the polymer residual into a pure silicon oxide film free of carbon an...	01/04/2005
6808975	Method for forming a self-aligned contact hole in a semiconductor device A method for forming a self-aligned contact hole includes forming a plurality of conductive structures on a semiconductor substrate, each conductive structure including a conductive film pattern and a protection pattern formed on the conductive film pattern, forming...	10/26/2004
6790778	Method for capping over a copper layer A method for capping over a copper layer. A copper layer is deposited overlying a substrate. The copper surface is treated with hydrogen-containing plasma to remove copper oxides formed thereon, thereby suppressing copper hillock formation. The treated copper surfac...	09/14/2004
6787462	Method of manufacturing semiconductor device having buried metal wiring A metal wiring buried in an insulating layer is subjected to a reducing treatment prior to formation of a second insulating layer on the insulating layer under the condition that the total partial pressure of oxygen and water vapor is sufficiently low. ...	09/07/2004
6784084	Method for fabricating semiconductor device capable of reducing seam generations The present invention is related to a method for fabricating a semiconductor device capable of preventing occurrences of void and seam phenomena caused by a negative slope of an insulation layer or a bowing profile phenomenon in a cross-sectioned etch profile of a c...	08/31/2004
6784074	Defect-free semiconductor templates for epitaxial growth and method of making same A method for fabrication of defect-free epitaxial layers on top of a surface of a first defect-containing solid state material includes the steps of selective deposition of a second material, having a high temperature stability, on defect-free regions of the first s...	08/31/2004
6774058	Chemical treatment of semiconductor substrates A method is disclosed for removing liquids from a semiconductor substrate by contacting the liquid on the substrate with a liquid which attracts the liquid on the substrate, separating the liquids from the substrate, and inducing a phase transition in a layer on the...	08/10/2004
6756321	Method for forming a capping layer over a low-k dielectric with improved adhesion and reduced dielectric constant A method for forming a capping layer for improved adhesion with an underlying insulating layer in a multiple layer semiconductor device manufacturing process including providing a semiconductor wafer including a process surface comprising a dielectric insulating lay...	06/29/2004
6689673	Method for forming a gate with metal silicide The proposed invention is related to a method for forming a gate with metal silicide. In short, the proposed method comprises the following steps: providing a substrate; forming a first dielectric layer on the substrate; forming a polysilicon layer on the...	02/10/2004
6660634	Method of forming reliable capped copper interconnects The adhesion of a diffusion barrier or capping layer to a Cu or Cu alloy interconnect member is significantly enhanced by treating the exposed surface of the Cu or Cu alloy interconnect member: (a) under plasma conditions with ammonia and silane or dichlo...	12/09/2003
6653166	Semiconductor device and method of making same The method produces coherent dislocation-free regions from initially dislocated and/or defect-rich lattice mismatched layer grown on top of the substrate having a different lattice constant, which does not contain any processing steps before of after the ...	11/25/2003
6645829	Silicon wafer with embedded optoelectronic material for monolithic OEIC A structure and method of fabricating an optically active layer embedded in a Si wafer, such that the outermost epitaxial layer exposed to the CMOS processing equipment is always Si or another CMOS-compatible material such as SiO2. Since the op...	11/11/2003
6562544	Method and apparatus for improving accuracy in photolithographic processing of substrates This invention provides a method and apparatus for depositing a silicon oxide film over an antireflective layer to reduce footing experienced in the a subsequently applied photoresist layer without substantially altering the optical qualities of the antir...	05/13/2003
6455424	Selective cap layers over recessed polysilicon plugs Methods are provided for selective formation of oxidation-resistant caps for conductive plugs in semiconductor device fabrication. One embodiment of the present invention forms a sacrificial layer over a recessed polysilicon plug. The sacrificial layer is...	09/24/2002
6420214	Method of forming an integrated circuit device having cyanate ester buffer coat An integrated circuit including a fabricated die having a cyanate ester buffer coating material thereon. The cyanate ester buffer coating material includes one or more openings for access to the die. A package device may be connected to the die bond pads ...	07/16/2002
6410427	Metal silicidation methods and methods for using same A method for use in the fabrication of semiconductor devices includes forming a layer of nitridated cobalt on a surface including silicon. A film cap including titanium is formed over the layer of cobalt and a thermal treatment is performed to form cobalt...	06/25/2002
6368885	Method for manufacturing a micromechanical component A method for manufacturing a micromechanical component, in particular, a surface-micromechanical yaw sensor, includes the following steps: providing a substrate having a front side and a back side; forming a micromechanical pattern on the front side; appl...	04/09/2002
6261887	Transistors with independently formed gate structures and method Transistors may be fabricated by isolating a first region (16) of a semiconductor layer from a second region (18) of the semiconductor layer (12). A first disposable gate structure (26) of the first transistor may be formed over the first region (16) of t...	07/17/2001
6255213	Method of forming a structure upon a semiconductive substrate An electrically conductive apparatus includes, a) an electrically non-conducting substrate, the substrate having a base surface and an adjacent elevated surface, the elevated surface being spaced from the base surface by a first distance thereby defining ...	07/03/2001
6214713	Two step cap nitride deposition for forming gate electrodes A method for forming the gate electrode in an integrated circuit, in which a cap silicon nitride layer is deposited in a two step process to improve the condition of silicon nitride residue remaining on the surface of tungsten silicide. First, a layer of ...	04/10/2001
6211078	Method of improving resist adhesion for use in patterning conductive layers A method for use in patterning a conductive layer of an integrated circuit includes providing a conductive layer to be patterned and then forming a titanium nitride layer on the conductive layer. An oxide region is formed on the titanium nitride layer. A ...	04/03/2001
6187632	Anneal technique for reducing amount of electronic trap in gate oxide film of transistor A memory cell of EEPROM having a floating gate, a control gate, a drain region, and a source region is formed on a silicon substrate. Thereafter, a BPSG film (interlayer insulating film) covering the memory cell is formed by CVD. After a wire including a ...	02/13/2001
6184158	Inductively coupled plasma CVD A method of depositing a dielectric film on a substrate in a process chamber of an inductively coupled plasma-enhanced chemical vapor deposition reactor. Gap filling between electrically conductive lines on a semiconductor substrate and depositing a cap l...	02/06/2001
6153542	Method of manufacturing semiconductor devices In a method of manufacturing a semiconductor device, a first plasma insulating film having a thickness of 0.1 μm or more is formed on the semiconductor substrate with lower-surface wirings thereon. The semiconductor substrate is moved into a pressure-red...	11/28/2000
6114186	Hydrogen silsesquioxane thin films for low capacitance structures in integrated circuits An improved method is provided for integrating HSQ into integrated circuit structures and processes, especially those requiring multiple levels of interconnect lines. In a preferred embodiment, interconnect lines 14 are first patterned and etched on a sub...	09/05/2000
6100184	Method of making a dual damascene interconnect structure using low dielectric constant material for an inter-level dielectric layer A technique for fabricating a dual damascene interconnect structure using a low dielectric constant material as a dielectric layer or layers. A low dielectric constant (low-.di-elect cons.) dielectric material is used to form an inter-level dielectric (IL...	08/08/2000
6093643	Electrically conductive projections and semiconductor processing method of forming same An electrically conductive apparatus includes, a) an electrically non-conducting substrate, the substrate having a base surface and an adjacent elevated surface, the elevated surface being spaced from the base surface by a first distance thereby defining ...	07/25/2000
6087276	Method of making a TFT having an ion plated silicon dioxide capping layer A method of making a polysilicon thin-film transistor is presented. Device characteristics are improved when a silicon dioxide capping layer is formed by an ion plating method....	07/11/2000
6083817	Cobalt silicidation using tungsten nitride capping layer A substantially inert capping layer of tungsten nitride is deposited on cobalt layers prior to silicidation, thereby avoiding any substantial interaction with cobalt. The tungsten nitride capping layer also functions as a diffusion barrier preventing oxyg...	07/04/2000
6060343	Method of forming an integrated circuit device having cyanate ester buffer coat An integrated circuit including a fabricated die having a cyanate ester buffer coating material thereon. The cyanate ester buffer coating material includes one or more openings for access to the die. A package device may be connected to the die bond pads ...	05/09/2000

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Class 438/902 - CAPPING LAYER