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| Number | Title | Issue Date |
| 8168549 | Method of manufacturing semiconductor device and substrate processing apparatus There are provided a method of manufacturing a semiconductor device and a substrate processing apparatus by which the quality of a silicon nitride film can be improved. The method comprises: (a) supplying a silicon-containing gas into a process chamber accommodating... | 05/01/2012 |
| 8138104 | Method to increase silicon nitride tensile stress using nitrogen plasma in-situ treatment and ex-situ UV cure Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitrid... | 03/20/2012 |
| 8129290 | Method to increase tensile stress of silicon nitride films using a post PECVD deposition UV cure High tensile stress in a deposited layer such as silicon nitride, may be achieved utilizing one or more techniques, employed alone or in combination. High tensile stress may be achieved by forming a silicon-containing layer on a surface by exposing the surface to a ... | 03/06/2012 |
| 8088694 | Method for forming a multiple layer passivation film and a device incorporating the same A method of forming a multiple layer passivation film on a semiconductor device surface comprises placing a semiconductor device in a chemical vapor deposition reactor, introducing a nitrogen source into the reactor, introducing a carbon source into the reactor, dep... | 01/03/2012 |
| 8058185 | Method of fabricating semiconductor integrated circuit device Provided are a semiconductor integrated device and a method for fabricating the same. The semiconductor integrated circuit includes a semiconductor substrate including a first dopant, a first conductive layer pattern formed on the semiconductor substrate, an interla... | 11/15/2011 |
| 8030223 | Solar cell and method of fabricating the same A solar cell (100) comprising a semiconductor solar cell substrate (66) having a light receiving surface formed on the first major surface and generating photovoltaic power based on the light impinging on the light receiving surface, wherein the light ... | 10/04/2011 |
| 7994073 | Low stress sacrificial cap layer A low stress sacrificial cap layer 120 having a silicon oxide liner film 130, a low stress silicon film 140, and a silicon nitride film. Alternatively, a low stress sacrificial cap layer 410 having a silicon oxide liner film 130 an... | 08/09/2011 |
| 7951730 | Decreasing the etch rate of silicon nitride by carbon addition Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon sour... | 05/31/2011 |
| 7902089 | N-type transistor, production methods for n-type transistor and n-type transistor-use channel, and production method of nanotube structure exhibiting n-type semiconductor-like characteristics An object of the present invention is to provide a new n-type transistor, different from the prior art, using a channel having a nanotube-shaped structure, and having n-type semiconductive properties. To realize this, a film of a nitrogenous compound 6 is for... | 03/08/2011 |
| 7884034 | Method of manufacturing semiconductor device and substrate processing apparatus A silicon nitride film including stoichiometrically excessive silicon with respect to nitrogen is formed. The silicon nitride film may be formed by supplying dichlorosilane to a substrate under a condition where CVD (chemical vapor deposition) reaction is caused to ... | 02/08/2011 |
| 7867923 | High quality silicon oxide films by remote plasma CVD from disilane precursors A method of depositing a silicon and nitrogen containing film on a substrate. The method includes introducing silicon-containing precursor to a deposition chamber that contains the substrate, wherein the silicon-containing precursor comprises at least two silicon at... | 01/11/2011 |
| 7700499 | Multilayer silicon nitride deposition for a semiconductor device A method for making a semiconductor device is provided which comprises (a) providing a semiconductor structure equipped with a gate (209) and a channel region, said channel region being associated with the gate; (b) depositing a first sub-layer (231) o... | 04/20/2010 |
| 7662730 | Method for fabricating ultra-high tensile-stressed film and strained-silicon transistors thereof A method for fabricating an ultra-high tensile-stressed nitride film is disclosed. A PECVD process is first performed to deposit a transitional silicon nitride film over a substrate. The transitional silicon nitride film has a first concentration of hydrogen atoms. ... | 02/16/2010 |
| 7645712 | Method of forming contact A substrate having at least two metal oxide semiconductor devices of a same conductive type and a gap formed between the two devices is provided. A first stress layer is formed over the substrate to cover the metal-oxide semiconductor devices and the substrate, fill... | 01/12/2010 |
| 7638443 | Method of forming ultra-thin SiN film by plasma CVD A method of forming an ultra-thin SiN film includes: supplying a Si source gas into a reactor in which a substrate is placed on a susceptor; supplying an N source gas into the reactor at a flow rate which is at least 300 times that of the Si source gas; applying an ... | 12/29/2009 |
| 7585790 | Method for forming semiconductor device A method of forming a semiconductor device. The method comprises steps of providing a substrate having a first transistor, a second transistor and non-salicide device formed thereon and the conductive type of the first transistor is different from that of the second... | 09/08/2009 |
| 7566668 | Method of forming contact A method of forming a contact is provided. A substrate having at least two metal oxide semiconductor devices is provided and a gap is formed between the two devices. A first stress layer is formed over the substrate to cover the metal-oxide semiconductor devices and... | 07/28/2009 |
| 7550398 | Semiconductor device and method of fabricating the same A semiconductor device includes a silicon nitride (SiN) film provided on a crystal surface of a nitride semiconductor, the SiN film having a hydrogen content equal to or smaller than 15 percent. ... | 06/23/2009 |
| 7510984 | Method of forming silicon nitride film and method of manufacturing semiconductor device A method of forming a silicon nitride film comprises: forming a silicon nitride film by applying first gas containing silicon and nitrogen and second gas containing nitrogen and hydrogen to catalyst heated in a reduced pressure atmosphere. A method of manufacturing ... | 03/31/2009 |
| 7501355 | Decreasing the etch rate of silicon nitride by carbon addition Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon sour... | 03/10/2009 |
| 7491660 | Method of forming nitride films with high compressive stress for improved PFET device performance A method is provided for making a FET device in which a nitride layer overlies the PFET gate structure, where the nitride layer has a compressive stress with a magnitude greater than about 2.8 GPa. This compressive stress permits improved device performance in the P... | 02/17/2009 |
| 7488694 | Methods of forming silicon nitride layers using nitrogenous compositions The present invention provides nitrogenous compositions for forming a silicon nitride layer, wherein the nitrogenous composition comprises a hydrazine compound, an amine compound or a mixture thereof. The present invention further provides source compositions for fo... | 02/10/2009 |
| 7473655 | Method for silicon based dielectric chemical vapor deposition Embodiments of the invention generally provide a method for depositing silicon-containing films. In one embodiment, a method for depositing silicon-containing material film on a substrate includes flowing a nitrogen and carbon containing chemical into a deposition c... | 01/06/2009 |
| 7470637 | Film formation apparatus and method of using the same A method of using a film formation apparatus for a semiconductor process includes removing by a cleaning gas a by-product film deposited on an inner surface of a reaction chamber of the film formation apparatus, and then chemically planarizing the inner surface of t... | 12/30/2008 |
| 7462571 | Film formation method and apparatus for semiconductor process for forming a silicon nitride film An impurity-doped silicon nitride or oxynitride film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas containing a silane family gas, a second process gas containing a nitriding or oxynitriding gas, and a... | 12/09/2008 |
| 7452830 | Semiconductor devices and methods for manufacturing the same Semiconductor devices and methods for manufacturing the same are disclosed. An example method includes loading a first substrate to be provided with an oxynitride layer along with a second substrate having a nitride layer in a boat, and forming the oxynitride layer ... | 11/18/2008 |
| 7446062 | Device having dual etch stop liner and reformed silicide layer and related methods The present invention provides a semiconductor device having dual silicon nitride liners and a reformed silicide layer and related methods for the manufacture of such a device. The reformed silicide layer has a thickness and resistance substantially similar to a sil... | 11/04/2008 |
| 7442653 | Inter-metal dielectric of semiconductor device and manufacturing method thereof including plasma treating a plasma enhanced fluorosilicate glass An exemplary manufacturing method of an inter-metal dielectric of a semiconductor device according to an embodiment of the present invention includes forming a first silicon-rich oxide (SRO) layer on a silicon substrate provided with or otherwise having a copper lin... | 10/28/2008 |
| 7442598 | Method of forming an interlayer dielectric A method for forming a semiconductor device comprises providing a semiconductor substrate; forming a first stressor layer over a surface of the semiconductor substrate; selectively removing portions of the first stressor layer; forming a second stressor layer over t... | 10/28/2008 |
| 7435683 | Apparatus and method for selectively recessing spacers on multi-gate devices Embodiments of an apparatus and methods for fabricating a spacer on one part of a multi-gate transistor without forming a spacer on another part of the multi-gate transistor are generally described herein. Other embodiments may be described and claimed. ... | 10/14/2008 |
| 7429517 | CMOS transistor using high stress liner layer A MOS transistor structure comprising a gate dielectric layer (30), a gate electrode (40), and source and drain regions (70) are formed in a semiconductor substrate (10). First second and third dielectric layers (110), (120)... | 09/30/2008 |
| 7420202 | Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device An electronic device can include a transistor structure of a first conductivity type, a field isolation region, and a layer of a first stress type overlying the field isolation region. For example, the transistor structure may be a p-channel transistor structure and... | 09/02/2008 |
| 7416997 | Method of fabricating semiconductor device including removing impurities from silicon nitride layer A method of fabricating a semiconductor device having a silicon nitride layer substantially free of impurities includes forming a silicon nitride layer on a semiconductor substrate and annealing the semiconductor substrate having the silicon nitride layer in an atmo... | 08/26/2008 |
| 7402535 | Method of incorporating stress into a transistor channel by use of a backside layer The present invention provides the method includes forming source/drain regions 170 in a semiconductor wafer substrate 110 adjacent a gate structure 130 located on a front side of the semiconductor wafer substrate 110. The source/drain re... | 07/22/2008 |
| 7402513 | Method for forming interlayer insulation film It is an object of the present invention to provide a method for forming an interlayer insulation film suppressing the occurrence of voids in the interlayer insulation film. A method for forming an interlayer insulation film of the present invention, comprisi... | 07/22/2008 |
| 7396776 | Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) A semiconductor-on-insulator structure includes a buried dielectric layer interposed between a base semiconductor substrate and a surface semiconductor layer. The buried dielectric layer comprises an oxide material that includes a nitrogen gradient that peaks at the... | 07/08/2008 |
| 7387972 | Reducing nitrogen concentration with in-situ steam generation In-situ steam generation (ISSG) is used to reduce the nitrogen concentration in silicon and silicon oxide areas. ... | 06/17/2008 |
| 7381620 | Oxygen elimination for device processing A method includes forming at least a portion of a semiconductor device in a processing chamber containing oxygen and removing substantially all of the oxygen from the processing chamber. The method further includes forming remaining portions of the semiconductor dev... | 06/03/2008 |
| 7381660 | Dielectric barrier layer for a copper metallization layer having a varying silicon concentration along its thickness A silicon nitride layer having a silicon-rich sub-layer and a standard sub-layer is formed on a copper surface to obtain excellent electromigration characteristics due to the standard sub-layer that is in contact with the copper, while maintaining a superior diffusi... | 06/03/2008 |
| 7371627 | Memory array with ultra-thin etched pillar surround gate access transistors and buried data/bit lines A memory array with data/bit lines extending generally in a first direction formed in an upper surface of a substrate and access transistors extending generally upward and aligned generally atop a corresponding data/bit line. The access transistors have a pillar ext... | 05/13/2008 |
