Class 438/779 - Compound semiconductor substrate

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Processes wherein the substrate upon which is deposited
No. of patents: 143
Last issue date: 03/22/2011

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Number	Title	Issue Date
7910497	Method of forming dielectric layers on a substrate and apparatus therefor Methods of forming dielectric layers on a substrate comprising silicon and oxygen are disclosed herein. In some embodiments, a method of forming a dielectric layer on a substrate includes provide a substrate having an exposed silicon oxide layer; treating an upper s...	03/22/2011
7662728	Substrate processing method A method of forming a low-K dielectric film, comprises the steps of placing a substrate carrying thereon a low-K dielectric film on a stage, heating the low-K dielectric film on the stage, processing the low-K dielectric film by plasma of a processing gas containing...	02/16/2010
7479462	Thin films and methods for the preparation thereof Thin films are disclosed that are suitable as dielectrics in IC's and for other similar applications. In particular, the invention concerns thin films comprising compositions obtainable by hydrolysis of two or more silicon compounds, which yield an at least partiall...	01/20/2009
7396779	Electronic apparatus, silicon-on-insulator integrated circuits, and fabrication methods An electronic apparatus includes an insulative substrate containing an aluminum-based glass and a layer containing a semiconductive material over the substrate. The insulative substrate can include aluminum oxycarbide. The insulative substrate can exhibit a CTE suff...	07/08/2008
7388268	Compound semiconductor multilayer structure, hall device, and hall device manufacturing method Hall device is provided by enabling stable provision of a quantum well compound semiconductor stacked structure. It has first and second compound semiconductor layers composed of Sb and at least two of five elements of Al, Ga, In, As and P, and an active layer compo...	06/17/2008
7332795	Dielectric passivation for semiconductor devices A semiconductor device is disclosed that includes a layer of Group III nitride semiconductor material that includes at least one surface, a control contact on the surface for controlling the electrical response of the semiconductor material, a dielectric barrier lay...	02/19/2008
7253061	Method of forming a gate insulator in group III-V nitride semiconductor devices A method of forming a gate insulator in the manufacture of a semiconductor device comprises conducting a photo-assisted electrochemical process to form a gate-insulating layer on a gallium nitride layer of the semiconductor device, wherein the gate-insulating layer ...	08/07/2007
7254213	Radiological imagery method and device The relation relates to a method and a radiological imaging device. A subject (4) is illuminated by a luminous flux (1) generated by an X-ray source (2). This luminous flux (1) is a pulse having a duration tp shorter than 1 ms....	08/07/2007
7247203	Process for producing crystalline nucleus and method of screening crystallization conditions The present invention relates to a process for producing high-quality crystals of protein or organic substances easily and efficiently. A solution of protein or an organic substance is prepared and then is cooled slowly to be supersaturated to a low degree. This sup...	07/24/2007
7235469	Semiconductor device and method for manufacturing the same A semiconductor device suitable for the miniaturization and comprising properly controlled Si/SiGe gate electrode comprises an insulator formed on a semiconductor substrate, a first gate electrode formed on the insulator and including silicon-germanium, wherein a ge...	06/26/2007
7235499	Semiconductor processing methods In one aspect, the invention encompasses a semiconductor processing method. A layer of material is formed over a semiconductive wafer substrate. Some portions of the layer are exposed to energy while other portions are not exposed. The exposure to energy alters phys...	06/26/2007
7214601	Manufacturing process and structure of power junction field effect transistor A manufacturing process and a power junction field-effect transistor (JFET) are provided. The basic concept of the present invention is to allow the current to flow vertically from the drain region on the bottom side to the source region on the topside of the device...	05/08/2007
7208394	Method of manufacturing a semiconductor device with a fluorine concentration At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a sin...	04/24/2007
7205223	Method of forming an interconnect structure for a semiconductor device A copper interconnect structure is disclosed as comprising a copper layer and an aluminum nitride layer formed over the copper layer. The aluminum nitride layer passivates the copper layer surface and enhances the thermal conductivity of a semiconductor substrate by...	04/17/2007
7205649	Ball grid array copper balancing A ball grid array device includes a substrate having a first major surface and a second major surface. The first major surface includes leads for electrical connections. The second major surface is devoid of leads. The ball grid array device also includes a first la...	04/17/2007
7160820	Method of preparing oxide crystal film/substrate composite and solution for use therein There is provided a process for preparing a composite material of an oxide crystal film and a substrate by forming a Y123 type oxide crystal film from a solution phase on a substrate using a liquid phase method, wherein problems such as cracking of the oxide crystal...	01/09/2007
7157385	Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of depositing a silico...	01/02/2007
7153731	Method of forming a field effect transistor with halo implant regions A method of forming a field effect transistor includes forming a channel region within bulk semiconductive material of a semiconductor substrate. Source/drain regions are formed on opposing sides of the channel region. An insulative dielectric region is formed withi...	12/26/2006
7129187	Low-temperature plasma-enhanced chemical vapor deposition of silicon-nitrogen-containing films A method for low-temperature plasma-enhanced chemical vapor deposition of a silicon-nitrogen-containing film on a substrate. The method includes providing a substrate in a process chamber, exciting a reactant gas in a remote plasma source, thereafter mixing the exci...	10/31/2006
7125754	Semiconductor device and its manufacturing method The present invention has an object of providing a thyristor-type semiconductor device and a manufacturing method for the same which can prevent, even when conventional manufacturing equipment is used, the electrode terminals 13, 14 from being provided in a s...	10/24/2006
7101591	Production method for copolymer film, copolymer film produced by the forming method and semiconductor device using copolymer film This invention provides a process for producing an organic polymer film whereby when using it as an interlayer insulating film in a semiconductor device, the film exhibits higher adhesiveness at its interfaces where other semiconductor materials are in contact with ...	09/05/2006
7098151	Method of manufacturing carbon nanotube semiconductor device Provided is a method of controlling an alignment direction of CNTs in manufacturing a carbon nanotube semiconductor device using the CNTs for a channel region formed between a source electrode and a drain electrode. In manufacturing a carbon nanotube semiconductor d...	08/29/2006
7078300	Thin germanium oxynitride gate dielectric for germanium-based devices A method for producing thin, below 6 nm of equivalent oxide thickness, germanium oxynitride layer on Ge-based materials for use as gate dielectric is disclosed. The method involves a two step process. First, nitrogen is incorporated in a surface layer of the Ge-base...	07/18/2006
7067176	Method of fabricating an oxide layer on a silicon carbide layer utilizing an anneal in a hydrogen environment Silicon carbide structures are fabricated by fabricating a nitrided oxide layer on a layer of silicon carbide and annealing the nitrided oxide layer in an environment containing hydrogen. Such a fabrication of the nitrided oxide layer may be provided by forming the ...	06/27/2006
7041568	Method for the production of a self-adjusted structure on a semiconductor wafer A structure on a layer surface of the semiconductor wafer has at least one first area region (8, 9), which is reflective for electromagnetic radiation, and at least one second, essentially nonreflecting area region (10, 11, 12). A light-transmissive in...	05/09/2006
7037855	Method of forming fluorine-doped low-dielectric-constant insulating film A method of forming low-dielectric-constant silicon oxide films by capacitive-coupled plasma CVD comprises: introducing a processing gas comprising SiH4 as a silicon source gas, SiF4 as a fluorine source gas, and CO2 as an oxidizing ...	05/02/2006
7033439	Apparatus for fabricating a III-V nitride film and a method for fabricating the same A hydrogen chloride gas and an ammonia gas are introduced with a carrier gas into a reactor in which a substrate and at least an aluminum metallic material through conduits. Then, the hydrogen gas and the ammonia gas are heated by heaters, and thus, a III–V nitrid...	04/25/2006
7030475	Method and apparatus for forming a thin film In a method of uniformly forming a thin film on a wafer and an apparatus of using the same, after supplying a first gas, a second gas and a third gas into a reaction chamber in which a wafer is loaded, a thin film is formed on the wafer from the first gas and the se...	04/18/2006
7022378	Nitrogen passivation of interface states in SiO/SiC structures A nitrided oxide layer on a silicon carbide layer is processed by annealing the nitrided oxide layer in a substantially oxygen-free nitrogen containing ambient. The anneal may be carried out at a temperature of greater than about 900° C., for example, a temperature...	04/04/2006
6998322	Methods of fabricating high voltage, high temperature capacitor and interconnection structures Capacitors and interconnection structures for silicon carbide are provided having an oxide layer, a layer of dielectric material and a second oxide layer on the layer of dielectric material. The thickness of the oxide layers may be from about 0.5 to about 33 percent...	02/14/2006
6979863	Silicon carbide MOSFETs with integrated antiparallel junction barrier Schottky free wheeling diodes and methods of fabricating the same Silicon carbide semiconductor devices and methods of fabricating silicon carbide semiconductor devices have a silicon carbide DMOSFET and an integral silicon carbide Schottky diode configured to at least partially bypass a built in diode of the DMOSFET. The Schottky...	12/27/2005
6972436	High voltage, high temperature capacitor and interconnection structures Capacitors and interconnection structures for silicon carbide are provided having an oxide layer, a layer of dielectric material and a second oxide layer on the layer of dielectric material. The thickness of the oxide layers may be from about 0.5 to about 33 percent...	12/06/2005
6960482	Method of fabricating nitride semiconductor and method of fabricating semiconductor device A method of fabricating a nitride semiconductor includes the steps of forming a nitride semiconductor doped with a p-type impurity, treating the surface of the nitride semiconductor in an atmosphere containing active oxygen to remove carbon remaining on the surface ...	11/01/2005
6956292	Bumping process to increase bump height and to create a more robust bump structure A new process is provided which is an extension and improvement of present processing for the creation of a solder bump. After the layers of Under Bump Metal and a layer of solder metal have been created in patterned and etched format and overlying the contact pad, ...	10/18/2005
6956238	SILICON CARBIDE POWER METAL-OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS HAVING A SHORTING CHANNEL AND METHODS OF FABRICATING SILICON CARBIDE METAL-OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS HAVING A SHORTING CHANNEL Silicon carbide metal-oxide semiconductor field effect transistors (MOSFETs) and methods of fabricating silicon carbide MOSFETs are provided. The silicon carbide MOSFETs have an n-type silicon carbide drift layer, spaced apart p-type silicon carbide regions in the n...	10/18/2005
6933244	Method of fabrication for III-V semiconductor surface passivation A method passivates a surface of a semiconductor structure. The method provides III-V semiconductor material having a surface to be passivated. Upon the surface of the III-V semiconductor material to be passivated an oxide layer is formed. Thereafter, the surface of...	08/23/2005
6933205	Integrated circuit device and method of manufacturing the same The present invention provides an integrated circuit, comprising a semiconductor substrate, an active element formed on the side of one main surface of the semiconductor substrate, an insulating region formed on the side of the main surface of the semiconductor subs...	08/23/2005
6920167	Semiconductor laser device and method for fabricating thereof A semiconductor laser device has on a compound semiconductor substrate at least a lower cladding layer, an active layer, an upper cladding layer and a contact layer. An upper part of the upper cladding layer and the contact layer are formed as a mesa-structured port...	07/19/2005
6893945	Method for manufacturing gallium nitride group compound semiconductor An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2	05/17/2005
6893894	Method of manufacturing a compound semiconductor by heating a layered structure including rare earth transition metal A method of manufacturing a compound semiconductor includes the steps of forming a layered structure of dielectric layers including oxygen or sulfur, and an inter layer formed between the dielectric layers, including rare earth transition metal that is highly reacti...	05/17/2005

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Class 438/779 - Compound semiconductor substrate