Did You Know...
...that the inventor of the electric motor was a blacksmith named Thomas Davenport? Described as "a brilliantly unsuccessful inventor", Davenport invented the first rotary electric motor. In 1836 he headed out -- on foot -- from his Vermont home to file a patent application at the Patent Office in Washington, D.C. By the time he got there, he had squandered away his money and couldn't afford the $30 filing fee so he turned around and went home. When he later mailed in his application with money he'd raised, the Patent office was destroyed in a fire. He did finally get credit for his invention on Feb. 5, 1837.
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| Number | Title | Issue Date |
| 7968470 | Plasma nitriding method, method for manufacturing semiconductor device and plasma processing apparatus A nitriding process is performed at a process temperature of 500° C. or more by causing microwave-excited high-density plasma of a nitrogen-containing gas to act on silicon in the surface of a target object, inside a process container of a plasma processing apparat... | 06/28/2011 |
| 7517814 | Method and system for forming an oxynitride layer by performing oxidation and nitridation concurrently A method for preparing an oxynitride film on a substrate comprising forming the oxynitride film by exposing a surface of the substrate to oxygen radicals and nitrogen radicals formed by plasma induced dissociation of a process gas comprising nitrogen and oxygen usin... | 04/14/2009 |
| 7439121 | Dielectric film and method of forming it, semiconductor device, non-volatile semiconductor memory device, and production method for semiconductor device In a film formation method of a semiconductor device including a plurality of silicon-based transistors or capacitors, there exist hydrogen at least in a part of the silicon surface in advance, and the film formation method removes the hydrogen by exposing the silic... | 10/21/2008 |
| 7427572 | Method and apparatus for forming silicon nitride film A method for forming a silicon nitride film first deposits a silicon nitride film on a target substrate by CVD in a process field within a reaction container. This step is arranged to supply a first process gas containing a silane family gas and a second process gas... | 09/23/2008 |
| 7345001 | Gate dielectric having a flat nitrogen profile and method of manufacture therefor The present invention provides a gate dielectric having a flat nitrogen profile, a method of manufacture therefor, and a method of manufacturing an integrated circuit including the flat nitrogen profile. In one embodiment, the method of manufacturing the gate dielec... | 03/18/2008 |
| 7311766 | Method and use of nanoparticles to bind biocides in paints This invention relates to the use of a combination of selected substances in paint to prevent the settlement and growth of different biofouling organisms with a reduced negative effect on the ecosystems compared to present methods. ... | 12/25/2007 |
| 7288447 | Semiconductor device having trench isolation for differential stress and method therefor A semiconductor device has trenches for defining active regions. After a thin diffusion barrier is deposited in the trenches, some of the trenches are selectively etched to leave different areas in the trench. One of the areas has the diffusion barrier completely re... | 10/30/2007 |
| 7244644 | Undercut and residual spacer prevention for dual stressed layers Methods are disclosed for forming dual stressed layers in such a way that both undercutting and an undesirable residual spacer of the first-deposited stressed layer are prevented. In one embodiment, a method includes forming a first stressed silicon nitride layer ov... | 07/17/2007 |
| 7226874 | Substrate processing method A substrate processing method forming an oxynitride film by nitriding an oxide film formed on a silicon substrate includes a nitridation processing step that nitrides a surface of the oxide film by radicals or ions formed by exciting a nitrogen gas by microwave-exci... | 06/05/2007 |
| 7205216 | Modification of electrical properties for semiconductor wafers A method and structure for fabricating semiconductor wafers. The method comprises providing a plurality of semiconductor wafers. The plurality of semiconductor wafers comprises a first semiconductor wafer and a second semiconductor wafer. The first semiconductor waf... | 04/17/2007 |
| 7183143 | Method for forming nitrided tunnel oxide layer A method for forming a nitrided tunnel oxide layer is described. A silicon oxide layer as a tunnel oxide layer is formed on a semiconductor substrate, and a plasma nitridation process is performed to implant nitrogen atoms into the silicon oxide layer. A thermal dri... | 02/27/2007 |
| 7176094 | Ultra-thin gate oxide through post decoupled plasma nitridation anneal DPN (decoupled plasma nitridation) is used to improve robustness of ultra thin gate oxides. Conventionally, this is followed by an anneal in pure helium to remove structural defects in the oxide. However, annealing under these conditions has been found to cause a de... | 02/13/2007 |
| 7135416 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device including a gallium nitride related semiconductor. The method include preparing a substrate having surface of a gallium nitride related semiconductor; contacting the surface with atomic nitrogen, which is obtained by ... | 11/14/2006 |
| 7129187 | Low-temperature plasma-enhanced chemical vapor deposition of silicon-nitrogen-containing films A method for low-temperature plasma-enhanced chemical vapor deposition of a silicon-nitrogen-containing film on a substrate. The method includes providing a substrate in a process chamber, exciting a reactant gas in a remote plasma source, thereafter mixing the exci... | 10/31/2006 |
| 7115530 | Top surface roughness reduction of high-k dielectric materials using plasma based processes A system and method for manufacturing semiconductor devices with dielectric layers having a dielectric constant greater than silicon dioxide includes depositing a dielectric layer on a substrate and subjecting the dielectric layer to a plasma to reduce top surface r... | 10/03/2006 |
| 7101744 | Method for forming self-aligned, dual silicon nitride liner for CMOS devices A method for forming a self-aligned, dual silicon nitride liner for CMOS devices includes forming a first type nitride layer over a first polarity type device and a second polarity type device, and forming a topographic layer over the first type nitride layer. Porti... | 09/05/2006 |
| 7098154 | Method for fabricating semiconductor device and semiconductor device Part of a first oxide film formed by thermal oxidation is removed by etching. A second oxide film is formed in the part of substrate from which the first oxide film has been removed using heated nitric acid. The two oxide films are nitrided by a nitrogen plasma havi... | 08/29/2006 |
| 7098147 | Semiconductor memory device and method for manufacturing semiconductor device After a lower silicon oxide film is formed on a silicon region, a silicon film is formed on the lower silicon oxide film by, for example, a thermal CVD method. Subsequently, the silicon film is completely nitrided by a plasma nitriding method to be replaced by a sil... | 08/29/2006 |
| 7091136 | Method of forming semiconductor compound film for fabrication of electronic device and film produced by same A process of forming a compound film includes formulating a nano-powder material with a controlled overall composition and including particles of one solid solution. The nano-powder material is deposited on a substrate to form a layer on the substrate, and the layer... | 08/15/2006 |
| 7067414 | Low k interlevel dielectric layer fabrication methods A low k inter-level dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide-comprising inter-level dielectric layer including carbon and having a dielectric constant no greater than 3... | 06/27/2006 |
| 7067415 | Low k interlevel dielectric layer fabrication methods A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.... | 06/27/2006 |
| 7056836 | Manufacturing method for a semiconductor device In a method for manufacturing a semiconductor device, a first silicon oxide film is formed on a semiconductor substrate. The first silicon oxide film is nitrided so that silicon oxynitride forms at an interface between the semiconductor substrate and the first silic... | 06/06/2006 |
| 7056381 | Fabrication method of semiconductor device Concentration of metal element which promotes crystallization of silicon and which exists within a crystal silicon film obtained by utilizing the metal element is reduced. A first heat treatment for crystallization is implemented after introducing nickel to an amorp... | 06/06/2006 |
| 7052940 | Method of fabricating top gate type thin film transistor having low temperature polysilicon A method of forming a polysilicon thin film transistor that includes depositing an amorphous silicon layer over a substrate, crystallizing the amorphous silicon layer into a polycrystalline silicon layer, patterning the polycrystalline silicon layer to form a polysi... | 05/30/2006 |
| 7033958 | Semiconductor device and process for producing the same A semiconductor apparatus is provided that is thermally stable in a post process and is suitable for fabricating a gate insulator having a laminated structure with various high permittivity oxides, and a process is provided for producing the same. In order to achiev... | 04/25/2006 |
| 7005389 | Methods for forming a thin film on an integrated circuit device by sequentially providing energies to activate the reactants Methods for forming a thin film on an integrated circuit device including providing energy to reactants in a deposition chamber to activate the reactants. The activated reactants are then deposited on the substrate to form a thin film on the substrate. The reactants... | 02/28/2006 |
| 6967130 | Method of forming dual gate insulator layers for CMOS applications A method of forming dual gate insulator layers, each with a specific insulator thickness, featuring a HF type pre-clean procedure performed prior to formation of each of the gate insulator layers, has been developed. After a first HF type pre-clean procedure a silic... | 11/22/2005 |
| 6960537 | Incorporation of nitrogen into high k dielectric film A high k dielectric film and methods for forming the same are disclosed. The high k material includes two peaks of impurity concentration, particularly nitrogen, such as at a lower interface and upper interface, making the layer particularly suitable for transistor ... | 11/01/2005 |
| 6933248 | Method for transistor gate dielectric layer with uniform nitrogen concentration The instant invention describes a method for forming a dielectric film with a uniform concentration of nitrogen. The films are formed by first incorporating nitrogen into a dielectric film using RPNO. The films are then annealed in N2O which redistributes... | 08/23/2005 |
| 6924239 | Method for removal of hydrocarbon contamination on gate oxide prior to non-thermal nitridation using “spike” radical oxidation The present invention is generally directed towards a method for removing hydrocarbon contamination from a substrate prior to a nitridation step, therein providing for a generally uniform nitridation of the substrate. The method comprises placing the substrate in a ... | 08/02/2005 |
| 6887798 | STI stress modification by nitrogen plasma treatment for improving performance in small width devices A method for modulating the stress caused by bird beak formation of small width devices by a nitrogen plasma treatment. The nitrogen plasma process forms a nitride liner about the trench walls that serves to prevent the formation of bird beaks in the isolation regio... | 05/03/2005 |
| 6861366 | Packaged semiconductor device having stacked die The present invention provides a packaged semiconductor device that includes two semiconductor die. The first semiconductor die is attached to a package substrate using adhesive. A first set of wire bonds electrically connect the first semiconductor die to the packa... | 03/01/2005 |
| 6855568 | Apparatus and methods for monitoring self-aligned contact arrays using voltage contrast inspection Disclosed are methods and apparatus for detecting defects in a partially fabricated semiconductor device with self-aligned contacts. The self-aligned contacts are formed from a first layer with a plurality of contact portions, a second layer with a plurality of cond... | 02/15/2005 |
| 6780719 | Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxyg... | 08/24/2004 |
| 6777346 | Planarization using plasma oxidized amorphous silicon A planarization process for filling spaces between patterned metal features formed over a surface of a semiconductor substrate. The patterned metal features are preferably coated with a dielectric barrier. The dielectric barrier is coated with an material that expan... | 08/17/2004 |
| 6773999 | Method for treating thick and thin gate insulating film with nitrogen plasma A semiconductor device includes a gate insulating film formed on a semiconductor substrate, and a gate electrode formed on the gate insulating film. Nitrogen is introduced into the gate insulating film, and the nitrogen concentration distribution thereof has a peak ... | 08/10/2004 |
| 6699796 | Single chip pad oxide layer growth process A single chip pad oxide layer growth process is disclosed. First, a silicon chip is sent into a reaction chamber, which is filled with hydrogen and oxygen. A rapid thermal process is employed to increase the temperature inside the chamber to about 850° C... | 03/02/2004 |
| 6660657 | Methods of incorporating nitrogen into silicon-oxide-containing layers The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally ... | 12/09/2003 |
| 6660658 | Transistor structures, methods of incorporating nitrogen into silicon-oxide-containing layers; and methods of forming transistors The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally ... | 12/09/2003 |
| 6649535 | Method for ultra-thin gate oxide growth A method for forming an ultra-thin (between about 15 to 20 Angstroms), silicon dioxide gate insulator layer, featuring a process sequence which widens the process window of the thermal oxidation procedure, and improves the quality of the ultra-thin silico... | 11/18/2003 |
