Self Containing Enclosure for Protection from Killer Bees
A self contained protective enclosure with an opening for entry and egress and a screen for ventilation and viewing.
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| Number | Title | Issue Date |
| 8153536 | Transfer of high temperature wafers This invention provides apparatus, protocols, and methods that permit wafers to be loaded and unloaded in a gas-phase epitaxial growth chamber at high temperatures. Specifically, this invention provides a device for moving wafers or substrates that can bath a substr... | 04/10/2012 |
| 7476627 | Surface preparation prior to deposition Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is tr... | 01/13/2009 |
| 7407893 | Liquid precursors for the CVD deposition of amorphous carbon films Methods are provided for depositing amorphous carbon materials. In one aspect, the invention provides a method for processing a substrate including positioning the substrate in a processing chamber, introducing a processing gas into the processing chamber, wherein t... | 08/05/2008 |
| 7364798 | Internal member for plasma-treating vessel and method of producing the same It is to propose an internal member for a plasma treating vessel having excellent resistances to chemical corrosion and plasma erosion under an environment containing a halogen gas and an advantageous method of producing the same, which is a member formed by coverin... | 04/29/2008 |
| 7365369 | Nitride semiconductor device A nitride semiconductor device used chiefly as an LD and an LED element. In order to improve the output and to decrease Vf, the device is given either a three-layer structure in which a nitride semiconductor layer doped with n-type impurities serving as an n-type co... | 04/29/2008 |
| 7358162 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device, includes the steps of: raising a temperature of a sapphire substrate which is included in the semiconductor device from a room temperature to a preheat temperature of 150° C. to 450° C. and keeping the preheat temp... | 04/15/2008 |
| 7357138 | Method for etching high dielectric constant materials and for cleaning deposition chambers for high dielectric constant materials A process for the removal of a substance from a substrate for etching and/or cleaning applications is disclosed herein. In one embodiment, there is provided a process for removing a substance having a dielectric constant greater than silicon dioxide from a substrate... | 04/15/2008 |
| 7354848 | Poly-silicon-germanium gate stack and method for forming the same A CMOS gate stack that increases the inversion capacitance compared to a conventional CMOS gate stack has been described. Using a poly-SiGe gate, instead of the conventional poly-Si gate near the gate dielectric layer, increases the amount of implanted dopant that c... | 04/08/2008 |
| 7348636 | CMOS transistor having different PMOS and NMOS gate electrode structures and method of fabrication thereof In a CMOS semiconductor device using a silicon germanium gate and a method of fabricating the same, a gate insulating layer, a conductive electrode layer that is a seed layer, a silicon germanium electrode layer, and an amorphous conductive electrode layer are seque... | 03/25/2008 |
| 7338828 | Growth of planar non-polar {1 -1 0 0} m-plane gallium nitride with metalorganic chemical vapor deposition (MOCVD) A method of growing planar non-polar m-plane III-Nitride material, such as an m-plane gallium nitride (GaN) epitaxial layer, wherein the III-Nitride material is grown on a suitable substrate, such as an m-plane silicon carbide (m-SiC) substrate, using metalorganic c... | 03/04/2008 |
| 7327036 | Method for depositing a group III-nitride material on a silicon substrate and device therefor The present invention is related to a device comprising a substrate comprising a silicon substrate having a porous top layer, a second layer on said top layer, said second layer made of a material comprising Ge, and a further layer of a Group III-nitride material on... | 02/05/2008 |
| 7312156 | Method and apparatus for supporting a semiconductor wafer during processing A semiconductor wafer is processed while being supported without mechanical contact. Instead, the wafer is supported by gas streams emanating from a large number of passages in side sections positioned very close to the upper and lower surface of the wafer. The gas ... | 12/25/2007 |
| 7309660 | Buffer layer for selective SiGe growth for uniform nucleation Methods for preparing a surface for selective silicon-germanium epitaxy by forming a thin silicon (Si) buffer layer or a thin, low concentration SiGe buffer layer for uniform nucleation, are disclosed. ... | 12/18/2007 |
| 7303991 | Atomic layer deposition methods The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition ... | 12/04/2007 |
| 7300855 | Reversible oxidation protection of microcomponents In a method for the reversible oxidation protection of microcomponents, a substrate is provided, a silicon nitride layer is provided on the substrate in order to protect it against oxidation, an insulation layer is applied to the silicon nitride layer, and a reoxida... | 11/27/2007 |
| 7294520 | Method for fabricating a plurality of semiconductor bodies, and electronic semiconductor body A method for fabricating a plurality of semiconductor bodies, in particular based on nitride compound semiconductor material. The method includes forming a mask layer (3) over a substrate (1) or over an initial layer (2), which mask layer has a ... | 11/13/2007 |
| 7285500 | Thin films and methods of making them Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 â„« or less, a surface rou... | 10/23/2007 |
| 7285482 | Method for producing solid-state imaging device A method is provided for producing a solid-state imaging device in which a plurality of pixels are arranged two-dimensionally so as to form a photosensitive region, each of the pixels including a photodiode that photoelectrically converts incident light to store a s... | 10/23/2007 |
| 7282738 | Fabrication of crystalline materials over substrates A method of forming crystalline or polycrystalline layers includes providing a substrate and a patterning over the substrate. The method also includes providing nucleation material and forming the crystalline layer over the nucleation material. The crystalline mater... | 10/16/2007 |
| 7262116 | Low temperature epitaxial growth of silicon-containing films using close proximity UV radiation A method of preparing a clean substrate surface for blanket or selective epitaxial deposition of silicon-containing and/or germanium-containing films. In addition, a method of growing the silicon-containing and/or germanium-containing films, where both the substrate... | 08/28/2007 |
| 7259108 | Methods for fabricating strained layers on semiconductor substrates Methods for fabricating multi-layer semiconductor structures including strained material layers using a minimum number of process tools and under conditions optimized for each layer. Certain regions of the strained material layers are kept free of impurities that ca... | 08/21/2007 |
| 7251262 | Surface emitting semiconductor laser and communication system using the same A surface emitting semiconductor laser includes a laminate of semiconductor layers emitting multimode laser light, and a block member blocking light of a specific mode among the multimode laser light emitted from the laminate. ... | 07/31/2007 |
| 7251264 | Distributed bragg reflector for optoelectronic device This disclosure concerns devices such as DBRs, one example of which includes at least one first mirror layers having an oxidized region extending from an edge of the DBR to an oxide termination edge that is situated greater than a first distance from the edge of the... | 07/31/2007 |
| 7242049 | Memory device A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the... | 07/10/2007 |
| 7226844 | Method of manufacturing a bipolar transistor with a single-crystal base contact A method forms a bipolar transistor in a semiconductor substrate of a first conductivity type. The method includes: forming on the substrate a single-crystal silicon-germanium layer; forming a heavily-doped single-crystal silicon layer of a second conductivity type;... | 06/05/2007 |
| 7221010 | Vertical JFET limited silicon carbide power metal-oxide semiconductor field effect transistors Silicon carbide metal-oxide semiconductor field effect transistors (MOSFETs) may include an n-type silicon carbide drift layer, a first p-type silicon carbide region adjacent the drift layer and having a first n-type silicon carbide region therein, an oxide layer on... | 05/22/2007 |
| 7202182 | Method of passivating oxide/compound semiconductor interface The present invention provides a method of passivating an oxide compound disposed on a III-V semiconductor substrate. The method is intended for use with dielectric stacks, gallate compounds, and gallium compounds used in gate quality oxide layers. The method includ... | 04/10/2007 |
| 7203001 | Optical retarders and related devices and systems In certain aspects, the disclosure relates to articles that include a plurality of walls configured to form a grating. Each of the plurality of walls can include a layer of a first material and a layer of a second material different from the first material. The arti... | 04/10/2007 |
| 7202166 | Surface preparation prior to deposition on germanium Methods are provided for treating germanium surfaces in preparation for subsequent deposition, particularly gate dielectric deposition by atomic layer deposition (ALD). Prior to depositing, the germanium surface is treated with plasma products or thermally reacted w... | 04/10/2007 |
| 7202169 | Method and system for etching high-k dielectric materials A system and a method to remove a layer of high-k dielectric material during the manufacturing of an integrated circuit. In one embodiment of the invention, an etch reactant is employed to form volatile etch products when reacted with high-k layers. Alternately, hig... | 04/10/2007 |
| 7190037 | Integrated transistor devices A self-aligned enhancement mode metal-oxide-compound semiconductor field effect transistor (10) includes a lower oxide layer that is a mixture of Ga2O, Ga2O3, and other gallium oxide compounds (30), and a second insulat... | 03/13/2007 |
| 7189639 | Use of germanium dioxide and/or alloys of GeO2 with silicon dioxide for semiconductor dielectric applications A method is disclosed for depositing a dielectric film on a substrate having a plurality of gaps formed between adjacent raised surfaces disposed in a high density plasma substrate processing chamber substrate. In one embodiment the method comprises flowing a proces... | 03/13/2007 |
| 7187045 | Junction field effect metal oxide compound semiconductor integrated transistor devices A self-aligned enhancement mode metal-oxide-compound semiconductor field effect transistor includes a gate insulating structure comprised of a first conducting oxide layer comprised of indium oxide compounds positioned immediately on top of the compound semiconducto... | 03/06/2007 |
| 7186630 | Deposition of amorphous silicon-containing films Chemical vapor deposition methods are used to deposit amorphous silicon-containing films over various substrates. Such methods are useful in semiconductor manufacturing to provide a variety of advantages, including uniform deposition over heterogeneous surfaces, hig... | 03/06/2007 |
| 7186663 | High density plasma process for silicon thin films A method is provided for forming a Si and Si—Ge thin films. The method comprises: providing a low temperature substrate material of plastic or glass; supplying an atmosphere; performing a high-density (HD) plasma process, such as an HD PECVD process using an induc... | 03/06/2007 |
| 7180101 | Semiconductor device, and method for manufacturing the same The present invention provides a semiconductor device including an element that is considered to have less environmental problem (for example iron), and a method for manufacturing the same. More specifically, in a semiconductor device having multiple layers, at leas... | 02/20/2007 |
| 7176146 | Method of making a molecule-surface interface This invention is generally related to a method of making a molecule-surface interface comprising at least one surface comprising at least one material and at least one organic group wherein the organic group is adjoined to the surface and the method comprises conta... | 02/13/2007 |
| 7172934 | Method of manufacturing a semiconductor device with a silicon-germanium gate electrode A SiO2 film serving as a gate dielectric film is formed on a silicon substrate. A seed Si film is formed on the gate dielectric film. A thin SiGe film of a thickness of 50 nm or less is formed on the seed Si film at a temperature between 450° C. and 494Â... | 02/06/2007 |
| 7169666 | Method of forming a device having a gate with a selected electron affinity A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the... | 01/30/2007 |
| 7166200 | Method and apparatus for an improved upper electrode plate in a plasma processing system The present invention presents an improved upper electrode for a plasma processing system, wherein the design and fabrication of an electrode plate coupled to an upper assembly advantageously provides gas injection of a process gas with substantially minimal erosion... | 01/23/2007 |