Class 438/757 - Silicon nitride

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Processes wherein the material undergoing wet chemical etching
No. of patents: 230
Last issue date: 05/22/2012

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Number	Title	Issue Date
8183163	Etching liquid, etching method, and method of manufacturing electronic component An etching liquid used for selectively etching silicon nitride, the etching liquid includes: water; a first liquid that can be mixed with the water to produce a mixture liquid having a boiling point of 150° C. or more; and a second liquid capable of producing proto...	05/22/2012
7977251	High selectivity BPSG to TEOS etchant Methods of selectively etching BPSG over TEOS are disclosed. In one embodiment, a TEOS layer may be used to prevent contamination of other components in a semiconductor device by the boron and phosphorous in a layer of BPSG deposited over the TEOS layer. An etchant ...	07/12/2011
7902082	Method of forming field effect transistors using diluted hydrofluoric acid to remove sacrificial nitride spacers Methods of forming integrated circuit devices include forming a field effect transistor having a gate electrode, sacrificial nitride spacers on opposing sidewalls of the gate electrode and source/drain regions, which are self-aligned to the sacrificial nitride space...	03/08/2011
7550396	Method for reducing resist poisoning during patterning of silicon nitride layers in a semiconductor device By performing a plasma treatment for efficiently sealing the surface of a stressed dielectric layer containing silicon nitride, an enhanced performance during the patterning of contact openings may be achieved, since nitrogen-induced resist poisoning may be signific...	06/23/2009
7468325	Method of cleaning silicon nitride layer A method of cleaning a silicon nitride layer on a substrate is provided to effectively remove negative-charged impurities such as polymer and particle from the silicon nitride layer. In the method, the zeta potential of the silicon nitride layer is changed from posi...	12/23/2008
7442598	Method of forming an interlayer dielectric A method for forming a semiconductor device comprises providing a semiconductor substrate; forming a first stressor layer over a surface of the semiconductor substrate; selectively removing portions of the first stressor layer; forming a second stressor layer over t...	10/28/2008
7435683	Apparatus and method for selectively recessing spacers on multi-gate devices Embodiments of an apparatus and methods for fabricating a spacer on one part of a multi-gate transistor without forming a spacer on another part of the multi-gate transistor are generally described herein. Other embodiments may be described and claimed. ...	10/14/2008
7432215	Semiconductor device manufacturing method and semiconductor manufacturing apparatus A semiconductor device manufacturing method comprises a first step of forming, by a thermal chemical vapor deposition method, a silicon nitride film on an object disposed in a reaction container, with bis tertiary butyl amino silane and NH3 flowing into t...	10/07/2008
7422936	Facilitating removal of sacrificial layers via implantation to form replacement metal gates Replacement metal gates may be formed by removing a polysilicon layer from a gate structure. The gate structure may be formed by patterning the polysilicon layer and depositing a spacer layer over the gate structure such that the spacer layer has a first polish rate...	09/09/2008
7402513	Method for forming interlayer insulation film It is an object of the present invention to provide a method for forming an interlayer insulation film suppressing the occurrence of voids in the interlayer insulation film. A method for forming an interlayer insulation film of the present invention, comprisi...	07/22/2008
7384799	Method to avoid amorphous-si damage during wet stripping processes in the manufacture of MEMS devices A method for forming a MEMS device using an amorphous silicon layer as a release layer includes etching superjacent films and using the amorphous silicon layer as an etch stop layer. The amorphous silicon layer is resistant to attack during the post-etch solvent str...	06/10/2008
7382515	Silicon-rich silicon nitrides as etch stops in MEMS manufacture The fabrication of a MEMS device such as an interferometric modulator is improved by employing an etch stop layer between a sacrificial layer and a an electrode. The etch stop may reduce undesirable over-etching of the sacrificial layer and the electrode. The etch s...	06/03/2008
7375028	Method for manufacturing a semiconductor device A semiconductor device may be manufactured by a method that includes forming an etch stop layer on a semiconductor substrate, sequentially forming a first interlayer insulating layer, a first diffusion barrier, a second interlayer insulating layer, and a second diff...	05/20/2008
7361571	Method for fabricating a trench isolation with spacers A method for forming a shallow trench isolation (STI) in a semiconductor device, is presented. In one embodiment, the method includes successively forming a pad oxide and a pad nitride on a silicon substrate, successively etching the pad nitride, the pad oxide, and ...	04/22/2008
7358595	Method for manufacturing MOS transistor Disclosed is a method for fabricating a MOS transistor. The present method includes forming a buffer layer pattern including nitrogen on the semiconductor substrate; forming a gate insulating layer and a gate electrode on the exposed substrate surface; forming a LDD...	04/15/2008
7338910	Method of fabricating semiconductor devices and method of removing a spacer A method of fabricating a semiconductor device is disclosed. The method includes defining an electrode on a semiconductor substrate; forming a spacer on at least one sidewall of the electrode; performing a process operation on the semiconductor substrate using the s...	03/04/2008
7323413	Method for stripping silicon nitride An apparatus and a method for stripping silicon nitride are disclosed that facilitate automatic, real-time, and exact measurement of etch rate and an ending time of the etching process when silicon nitride is stripped with phosphoric acid solution. The method for st...	01/29/2008
7316970	Method for forming high selectivity protection layer on semiconductor device A method for forming a resist protect layer on a semiconductor substrate includes the following steps. An isolation structure is formed on the semiconductor substrate. An original nitride layer having a substantial etch selectivity to the isolation structure is form...	01/08/2008
7297639	Methods for etching doped oxides in the manufacture of microfeature devices Methods for selectively etching doped oxides in the manufacture of microfeature devices are disclosed herein. An embodiment of one such method for etching material on a microfeature workpiece includes providing a microfeature workpiece including a doped oxide layer ...	11/20/2007
7265026	Method of forming a shallow trench isolation structure in a semiconductor device An isolation method in a semiconductor device is disclosed. The example method sequentially forms a pad oxide layer and a pad nitride layer on a semiconductor substrate, patterns the pad nitride and oxide layers to form an opening exposing a portion of the substrate...	09/04/2007
7238295	Regeneration process of etching solution, etching process, and etching system A regeneration process is disclosed for an etching solution composed of a phosphoric acid solution and used in etching silicon nitride films in an etch bath. As a result of the etching, the etching solution contains a silicon compound. According to the regeneration ...	07/03/2007
7235494	CMP cleaning composition with microbial inhibitor An antimicrobial cleaning composition and methods for cleaning semiconductor substrates, particularly after chemical mechanical planarization or polishing, are provided. In one embodiment, the cleaning composition combines a solvent, a cleaning agent such as a hydro...	06/26/2007
7232765	Utilization of a Ta-containing cap over copper to facilitate concurrent formation of copper vias and memory element structures Disclosed are methods for facilitating concurrent formation of copper vias and memory element structures. The methods involve forming vias over metal lines and forming copper plugs, wherein the copper plugs comprise memory element film forming copper plugs (memE cop...	06/19/2007
7220630	Method for selectively forming strained etch stop layers to improve FET charge carrier mobility A strained channel MOSFET device with improved charge carrier mobility and method for forming the same, the method including providing a first and second FET device having a respective first polarity and second polarity opposite the first polarity on a substrate; fo...	05/22/2007
7208805	Structures comprising a layer free of nitrogen between silicon nitride and photoresist The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material comprises silicon and less nitrogen, by atom percent, than the first ma...	04/24/2007
7205245	Method of forming trench isolation within a semiconductor substrate A method of etching silicon nitride substantially selectively relative to an oxide of aluminum includes providing a substrate comprising silicon nitride and an oxide of aluminum. The silicon nitride and the oxide is exposed to an etching solution comprising HF and a...	04/17/2007
7196013	Capping layer for a semiconductor device and a method of fabrication Numerous embodiments of a method and apparatus for a capping layer are disclosed. In one embodiment, a method of forming a capping layer for a semiconductor device comprises forming one or more layers on at least a portion of the top surface of a semiconductor devic...	03/27/2007
7192883	Method of manufacturing semiconductor device The present invention relates to a method of manufacturing a semiconductor device. A minute pattern is formed using a hard mask film of a series of a nitride film as an etch mask. Before a hard mask film removal process is performed, the step of performing given etc...	03/20/2007
7189628	Fabrication of trenches with multiple depths on the same substrate Dual trench depths are achieved on the same wafer by forming an initial trench having a depth corresponding to the difference in final depths of the shallow and deep trenches. A second mask is used to open areas for the deep trenches over the preliminary trenches an...	03/13/2007
7186662	Method for forming a hard mask for gate electrode patterning and corresponding device A method for forming a hard mask for gate electrode patterning in a semiconductor device is disclosed. The method includes providing a polysilicon layer to be etched and forming over the polysilicon layer, a nitride hardmask with a relatively high etch rate to hydro...	03/06/2007
7183226	Method of forming a trench for use in manufacturing a semiconductor device A method for use in manufacturing a semiconductor device includes forming a photoresist pattern on a substrate, performing first etching process in which an initial trench is formed using the photoresist pattern as a mask, and performing second distinct etching proc...	02/27/2007
7176142	Method of manufacturing trench structure for device A porous low-k film, a sacrificial film that can be dissolved in a pure water, an antireflection film and a resist film are successively formed on a dielectric film on a wafer and subsequently exposing the resist film to light in a prescribed pattern and developing ...	02/13/2007
7163834	CMOS image sensor and method of fabricating the same A complementary metal-oxide semiconductor (CMOS) image sensor and a method of fabricating the same are disclosed. In a complementary metal-oxide semiconductor (CMOS) image sensor including a photodiode receiving irradiated light and generating electric charges, a pl...	01/16/2007
7160815	Removal of MEMS sacrificial layers using supercritical fluid/chemical formulations A method and composition for removing silicon-containing sacrificial layers from Micro Electro Mechanical System (MEMS) and other semiconductor substrates having such sacrificial layers is described. The etching compositions include a supercritical fluid (SCF), an e...	01/09/2007
7160816	Method for fabricating semiconductor device The present invention relates to a method for fabricating a semiconductor device. In more detail of the aforementioned method, a first mask layer covering a cell region is formed on an insulation layer in the cell region. Meanwhile, a second mask layer is formed in ...	01/09/2007
7151058	Etchant for etching nitride and method for removing a nitride layer using the same In a method for removing a nitride layer of a semiconductor device, an etchant including about 15 to about 40 percent by volume of hydrofluoric acid, about 15 to about 60 percent by volume of phosphorous acid, and about 25 to about 45 percent by volume of deionized ...	12/19/2006
7148158	Semiconductor device and method for manufacturing the same A semiconductor device includes a semiconductor device comprising a semiconductor substrate, source/drain regions formed in the semiconductor substrate, a gate insulation film formed on the semiconductor substrate, a gate electrode formed on the gate insulation film...	12/12/2006
7125770	Gate Structure in flash memory cell and method of forming the same, and method of forming dielectric film The present invention relates to a gate structure of a flash memory cell and method of forming the same, and method of forming a dielectric film. The method of forming the dielectric film in the flash memory cell comprises the steps of preparing a wafer including a ...	10/24/2006
7119006	Via formation for damascene metal conductors in an integrated circuit A method of fabricating an integrated circuit, having copper metallization formed by a dual damascene process, is disclosed. A layered insulator structure is formed over a first conductor (22), within which a second conductor (40) is formed to contact ...	10/10/2006
7115491	Method for forming self-aligned contact in semiconductor device A method for forming a self-aligned contact on a semiconductor substrate provided with a plurality of field-effect transistors. The method comprises the steps of: forming a thin nitride insulating layer on a gate structure and a diffusion region of the transistor; f...	10/03/2006

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Class 438/757 - Silicon nitride