...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
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| Number | Title | Issue Date |
| 8148272 | Application of millisecond heating source for surface treatment A method for fabricating semiconductor devices, e.g., strained silicon MOS device, includes providing a semiconductor substrate (e.g., silicon wafer) having a surface region, which has one or more contaminants and an overlying oxide layer. The one or more contaminan... | 04/03/2012 |
| 8119537 | Selective etching of oxides to metal nitrides and metal oxides A method is provided for selectively etching native oxides or other contaminants to metal nitrides and metal oxides during manufacture of a semiconductor device. The method utilizes a substantially non-aqueous etchant which includes a source of fluorine ions. In a p... | 02/21/2012 |
| 7879736 | Composition for etching silicon oxide and method of forming a contact hole using the same In a composition for etching silicon oxide, and a method of forming a contact hole using the composition, the composition which includes from about 0.01 to about 2 percent by weight of ammonium bifluoride, from about 2 to about 35 percent by weight of an organic aci... | 02/01/2011 |
| 7803716 | Fabrication method of semiconductor device Provided is a fabrication method of a semiconductor device having an improved production yield. An insulating film for forming sidewall insulating films of a gate electrode is deposited on the main surface of a semiconductor wafer and then, subjected to the t... | 09/28/2010 |
| 7625826 | Method of manufacturing a semiconductor device and an apparatus for use in such a method The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (1) and a semiconductor body (11) which comprises at least one semiconductor element, wherein, after formation of the element, a layer structure is f... | 12/01/2009 |
| 7517811 | Method for fabricating a floating gate of flash rom A method for fabricating a floating gate of the flash memories is described. A pad oxide layer and a silicon nitride layer are formed sequentially on a substrate. A plurality of shallow trenches is formed in the substrate and an active area is defined by the shallow... | 04/14/2009 |
| 7442319 | Poly etch without separate oxide decap The use of an ammonium hydroxide spike to a hot tetra methyl ammonium hydroxide (TMAH) solution to form an insitu poly oxide decapping step in a polysilicon (poly) etch process, results in a single step rapid poly etch process having uniform etch initiation and a hi... | 10/28/2008 |
| 7439190 | Fabrication method of semiconductor device Provided is a fabrication method of a semiconductor device having an improved production yield. An insulating film for forming sidewall insulating films of a gate electrode is deposited on the main surface of a semiconductor wafer and then, subjected to the t... | 10/21/2008 |
| 7439087 | Semiconductor device and manufacturing method thereof A technology for reducing distance between adjacent pixel electrodes to smaller than the limit set by conventional process margin and also preventing adjacent pixel electrodes from being short circuited is provided. In a manufacturing method of a semiconducto... | 10/21/2008 |
| 7435644 | Method of manufacturing capacitor of semiconductor device Provided is a method of manufacturing a capacitor of a semiconductor device, which can prevent tilting or an electrical short of a lower electrode. In the method, a mesh-type bridge insulating layer is formed above the contact plug on a mold oxide layer. The mold ox... | 10/14/2008 |
| 7435683 | Apparatus and method for selectively recessing spacers on multi-gate devices Embodiments of an apparatus and methods for fabricating a spacer on one part of a multi-gate transistor without forming a spacer on another part of the multi-gate transistor are generally described herein. Other embodiments may be described and claimed. ... | 10/14/2008 |
| 7431853 | Selective etching of oxides from substrates A method and system for release etching a micro-electrical-mechanical-systems (MEMS) device from a substrate. In one aspect, the invention is a method comprising (a) supporting at least one substrate having a sacrificial oxide and a non-sacrificial material in a pro... | 10/07/2008 |
| 7432214 | Compositions for dissolution of low-k dielectric film, and methods of use An improved composition and method for cleaning the surface of a semiconductor wafer are provided. The composition can be used to selectively remove a low-k dielectric material such as silicon dioxide, a photoresist layer overlying a low-k dielectric layer, or both ... | 10/07/2008 |
| 7410865 | Method for fabricating capacitor of semiconductor device Disclosed herein is a method for fabricating a capacitor of a semiconductor device. The method comprises the steps of forming an interlayer insulating film on a semiconductor substrate, forming contact plugs connected to the semiconductor substrate though the interl... | 08/12/2008 |
| 7410901 | Submicron device fabrication A method for fabricating substrate material to include trenches and unreleased beams with submicron dimensions includes etching a first oxide layer on the substrate to define a first set of voids in the first oxide layer to expose the substrate. A second oxide layer... | 08/12/2008 |
| 7375028 | Method for manufacturing a semiconductor device A semiconductor device may be manufactured by a method that includes forming an etch stop layer on a semiconductor substrate, sequentially forming a first interlayer insulating layer, a first diffusion barrier, a second interlayer insulating layer, and a second diff... | 05/20/2008 |
| 7371695 | Use of TEOS oxides in integrated circuit fabrication processes A method for manufacturing a low temperature removable silicon dioxide hard mask for patterning and etching is provided, wherein tetra-ethyl-ortho-silane (TEOS) is used to deposit a silicon dioxide hard mask. ... | 05/13/2008 |
| 7368395 | Method for fabricating a nano-imprinting mold An imprinting apparatus and method of fabrication provide a mold having a pattern for imprinting. The apparatus includes a semiconductor substrate polished in a [110] direction. The semiconductor substrate has a (110) horizontal planar surface and vert... | 05/06/2008 |
| 7364666 | Flexible circuits and method of making same Disclosed is a method for making flexible circuits in which portions of a tie layer are removed by etching the underlying polymer. Also disclosed are flexible circuits made by this method. ... | 04/29/2008 |
| 7358196 | Wet chemical treatment to form a thin oxide for high k gate dielectrics Described herein are methods of forming a thin silicon dioxide layer having a thickness of less than eight angstroms on a semiconductor substrate to form the bottom layer of a gate dielectric. A silicon dioxide layer having a thickness of less than eight angstroms m... | 04/15/2008 |
| 7338610 | Etching method for manufacturing semiconductor device A wafer having a dielectric layer and an electrode partially protruding from the top surface of the dielectric layer is provided. The dielectric layer is etched with a chemical solution such as LAL. Prior to etching, the protruding portion of the electrode is remove... | 03/04/2008 |
| 7329616 | Substrate processing apparatus and substrate processing method A substrate processing apparatus and a substrate processing method are provided wherein an oxide film which is thinner than the conventional films can be formed with uniform thickness when forming an oxide film on the front-side surface of a substrate. A subs... | 02/12/2008 |
| 7320942 | Method for removal of metallic residue after plasma etching of a metal layer A method for removal of metallic residue from a substrate after a plasma etch process in a semiconductor substrate processing system by cleaning the substrate in a hydrogen fluoride solution. ... | 01/22/2008 |
| 7317231 | Method for making a semiconductor device having a high-K gate dielectric and a titanium carbide gate electrode A method for making a titanium carbide layer is described. That method comprises alternately introducing a carbon containing precursor and a titanium containing precursor into a chemical vapor deposition reactor, while a substrate is maintained at a selected tempera... | 01/08/2008 |
| 7312159 | Compositions for dissolution of low-k dielectric films, and methods of use An improved composition and method for cleaning the surface of a semiconductor wafer are provided. The composition can be used to selectively remove a low-k dielectric material such as silicon dioxide, a photoresist layer overlying a low-k dielectric layer, or both ... | 12/25/2007 |
| 7312161 | Advanced process control for low variation treatment in immersion processing The variability of immersion processes for treatment of semiconductor devices can be significantly lowered by initiating the termination of a treatment process according to a predetermined treatment termination protocol in a manner that takes into account the contri... | 12/25/2007 |
| 7307026 | Method of forming an epitaxial layer for raised drain and source regions by removing contaminations According to the present invention, a wet chemical oxidation and etch process cycle allows efficient removal of contaminated silicon surface layers prior to the epitaxial growth of raised source and drain regions, thereby effectively reducing the total thermal budge... | 12/11/2007 |
| 7297639 | Methods for etching doped oxides in the manufacture of microfeature devices Methods for selectively etching doped oxides in the manufacture of microfeature devices are disclosed herein. An embodiment of one such method for etching material on a microfeature workpiece includes providing a microfeature workpiece including a doped oxide layer ... | 11/20/2007 |
| 7294577 | Method of manufacturing a silicide layer There is provided a method of manufacturing semiconductor device comprising removing an organic substance from a semiconductor surface having an oxide film thereon, the semiconductor surface being formed to have a line width of 50 nm or less; removing the oxide film... | 11/13/2007 |
| 7259100 | Nanoparticles and method for making the same A method for making nanoparticles, nanoparticle inks and device layers therefrom is disclosed. In accordance with the present invention, nanoparticles are isolated from a composite material that is formed by treating a metal oxide precursor to form the metal nanopar... | 08/21/2007 |
| 7259078 | Method for forming isolation layer in semiconductor memory device Disclosed herein is a method for forming an isolation film of a semiconductor memory device. According to the disclosure, in a pre-treatment cleaning process performed before a tunnel oxide film is formed, a SC-1 cleaning process is performed at a temperature rangin... | 08/21/2007 |
| 7255801 | Deep submicron CMOS compatible suspending inductor A new method is provided for the creation of an inductor. Layers of pad oxide, a thick layer of dielectric and an etch stop layer are successively created over the surface of a substrate. The layers of etch stop material and dielectric are patterned and etched, crea... | 08/14/2007 |
| 7253094 | Methods for cleaning contact openings to reduce contact resistance A method for processing a semiconductor topography which includes removing metal oxide layers from the bottom of contact openings is provided. In some embodiments, the method may include etching openings within a dielectric layer to expose conductive and silicon sur... | 08/07/2007 |
| 7253114 | Self-aligned method for defining a semiconductor gate oxide in high voltage device area A method is provided for forming at least three devices with different gate oxide thicknesses and different associated operating voltages, in the same integrated circuit device. The method includes forming a plurality of gate oxides with different thicknesses in hig... | 08/07/2007 |
| 7238620 | System and method for providing a uniform oxide layer over a laser trimmed fuse with a differential wet etch stop technique A system and method is disclosed for using a differential wet etch stop technique to provide a uniform oxide layer over a metal layer in a laser trimmed fuse. A layer of boron doped oxide with a slow etch rate is placed over the metal layer. A layer of phosphorus do... | 07/03/2007 |
| 7235494 | CMP cleaning composition with microbial inhibitor An antimicrobial cleaning composition and methods for cleaning semiconductor substrates, particularly after chemical mechanical planarization or polishing, are provided. In one embodiment, the cleaning composition combines a solvent, a cleaning agent such as a hydro... | 06/26/2007 |
| 7235495 | Controlled growth of highly uniform, oxide layers, especially ultrathin layers The present invention relates to methods of making oxide layers, preferably ultrathin oxide layers, with a high level of uniformity. One such method includes the steps of forming a substantially saturated or saturated oxide layer directly or indirectly on a semicond... | 06/26/2007 |
| 7226871 | Method for forming a silicon oxynitride layer A method for forming a silicon oxynitride layer, suitable to be used in the production of semiconductor devices, e.g. poly-silicon thin film transistors, is provided. A plasma surface treatment is performed over a substrate after a silicon nitride/silicon oxide laye... | 06/05/2007 |
| 7220635 | Method for making a semiconductor device with a metal gate electrode that is formed on an annealed high-k gate dielectric layer A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, and forming a sacrificial layer on the high-k gate dielectric layer. After etching the sacrificial layer, first and second spacers a... | 05/22/2007 |
| 7208361 | Replacement gate process for making a semiconductor device that includes a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a polysilicon layer on a dielectric layer, which is formed on a substrate. The polysilicon layer is etched to generate a patterned polysilicon layer with an upper surface that is ... | 04/24/2007 |