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| Number | Title | Issue Date |
| 8183162 | Method of forming a sacrificial layer The present disclosure provides a method for making a semiconductor device. The method includes forming a material layer on a substrate; forming a sacrificial layer on the material layer, where the material layer and sacrificial layer each as a thickness less than 1... | 05/22/2012 |
| 8168544 | Oxide etching method There is provided an etching method of an amorphous oxide layer containing In and at least one of Ga and Zn, which includes etching the amorphous oxide layer using an etchant containing any one of acetic acid, citric acid, hydrochloric acid, and perchloric acid.... | 05/01/2012 |
| 8158533 | Piezoelectric tactile sensor A piezoelectric tactile sensor comprises a piezoelectric membrane with a top surface, a transducer of elastic column with a bottom end surface to overlay over the top surface of the piezoelectric membrane and plural microelectrodes being sandwiched between the top s... | 04/17/2012 |
| 8158532 | Topography reduction and control by selective accelerator removal Plating accelerator is applied selectively to a substantially-unfilled wide (e.g., low-aspect-ratio feature cavity. Then, plating of metal is conducted to fill the wide feature cavity and to form an embossed structure in which the height of a wide-feature metal prot... | 04/17/2012 |
| 8138099 | Chip package solder interconnect formed by surface tension Disclosed herein is a solder self-assembly structure, an IC chip including a solder self-assembly structure, and a method of making the same. The structure includes a release layer disposed on a portion of an upper surface of the substrate, laterally spaced from a v... | 03/20/2012 |
| 8119536 | Semiconductor device and method of forming the same Provided are a semiconductor device and a method of forming the semiconductor device. The method may include forming a semiconductor pattern on a substrate, forming an interlayer insulating layer including an opening exposing the semiconductor pattern, forming a sem... | 02/21/2012 |
| 8012883 | Stripping method Methods are provided for manufacturing optical display devices which remove an etch resist and residual post-etch metal in a single step. These methods are particularly useful in the manufacture of LCDs. ... | 09/06/2011 |
| 7972970 | Fabrication of semiconductor interconnect structure An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that ... | 07/05/2011 |
| 7795155 | Method for forming an indium cap layer An indium cap layer is formed by blanket depositing indium onto a surface of metallic interconnects separated by interlayer dielectric, and then selectively chemically etching the indium located on the interlayer dielectric leaving an indium cap layer. Etchants cont... | 09/14/2010 |
| 7741230 | Highly-selective metal etchants A highly selective metal wet etchant with an active ingredient comprising one or more types of molecules having two or more oxygen atoms is described. In one embodiment, the wet etchant is utilized to pattern a metal layer in a semiconductor structure. In another em... | 06/22/2010 |
| 7648920 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes the steps of: forming recesses (a via hole and wiring grooves) in a insulation film; forming a seal layer on inside surfaces of the recesses by using a gas based on a silane having an alkyl group as a precurs... | 01/19/2010 |
| 7605091 | Etchant for conductive materials and method of manufacturing a thin film transistor array panel using the same The present invention provides a method for manufacturing a thin film transistor (TFT) array panel by forming a gate line having a gate electrode on an insulating substrate; sequentially depositing a gate insulating layer and a semiconductor layer on the gate line; ... | 10/20/2009 |
| 7585782 | Methods of forming semiconductor constructions, and methods of selectively removing metal-containing materials relative to oxide The invention includes methods of selectively removing metal-containing copper barrier materials (such as tantalum-containing materials, titanium-containing materials and tungsten-containing materials) relative to oxide (such as silicon dioxide) and/or copper. The s... | 09/08/2009 |
| 7531463 | Fabrication of semiconductor interconnect structure An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that ... | 05/12/2009 |
| 7517810 | Reduced metal design rules for power devices A process for etching a thick aluminum contact layer of a semiconductor wafer comprises the formation of a wet etch photoresist mask and the opening of a window in the mask, followed by a wet etch of a first portion of the thickness of the contact layer exposed by t... | 04/14/2009 |
| 7439087 | Semiconductor device and manufacturing method thereof A technology for reducing distance between adjacent pixel electrodes to smaller than the limit set by conventional process margin and also preventing adjacent pixel electrodes from being short circuited is provided. In a manufacturing method of a semiconducto... | 10/21/2008 |
| 7431861 | Etchant, replenishment solution and method for producing copper wiring using the same An etchant for copper and copper alloys, includes an aqueous solution containing: 14 to 155 g/liter of cupric ion source in terms of a concentration of copper ions; 7 to 180 g/liter of hydrochloric acid; and 0.1 to 50 g/liter of azole, the azole including nitrogen a... | 10/07/2008 |
| 7432211 | Method for manufacturing semiconductor device It is an object of the present invention to a method for manufacturing a semiconductor device, by which a reaction product formed when a conductive layer is etched can be removed. A method for manufacturing a semiconductor device according to the present invention i... | 10/07/2008 |
| 7427569 | Metal etching process and rework method thereof A metal etching process is described. A substrate having a dielectric layer thereon is provided. An aluminum-copper alloy layer is formed on the dielectric layer. A hard mask layer is formed on the aluminum-copper alloy layer. A patterned photoresist layer is formed... | 09/23/2008 |
| 7425278 | Process of etching a titanium/tungsten surface and etchant used therein An etchant which includes an aqueous solution of between about 30% and about 38% concentrated hydrogen peroxide, said percentages being by volume, based on the total volume of the solution; between about 3.5 ml and about 20 ml per liter of phosphoric acid; and an am... | 09/16/2008 |
| 7422696 | Multicomponent nanorods Multicomponent nanorods having segments with differing electronic and/or chemical properties are disclosed. The nanorods can be tailored with high precision to create controlled gaps within the nanorods or to produce diodes or resistors, based upon the identities of... | 09/09/2008 |
| 7413976 | Uniform passivation method for conductive features The top surfaces of conductive features are treated with a treatment solution before forming a passivation layer over the conductive features. The treatment solution includes a cleaning solution and a chemical grafting precursor. The treatment solution may also incl... | 08/19/2008 |
| 7402529 | Method of applying cladding material on conductive lines of MRAM devices A method of fabricating a cladding region for use in MRAM devices includes the formation of a conductive bit line proximate to a magnetoresistive memory device. The conductive bit line is immersed in a first bath containing dissolved ions of a first conductive mater... | 07/22/2008 |
| 7396708 | Etching method for metal layer of display panel An etching process of a metal layer of a display panel is provided. First, a substrate with at least one display panel region, a testing device region, and a non-device region is provided. Then, a metal layer is formed over the substrate to cover the display panel r... | 07/08/2008 |
| 7396773 | Method for cleaning a gate stack A method of making a semiconductor structure, comprises cleaning a gate stack with a cleaning solution. The gate stack comprises a gate layer, a metallic layer on the gate layer, and a etch-stop layer on the metallic layer. The gate layer is on a semiconductor subst... | 07/08/2008 |
| 7390754 | Method of forming a silicide A method of stripping a remnant metal is disclosed. The remnant metal is formed on a transitional silicide of a silicon substrate. Firstly, a surface oxidation process is performed on the transitional silicide, so as to form a protective layer on the transitional si... | 06/24/2008 |
| 7387970 | Method of using an aqueous solution and composition thereof A method for processing semiconductor wafers is disclosed. A semiconductor wafer is provided to a semiconductor processing stage where a block copolymer surfactant (BCS) is applied to the wafer surface. In one embodiment, the BCS includes a hydrophobic portion and a... | 06/17/2008 |
| 7384799 | Method to avoid amorphous-si damage during wet stripping processes in the manufacture of MEMS devices A method for forming a MEMS device using an amorphous silicon layer as a release layer includes etching superjacent films and using the amorphous silicon layer as an etch stop layer. The amorphous silicon layer is resistant to attack during the post-etch solvent str... | 06/10/2008 |
| 7371333 | Methods of etching nickel silicide and cobalt silicide and methods of forming conductive lines The invention includes methods of etching nickel silicide and cobalt silicide, and methods of forming conductive lines. In one implementation, a substrate comprising nickel silicide is exposed to a fluid comprising H3PO4 and H2O at a... | 05/13/2008 |
| 7368397 | Method for monitoring edge bead removal process of copper metal interconnection Disclosed is a method for monitoring an edge bead removal process for a copper metal interconnection. The method includes the steps of (a) forming a copper metal layer on a semiconductor wafer, (b) performing the edge bead removal (EBR) process of removing the coppe... | 05/06/2008 |
| 7364666 | Flexible circuits and method of making same Disclosed is a method for making flexible circuits in which portions of a tie layer are removed by etching the underlying polymer. Also disclosed are flexible circuits made by this method. ... | 04/29/2008 |
| 7358195 | Method for fabricating liquid crystal display device In etching a metal line formed as a dual layer of aluminum alloy and molybdenum, the metal line consisting of the dual layer of aluminum alloy and molybdenum is etched through one-time wet etching by applying the etchant including HNO3, HClO4, ... | 04/15/2008 |
| 7357878 | Etchant, and method for fabricating a thin film transistor subtrate including conductive wires using the etchant and the resulting structure Provided are an etchant, a method for fabricating a wire using the etchant, and a method for fabricating a thin film transistor (TFT) substrate using the etchant. The etchant includes a material having the formula 1, ammonium acetic acid, and the remainder of deioni... | 04/15/2008 |
| 7354698 | Imprint lithography An imprinting method is disclosed which involves irradiating a photo-curable imprintable medium in a flowable state on a substrate with radiation to initiate curing of the medium, after the irradiating, contacting the medium with a template to form an imprint in the... | 04/08/2008 |
| 7355288 | Low fabrication cost, high performance, high reliability chip scale package The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elast... | 04/08/2008 |
| 7351660 | Process for producing high performance interconnects A method for fabricating high performance vertical and horizontal electrical connections in a three dimensional semiconductor structure. A dielectric film is imprinted with a stamp pattern at high vacuum and with precise temperature and stamping pressure control. Th... | 04/01/2008 |
| 7341958 | Integrated process for thin film resistors with silicides The formation of devices in semiconductor material. In one embodiment, a method of forming a semiconductor device is provided. The method comprises forming at least one hard mask overlaying at least one layer of resistive material. Forming at least one opening to a ... | 03/11/2008 |
| 7342637 | Liquid crystal display device and method for manufacturing the same A method for manufacturing the LCD device includes forming a thin film transistor array having gate and data lines crossing to each other, defining pixel regions on a substrate, and thin film transistors arranged at crossings of the gate and data lines; forming a pa... | 03/11/2008 |
| 7328713 | Nozzle apparatus for stripping edge bead of wafer There is provided a nozzle apparatus for stripping an edge bead from a wafer, which includes a rotatable support arm, and a side rinse nozzle coupled to a leading end of the support arm to remove the bead of photoresist remaining on the edge of a wafer. The side rin... | 02/12/2008 |
| 7329616 | Substrate processing apparatus and substrate processing method A substrate processing apparatus and a substrate processing method are provided wherein an oxide film which is thinner than the conventional films can be formed with uniform thickness when forming an oxide film on the front-side surface of a substrate. A subs... | 02/12/2008 |
