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| Number | Title | Issue Date |
| 7906439 | Method of fabricating a MEMS/NEMS electromechanical component The invention provides a method of fabricating and electromechanical device having an active element on at least one substrate, the method having the steps of: a) making a heterogeneous substrate having a first portion, an interface layer, and a second portion, the ... | 03/15/2011 |
| 7727901 | Preparation of group IV semiconductor nanoparticle materials and dispersions thereof A method of forming an ink, the ink configured to form a conductive densified film is disclosed. The method includes providing a set of Group IV semiconductor particles, wherein each Group IV semiconductor particle of the set of Group IV semiconductor particles incl... | 06/01/2010 |
| 7642197 | Method to improve performance of secondary active components in an esige CMOS technology According to various embodiments, there are eSiGe CMOS devices and methods of making them. The method of making a substrate for a CMOS device can include providing a DSB silicon substrate including a first bonded to a second layer, wherein each layer has a (100) ori... | 01/05/2010 |
| 7608548 | Method for cleaning a multilayer substrate and method for bonding substrates and method for producing a bonded wafer Disclosed is a method for cleaning a multilayer substrate at least having a silicon single crystal wafer with a SiGe layer epitaxially grown on a surface of the silicon single crystal wafer, where the SiGe layer is an outermost surface of the SiGe layer and then cle... | 10/27/2009 |
| 7572740 | Methods for optimizing thin film formation with reactive gases A method for producing a Group IV semiconductor thin film in a chamber is disclosed. The method includes positioning a substrate in the chamber, wherein the chamber further has a chamber pressure. The method further includes depositing a nanoparticle ink on the subs... | 08/11/2009 |
| 7439189 | Surface treatment after selective etching The invention concerns a method of treating wafers comprising at least one surface layer of silicon-germanium (SiGe) and a layer of strained silicon beneath the SiGe layer. The strained silicon layer is denuded by a step of selective etching of the SiGe layer by dis... | 10/21/2008 |
| 7439165 | Method of fabricating tensile strained layers and compressive strain layers for a CMOS device A process for forming both tensile and compressive strained silicon layers to accommodate channel regions of MOSFET or CMOS devices has been developed. After formation of shallow trench isolation structures as well as application of high temperature oxidation and ac... | 10/21/2008 |
| 7419908 | Process for making an array of wells A method of fabricating electronic, optical or magnetic devices requiring an array of large numbers of small feature in which regions defining individual features of the array are foamed by the steps of: (a) depositing a very thin film of a highly soluble solid onto... | 09/02/2008 |
| 7396483 | Uniform chemical etching method The invention concerns a method of wet chemical etching of a wafer comprising at least one surface layer of silicon-germanium (SiGe) for etching by dispensing an etching solution deposited on a rotating wafer, the method being characterized in that it comprises a fi... | 07/08/2008 |
| 7396733 | Method for manufacturing semiconductor substrate and method for manufacturing semiconductor device A method for manufacturing a semiconductor substrate, including: forming a first semiconductor layer on a semiconductive base; forming a second semiconductor layer, having a smaller etching selection ratio than that of the first semiconductor layer, on the first sem... | 07/08/2008 |
| 7378353 | High selectivity BPSG to TEOS etchant An organic acid/fluoride-containing solution etchant having high selectivity for BPSG to TEOS. In an exemplary situation, a TEOS layer may be used to prevent contamination of other components in a semiconductor device by the boron and phosphorous in a layer of BPSG ... | 05/27/2008 |
| 7378305 | Semiconductor integrated circuit and fabrication process thereof A semiconductor integrated circuit device includes an n-channel MOS transistor formed on a first device region of a silicon substrate and a p-channel MOS transistor formed on a second device region of the silicon substrate, wherein the n-channel MOS transistor inclu... | 05/27/2008 |
| 7361574 | Single-crystal silicon-on-glass from film transfer A method is provided for transferring a single-crystal silicon (Si) film to a glass substrate. The method deposits a germanium (Ge)-containing material overlying a Si wafer, forming a sacrificial Ge-containing film. A single-crystal Si film is formed overlying the s... | 04/22/2008 |
| 7326654 | Monodisperse nanoparticles produced by size-selective photoetching reaction Monodisperse nanoparticles are prepared with a high degree of reproducibility by controlling pH in size-selective photoetching. The nanoparticles have uniform optical properties and other properties. ... | 02/05/2008 |
| 7317231 | Method for making a semiconductor device having a high-K gate dielectric and a titanium carbide gate electrode A method for making a titanium carbide layer is described. That method comprises alternately introducing a carbon containing precursor and a titanium containing precursor into a chemical vapor deposition reactor, while a substrate is maintained at a selected tempera... | 01/08/2008 |
| 7303949 | High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture A semiconductor device and method of manufacturing a semiconductor device. The semiconductor device includes channels for a pFET and an nFET. A SiGe layer is selectively grown in the source and drain regions of the pFET channel and a Si:C layer is selectively grown ... | 12/04/2007 |
| 7247534 | Silicon device on Si:C-OI and SGOI and method of manufacture A semiconductor structure and method of manufacturing is provided. The method of manufacturing includes forming shallow trench isolation (STI) in a substrate and providing a first material and a second material on the substrate. The first material and the second mat... | 07/24/2007 |
| 7241707 | Layered films formed by controlled phase segregation Multiple-layer films in integrated circuit processing may be formed by the phase segregation of a single composition formed above a semiconductor substrate. The composition is then induced to phase segregate into at least a first continuous phase and a second contin... | 07/10/2007 |
| 7238291 | Method for removing oxides from a Ge semiconductor substrate surface This invention relates to a method for removing oxides from the surface of a Ge semiconductor substrate comprising the step of subjecting the surface to a Ge oxide etching solution characterized in that the Ge oxide etching solution removes Ge oxides and Ge sub-oxid... | 07/03/2007 |
| 7238622 | Wafer bonded virtual substrate and method for forming the same A method of forming a virtual substrate comprised of an optoelectronic device substrate and handle substrate comprises the steps of initiating bonding of the device substrate to the handle substrate, improving or increasing the mechanical strength of the device and ... | 07/03/2007 |
| 7233054 | Phase change material and non-volatile memory device using the same The present invention provides a phase change memory cell comprising (GeASbBTeC)1-X(RaSbTeC)X solid solution, the solid solution being formed from a Ge—Sb—Te based alloy and ... | 06/19/2007 |
| 7226842 | Fabricating strained channel epitaxial source/drain transistors The mobility of carriers may be increased in strained channel epitaxial source/drain transistors. Doped silicon material may be blanket deposited after removing ion implanted source/drain regions. The blanket deposition forms amorphous films over non-source/drain ar... | 06/05/2007 |
| 7211521 | Capping layer for crystallizing germanium, and substrate having thin crystallized germanium layer A structure including at least one layer of germanium formed on a surface of a ceramic substrate is provided. The layer of germanium has a thickness of not larger than 10 microns and includes grains having grain size of at least 0.05 mm. A structure including at lea... | 05/01/2007 |
| 7202121 | Methods for preserving strained semiconductor substrate layers during CMOS processing Oxidation methods, which avoid consuming undesirably large amounts of surface material in Si/SiGe heterostructure-based wafers, replace various intermediate CMOS thermal oxidation steps. First, by using oxide deposition methods, arbitrarily thick oxides may be forme... | 04/10/2007 |
| 7199015 | Rare earth-oxides, rare earth-nitrides, rare earth-phosphides and ternary alloys with silicon Atomic layer epitaxy (ALE) is applied to the fabrication of new forms of rare-earth oxides, rare-earth nitrides and rare-earth phosphides. Further, ternary compounds composed of binary (rare-earth oxides, rare-earth nitrides and rare-earth phosphides) mixed with sil... | 04/03/2007 |
| 7195934 | Method and system for deposition tuning in an epitaxial film growth apparatus A method of calculating a process parameter for a deposition of an epitaxial layer on a substrate. The method includes the steps of measuring an effect of the process parameter on a thickness of the epitaxial layer to determine a gain curve for the process parameter... | 03/27/2007 |
| 7192884 | Method for manufacturing semiconductor laser device Disclosed is a method for manufacturing a semiconductor laser device, comprising the steps of: (a) forming a first conductive-type clad layer, an active layer, and a second conductive-type clad layer on a first conductive-type semiconductor substrate; (b) forming a ... | 03/20/2007 |
| 7176090 | Method for making a semiconductor device that includes a metal gate electrode A method for making a semiconductor device is described. That method comprises forming on a substrate a dielectric layer and a sacrificial structure that comprises a first layer and a second layer, such that the second layer is formed on the first layer and is wider... | 02/13/2007 |
| 7176041 | PAA-based etchant, methods of using same, and resultant structures A wet-etch composition may include: peracetic acid (PAA); and a fluorinated acid; a relative amount of the PAA in the composition being sufficient to ensure an etch rate of (P-doped-SiGe):(P-doped-Si) that is substantially the same as an etch rate of (N-doped-SiGe):... | 02/13/2007 |
| 7176128 | Method for fabrication of a contact structure A method for producing a contact structure on a structured surface comprising producing a first conductive layer on the structured surface, wherein the first conductive layer comprising tungsten. A conductive seed layer is produced on the first conductive layer, the... | 02/13/2007 |
| 7172975 | Process for the wet chemical treatment of semiconductor wafers A process for the wet chemical treatment of semiconductor wafers, in which the semiconductor wafers are treated with treatment liquids, has the semiconductor wafers firstly treated with an aqueous HF solution, then treated with an aqueous O3 solution and ... | 02/06/2007 |
| 7163903 | Method for making a semiconductor structure using silicon germanium A semiconductor substrate having a silicon layer is provided. In one embodiment, the substrate is a silicon-on-insulator (SOI) substrate having an oxide layer underlying the silicon layer. An amorphous or polycrystalline silicon germanium layer is formed overlying t... | 01/16/2007 |
| 7160779 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer that contacts a metal oxide layer. The metal oxide layer is generated by forming a metal layer, then oxidizing the metal layer. ... | 01/09/2007 |
| 7153734 | CMOS device with metal and silicide gate electrodes and a method for making it A semiconductor device and a method for forming it are described. The semiconductor device comprises a metal NMOS gate electrode that is formed on a first part of a substrate, and a silicide PMOS gate electrode that is formed on a second part of the substrate. ... | 12/26/2006 |
| 7153753 | Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the... | 12/26/2006 |
| 7132034 | Apparatus for etching a glass substrate In an apparatus for etching a glass substrate according to the present invention, impurities that are attached to the surface of a glass substrate, which are formed by assembling a color filter substrate and a TFT substrate provided in the etching bath filled with e... | 11/07/2006 |
| 7129184 | Method of depositing an epitaxial layer of SiGe subsequent to a plasma etch A method of preparing a silicon layer or substrate surface for growing an epitaxial layer of SiGe thereon. The process comprises removing native oxide from the surface of the silicon with an HF solution, and then oxidizing the exposed silicon surface to form a chemi... | 10/31/2006 |
| 7084038 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming an oxide layer on a substrate, and forming a high-k dielectric layer on the oxide layer. The oxide layer and the high-k dielectric layer are then annealed at a sufficient temperat... | 08/01/2006 |
| 7074680 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming an oxide layer on a substrate, and forming a high-k dielectric layer on the oxide layer. The oxide layer and the high-k dielectric layer are then annealed at a sufficient temperat... | 07/11/2006 |
| 7064066 | Method for making a semiconductor device having a high-k gate dielectric and a titanium carbide gate electrode A method for making a titanium carbide layer is described. That method comprises alternately introducing a carbon containing precursor and a titanium containing precursor into a chemical vapor deposition reactor, while a substrate is maintained at a selected tempera... | 06/20/2006 |
