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| Number | Title | Issue Date |
| 7919415 | Process of manufacturing a semiconductor device A process of manufacturing a semiconductor device includes the steps of forming a stacked structure of a first III-V compound semiconductor layer containing In and having a composition different from InP and a second III-V compound semiconductor layer containing In.... | 04/05/2011 |
| 7727900 | Surface preparation for gate oxide formation that avoids chemical oxide formation A cleaning sequence usable in semiconductor manufacturing efficiently cleans semiconductor substrates while preventing chemical oxide formation thereon. The sequence includes the sequence of: 1) treating with an HF solution; 2) treating with pure H2SO | 06/01/2010 |
| 7700497 | Methods for fabricating residue-free contact openings A two-step via cleaning process that removes metal polymer and oxide polymer residues from a via with substantially no damage to the via or underlying structures on a semiconductor substrate. The via is formed through a dielectric layer and a barrier layer that are ... | 04/20/2010 |
| 7470631 | Methods for fabricating residue-free contact openings A two-step via cleaning process that removes metal polymer and oxide polymer residues from a via with substantially no damage to the via or underlying structures on a semiconductor substrate. The via is formed through a dielectric layer and a barrier layer that are ... | 12/30/2008 |
| 7442652 | Method for removing contamination and method for fabricating semiconductor device A method for removing contamination on a semiconductor substrate is disclosed. The contamination contains at least one element belonging to one of 3A group, 3B group and 4A group of long-period form of periodic system of elements. The method comprises first and seco... | 10/28/2008 |
| 7435689 | Process for fabricating electron emitting device, electron source, and image display device A process for fabricating an electron emitting device comprises a cathode electrode and a gate electrode are laminated through an insulating layer and an electron emitting film on the cathode electrode located in a gate hole penetrating through the gate electrode an... | 10/14/2008 |
| 7432204 | Wafer and the manufacturing and reclaiming methods thereof A wafer and the manufacturing and reclaiming methods thereof are disclosed. The wafer includes a semiconductor substrate and a protective layer formed on the surface of the semiconductor substrate. The reclaiming method of the wafer includes providing a wafer having... | 10/07/2008 |
| 7432214 | Compositions for dissolution of low-k dielectric film, and methods of use An improved composition and method for cleaning the surface of a semiconductor wafer are provided. The composition can be used to selectively remove a low-k dielectric material such as silicon dioxide, a photoresist layer overlying a low-k dielectric layer, or both ... | 10/07/2008 |
| 7429537 | Methods and apparatus for rinsing and drying A method for rinsing and drying a workpiece includes placing the workpiece into a chamber and spinning the workpiece. A rinsing fluid, such as water, is applied onto the workpiece through a first outlet in the chamber, with the rinsing fluid moving outwardly towards... | 09/30/2008 |
| 7427544 | Semiconductor device and method of manufacturing the same A semiconductor device includes an element isolation insulating film provided in a semiconductor substrate between first and second element regions, a gate electrode running over the element isolation insulating film, first and second element regions, a first stoppe... | 09/23/2008 |
| 7405165 | Dual-tank etch method for oxide thickness control A dual-tank etch method which is suitable for the stripping of a silicon nitride layer from a pad oxide layer provided on a substrate, and etching of the pad oxide layer to a desired target thickness, is disclosed. The method includes providing a first processing ta... | 07/29/2008 |
| 7405139 | Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etch A method of preventing the formation of cracks on the backside of a silicon (Si) semiconductor chip or wafer during the processing thereof. Also provided is a method for inhibiting the propagation of cracks, which have already formed in the backside of a silicon chi... | 07/29/2008 |
| 7405163 | Selectively accelerated plating of metal features An accelerator solution is globally applied to a workpiece to form an accelerator film, and then a portion of the accelerator film is selectively removed from the workpiece to form an acceleration region having a higher concentration of accelerator. The higher conce... | 07/29/2008 |
| 7399713 | Selective treatment of microelectric workpiece surfaces This invention provides a process for treating a workpiece having a front side, a back side, and an outer perimeter. In accordance with the process, a processing fluid is selectively applied or excluded from an outer peripheral margin of at least one of the front or... | 07/15/2008 |
| 7396773 | Method for cleaning a gate stack A method of making a semiconductor structure, comprises cleaning a gate stack with a cleaning solution. The gate stack comprises a gate layer, a metallic layer on the gate layer, and a etch-stop layer on the metallic layer. The gate layer is on a semiconductor subst... | 07/08/2008 |
| 7390754 | Method of forming a silicide A method of stripping a remnant metal is disclosed. The remnant metal is formed on a transitional silicide of a silicon substrate. Firstly, a surface oxidation process is performed on the transitional silicide, so as to form a protective layer on the transitional si... | 06/24/2008 |
| 7384799 | Method to avoid amorphous-si damage during wet stripping processes in the manufacture of MEMS devices A method for forming a MEMS device using an amorphous silicon layer as a release layer includes etching superjacent films and using the amorphous silicon layer as an etch stop layer. The amorphous silicon layer is resistant to attack during the post-etch solvent str... | 06/10/2008 |
| 7378353 | High selectivity BPSG to TEOS etchant An organic acid/fluoride-containing solution etchant having high selectivity for BPSG to TEOS. In an exemplary situation, a TEOS layer may be used to prevent contamination of other components in a semiconductor device by the boron and phosphorous in a layer of BPSG ... | 05/27/2008 |
| 7378354 | Atomic layer deposition methods The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition ... | 05/27/2008 |
| 7364666 | Flexible circuits and method of making same Disclosed is a method for making flexible circuits in which portions of a tie layer are removed by etching the underlying polymer. Also disclosed are flexible circuits made by this method. ... | 04/29/2008 |
| 7354869 | Substrate processing method, substrate processing apparatus, and semiconductor device manufacturing method A method for a substrate processing apparatus having a substrate holding mechanism and a chemical solution dispensing/sucking mechanism including a chemical solution dispensing port for supplying a first chemical solution and a chemical solution suction port, includ... | 04/08/2008 |
| 7354870 | Process for chemical etching of parts fabricated by stereolithography A process for chemically etching a stereolithography resin involves chemically etching a shaped object of the resin at a temperature in a range of from about 20° C. to about 30° C. for a time of from about 30 seconds to about 60 seconds with a saturated aqueous so... | 04/08/2008 |
| 7344999 | Method for cleaning substrate having exposed silicon and silicon germanium layers and related method for fabricating semiconductor device A method for cleaning a substrate on which a silicon layer and a silicon germanium layer are formed and exposed, and method for fabricating a semiconductor device using the cleaning method are disclosed. The cleaning method comprises preparing a semiconductor substr... | 03/18/2008 |
| 7338908 | Method for fabrication of semiconductor interconnect structure with reduced capacitance, leakage current, and improved breakdown voltage An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that ... | 03/04/2008 |
| 7338911 | Method for etching and for forming a contact hole using thereof A method for forming a structure formed by etching which is typified by a contact hole in the semiconductor and a method for manufacturing a display device using the structure. The etching method includes at least, forming an organic mask having a first opening port... | 03/04/2008 |
| 7332437 | Method for processing semiconductor wafer and semiconductor wafer There is provided a method for processing a semiconductor wafer subjected to a chamfering process, a lapping process, an etching process, and a mirror-polishing process, wherein acid etching is performed after alkaline etching as the etching process, and the acid et... | 02/19/2008 |
| 7312159 | Compositions for dissolution of low-k dielectric films, and methods of use An improved composition and method for cleaning the surface of a semiconductor wafer are provided. The composition can be used to selectively remove a low-k dielectric material such as silicon dioxide, a photoresist layer overlying a low-k dielectric layer, or both ... | 12/25/2007 |
| 7303933 | Process of manufacturing a semiconductor device A process of manufacturing a semiconductor device includes the steps of forming a stacked structure of a first III-V compound semiconductor layer containing In and having a composition different from InP and a second III-V compound semiconductor layer containing In.... | 12/04/2007 |
| 7291283 | Combined wet etching method for stacked films and wet etching system used for same A combined wet etching method for stacked films which is capable of performing etching processes in a collective manner while controlling an amount of side-etching on each of stacked films and of making uniform side edges. In the wet etching method, two or more type... | 11/06/2007 |
| 7291282 | Method of fabricating a mold for imprinting a structure The present invention provides a method of fabricating an imprint mold for molding a structure. The method includes directing a first and a second flux for forming a first material and a second material, respectively, to a substrate to form a layered structure havin... | 11/06/2007 |
| 7288207 | Etching liquid for controlling silicon wafer surface shape and method for manufacturing silicon wafer using the same A method for manufacturing a silicon wafer includes a planarizing process 13 for polishing or lapping the upperside and lowerside surfaces of a thin disk-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process for dipping t... | 10/30/2007 |
| 7279376 | Method for manufacturing semiconductor device The present invention provides a technology for forming the trenches having different depths in one semiconductor substrate, which enables easily conducting the photo resist process employed for the etch process and forming trenches at higher depth dimension accurac... | 10/09/2007 |
| 7276452 | Method for removing mottled etch in semiconductor fabricating process A method for removing mottled etch in a semiconductor fabricating process, prevents mottled etch from being generated after etching, by performing ashing using an oxide plasma, prior to performing wet etching using a photoresist pattern. The method for removing the ... | 10/02/2007 |
| 7270763 | Anisotropic wet etching of silicon A silicon oxide film is formed on one principal surface of a silicon substrate by thermal oxidation, and thereafter, a silicon nitride film is formed on the silicon oxide film by CVD. A lamination layer of the silicon oxide film and silicon nitride film is selective... | 09/18/2007 |
| 7271060 | Semiconductor processing methods The invention includes methods in which common processing steps are utilized during fabrication of components of a memory array region of a semiconductor substrate and components of a peripheral region proximate the memory array region, and yet the components of the... | 09/18/2007 |
| 7259103 | Fabrication method of polycrystalline silicon TFT A method of fabricating polycrystalline silicon thin film transistor according to the present invention includes: depositing a buffer layer on a substrate; depositing an amorphous silicon layer on the buffer layer with a predetermined thickness; crystallizing the de... | 08/21/2007 |
| 7253114 | Self-aligned method for defining a semiconductor gate oxide in high voltage device area A method is provided for forming at least three devices with different gate oxide thicknesses and different associated operating voltages, in the same integrated circuit device. The method includes forming a plurality of gate oxides with different thicknesses in hig... | 08/07/2007 |
| 7250669 | Process to reduce substrate effects by forming channels under inductor devices and around analog blocks A first method of reducing semiconductor device substrate effects comprising the following steps. O+or O2+are selectively implanted into a silicon substrate to form a silicon-damaged silicon oxide region. One or more devices are form... | 07/31/2007 |
| 7247576 | Method of manufacturing a semiconductor device The occurrence of a package crack in the back vicinity of a die pad is restrained by making the outward appearance of the die pad of a lead frame smaller than that of a semiconductor chip which is mounted on it, and also the occurrence of a package crack in the main... | 07/24/2007 |
| 7241699 | Wide bandgap semiconductor device construction The invention includes methods for precisely and accurately etching layers of wide bandgap semiconductor material. According to one aspect of the invention, the method includes providing a multi-layer laminate including at least a first and second layer of wide band... | 07/10/2007 |
