Did You Know...
...that the Eveready Battery began as an invention called the "electric flowerpot," which was a tube with a battery and light bulb inside? The idea was to fasten this gizmo to the side of a flowerpot so it would illuminate the flowers from the bottom. The idea died on the vine and the businessman who licensed the flower pot, Conrad Huber, was left with a pile of useless tubes -- until he found a way to market them as batteries to light the world!
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| Number | Title | Issue Date |
| 8076248 | Methods for forming semiconductor constructions, and methods for selectively etching silicon nitride relative to conductive material The invention includes methods for selectively etching insulative material supports relative to conductive material. The invention can include methods for selectively etching silicon nitride relative to metal nitride. The metal nitride can be in the form of containe... | 12/13/2011 |
| 8062982 | High yield plasma etch process for interlayer dielectrics A high yield plasma etch process for an interlayer dielectric layer of a semiconductor device is provided, according to an embodiment of which a dielectric layer is etched with a nitrogen-containing plasma. In this way, the formation of polymers on a backside bevel ... | 11/22/2011 |
| 7442319 | Poly etch without separate oxide decap The use of an ammonium hydroxide spike to a hot tetra methyl ammonium hydroxide (TMAH) solution to form an insitu poly oxide decapping step in a polysilicon (poly) etch process, results in a single step rapid poly etch process having uniform etch initiation and a hi... | 10/28/2008 |
| 7435683 | Apparatus and method for selectively recessing spacers on multi-gate devices Embodiments of an apparatus and methods for fabricating a spacer on one part of a multi-gate transistor without forming a spacer on another part of the multi-gate transistor are generally described herein. Other embodiments may be described and claimed. ... | 10/14/2008 |
| 7435644 | Method of manufacturing capacitor of semiconductor device Provided is a method of manufacturing a capacitor of a semiconductor device, which can prevent tilting or an electrical short of a lower electrode. In the method, a mesh-type bridge insulating layer is formed above the contact plug on a mold oxide layer. The mold ox... | 10/14/2008 |
| 7425277 | Method for hard mask CD trim Broadly speaking, methods and an apparatus are provided for removing an inorganic material from a substrate. More specifically, the methods provide for removing the inorganic material from the substrate through exposure to a high density plasma generated using an in... | 09/16/2008 |
| 7419915 | Laser assisted chemical etching method for release microscale and nanoscale devices A method using an etchant and a laser for localized precise heating enables precise etching and release of MEMS devices with improved process control while expanding the number of materials used to make MEMS, including silicon-dioxide patterned films buried in and s... | 09/02/2008 |
| 7419917 | Ion implanted microscale and nanoscale device method A method is used for producing nanoscale and microscale devices in a variety of materials, such as silicon dioxide patterned buried films. The method is inexpensive and reliable for making small scale mechanical, optical, or electrical devices and relies upon the im... | 09/02/2008 |
| 7419916 | Manufacturing method of semiconductor device The present invention provides a method for preventing the defect the in shape of via holes cased when an alumina mask is used for the dry etching of an interlayer insulator composed of an SiOC film in the dual damascene process in which via holes are formed prior t... | 09/02/2008 |
| 7393795 | Methods for post-etch deposition of a dielectric film Methods for post-etch deposition on a dielectric film are provided in the present invention. In one embodiment, the method includes providing a substrate having a low-k dielectric layer disposed thereon in a etch reactor, etching the low-k dielectric layer in the et... | 07/01/2008 |
| 7390750 | Method of patterning elements within a semiconductor topography A method is provided which includes forming a hardmask feature adjacent to a patterned sacrificial structure of a semiconductor topography, selectively removing the patterned sacrificial structure to expose a lower layer and etching exposed portions of the lower lay... | 06/24/2008 |
| 7381653 | Plasma processing method A plasma processing method is conducted while a thickness of a resist film being monitored, thereby preventing the thickness of the resist film from being reduced. The plasma processing method includes steps of supplying a processing gas into an airtight processing ... | 06/03/2008 |
| 7375028 | Method for manufacturing a semiconductor device A semiconductor device may be manufactured by a method that includes forming an etch stop layer on a semiconductor substrate, sequentially forming a first interlayer insulating layer, a first diffusion barrier, a second interlayer insulating layer, and a second diff... | 05/20/2008 |
| 7365016 | Anhydrous HF release of process for MEMS devices A method of etching a sacrificial oxide layer covering an etch-stop silicon nitride underlayer, involves exposing the sacrificial oxide to anhydrous HF at a temperature of less than about 100° C. and/or at vacuum level lower than 40 Torr; and subsequently performin... | 04/29/2008 |
| 7358196 | Wet chemical treatment to form a thin oxide for high k gate dielectrics Described herein are methods of forming a thin silicon dioxide layer having a thickness of less than eight angstroms on a semiconductor substrate to form the bottom layer of a gate dielectric. A silicon dioxide layer having a thickness of less than eight angstroms m... | 04/15/2008 |
| 7358182 | Method of forming an interconnect structure A method of forming damascene interconnect structure in an organo-silicate glass layer without causing damage to the organo-silicate glass material. The method includes forming a stack of hardmask layers over the organo-silicate glass layer, defining openings in the... | 04/15/2008 |
| 7351665 | Plasma etching method, plasma etching apparatus, control program, computer recording medium and recording medium having processing recipe recorded thereon In a first step and a thirst step, etching gases are used which contain fluorocarbon gases having C/F atom number ratios higher than that in a second step. A hole is formed to a midpoint in a silicon oxide film in the first step, the hole is formed until a base SiN ... | 04/01/2008 |
| 7341952 | Multi-layer hard mask structure for etching deep trench in substrate A method for etching a deep trench in a substrate. A multi-layer hard mask structure is formed overlying the substrate, which includes a first hard mask layer and at least one second hard mask layer disposed thereon. The first hard mask layer is composed of a first ... | 03/11/2008 |
| 7338906 | Method for fabricating semiconductor device The present invention relates to a method for fabricating a semiconductor device with a fine pattern even without decreasing a line width of a photoresist pattern. The method includes the steps of: forming a target etching layer on a substrate; forming a plurality o... | 03/04/2008 |
| 7338850 | Method for manufacturing device isolation film of semiconductor device A method for manufacturing device isolation film of semiconductor device is disclosed. The method utilizes a plasma oxidation of a liner nitride film exposed by etching a liner oxide the film in peripheral region prior to the formation of device isolation film to pr... | 03/04/2008 |
| 7335600 | Method for removing photoresist A method for removing photoresist is described. A substrate having a photoresist to be removed thereon is provided, and then an ashing process is performed to remove most of the photoresist. The substrate is then subjected to a surface treatment that provides suffic... | 02/26/2008 |
| 7326358 | Plasma processing method and apparatus, and storage medium A plasma processing method performs a plasma processing on a substrate mounted on a mounting table installed in an airtight processing chamber, the mounting table having a smaller size than the substrate. The substrate having a surface, on which a resist mark is for... | 02/05/2008 |
| 7323418 | Etch-back process for capping a polymer memory device The present invention leverages an etch-back process to provide an electrode cap for a polymer memory element. This allows the polymer memory element to be formed within a via embedded in layers formed on a substrate. By utilizing the etch-back process, the present ... | 01/29/2008 |
| 7320942 | Method for removal of metallic residue after plasma etching of a metal layer A method for removal of metallic residue from a substrate after a plasma etch process in a semiconductor substrate processing system by cleaning the substrate in a hydrogen fluoride solution. ... | 01/22/2008 |
| 7316785 | Methods and apparatus for the optimization of etch resistance in a plasma processing system In a plasma processing system, including a plasma processing chamber, a method of optimizing the etch resistance of a substrate material is described. The method includes flowing pre-coat gas mixture into the plasma processing chamber, wherein the pre-coat gas mixtu... | 01/08/2008 |
| 7311852 | Method of plasma etching low-k dielectric materials A semiconductor manufacturing process wherein a low-k dielectric layer is plasma etched with selectivity to an overlying mask layer. The etchant gas can be oxygen-free and include a fluorocarbon reactant, a nitrogen reactant and an optional carrier gas, the fluoroca... | 12/25/2007 |
| 7309656 | Method for forming step channel of semiconductor device A method for forming a step channel of a semiconductor device is disclosed. The method for forming a step channel of a semiconductor device comprises forming a hard mask layer pattern defining a step channel region on a semiconductor substrate, forming a spacer on a... | 12/18/2007 |
| 7307025 | Lag control A method for etching features in a silicon oxide based dielectric layer over a substrate, comprising performing an etch cycle. A lag etch partially etching features in the silicon oxide based dielectric layer is performed, comprising providing a lag etchant gas, for... | 12/11/2007 |
| 7306955 | Method of performing a double-sided process A method of performing a double-sided process is provided. First, a wafer having a structural pattern disposed on the front surface is provided. Following that, a plurality of front scribe lines are defined on the structural pattern, and a filling layer is filled in... | 12/11/2007 |
| 7300878 | Gas switching during an etch process to modulate the characteristics of the etch Gas switching is used during an etch process to modulate the characteristics of the etch. The etch process comprises a sequence of at least three steps, wherein the sequence is repeated at least once. For example, the first step may result in a high etch rate of oxi... | 11/27/2007 |
| 7276450 | Etching processes using CFfor silicon dioxide and CFfor titanium nitride Methods of etching a dielectric layer and a cap layer over a conductor to expose the conductor are disclosed. In one embodiment, the methods include the use of a silicon dioxide (SiO2) etching chemistry including octafluorocyclobutane (C4F... | 10/02/2007 |
| 7276445 | Method for forming pattern using printing method A method for forming a pattern is provided that includes: providing a cliché having a plurality of convex patterns; applying an adhesive force reinforcing agent onto each surface of the convex patterns; forming an etching object layer on a substrate and then applyi... | 10/02/2007 |
| 7273566 | Gas compositions Processes, etchants, and apparatus useful for etching an insulating oxide layer of a substrate without damaging underlying nitride features or field oxide regions. The processes exhibit good selectivity to both nitrides and field oxides. Integrated circuits produced... | 09/25/2007 |
| 7255749 | Substrate cleaning method and substrate cleaning apparatus In a cleaning treatment of a substrate using an aqueous solution of ammonium fluoride or a mixture of an aqueous solution of ammonium fluoride and hydrofluoric acid as a cleaning liquid, the cleaning liquid is replenished by at least one liquid selected from the gro... | 08/14/2007 |
| 7256134 | Selective etching of carbon-doped low-k dielectrics The present invention includes a process for selectively etching a low-k dielectric material formed on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a fluorine-rich fluorocarbon or hydrofluorocarbon gas, a nitrogen-c... | 08/14/2007 |
| 7244644 | Undercut and residual spacer prevention for dual stressed layers Methods are disclosed for forming dual stressed layers in such a way that both undercutting and an undesirable residual spacer of the first-deposited stressed layer are prevented. In one embodiment, a method includes forming a first stressed silicon nitride layer ov... | 07/17/2007 |
| 7226871 | Method for forming a silicon oxynitride layer A method for forming a silicon oxynitride layer, suitable to be used in the production of semiconductor devices, e.g. poly-silicon thin film transistors, is provided. A plasma surface treatment is performed over a substrate after a silicon nitride/silicon oxide laye... | 06/05/2007 |
| 7214978 | Semiconductor fabrication that includes surface tension control In one embodiment, a method includes providing a semiconductor substrate that includes a memory container having a double-sided capacitor. The method also includes vapor phase etching a layer adjacent to the side wall of the memory container with a vapor having a su... | 05/08/2007 |
| 7189653 | Etching method and etching apparatus A mask material layer 102 of a desired pattern is formed on a silicon oxide film 101. The exposed parts of the silicon oxide film 101 is etched in accordance with the pattern of the mask material layer 102 by plasma etching by using a mix... | 03/13/2007 |
| 7186661 | Method to improve profile control and N/P loading in dual doped gate applications A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unpr... | 03/06/2007 |
