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| Number | Title | Issue Date |
| 8440576 | Method for pitch reduction in integrated circuit fabrication A method for patterning a material is provided. The method includes patterning a second material over a first material over a substrate. A surface portion of the patterned second material is converted to form a third material and a remaining patterned second materia... | 05/14/2013 |
| 8242025 | Method for producing semiconductor chip, and field effect transistor and method for manufacturing same According to a method of the present invention for manufacturing a semiconductor piece, at least two semiconductor layers (12) are first formed on a substrate (10) by stacking a sacrificial layer (11) and the semiconductor layer (12) on t... | 08/14/2012 |
| 8211809 | Method of producing semiconductor device It is intended to produce a semiconductor device with a stable gate length, using an end-point detection process based on monitoring a plasma emission intensity during dry etching for setting a gate length. A semiconductor device production method of the present inv... | 07/03/2012 |
| 8198197 | Plasma etching method The present invention is a plasma etching method for etching a surface of a substrate in which a metal nitride film and a silicon film have been respectively formed on a first base film and a second base film that had been side-by-side arranged, with surfaces of the... | 06/12/2012 |
| 8153532 | Bilayer dielectric interconnection process The present invention improves the yield of integrated circuit manufacture by making the circuit more tolerant of varying thicknesses of the InterLayer Dielectric prior to metallization and interconnection. The sensitivity to the thickness of the ILD is reduced by f... | 04/10/2012 |
| 8153531 | Semiconductor device and method of manufacturing the same Disclosed are a semiconductor device, which forms two insulation layers having different patterns by one mask process, and a method of manufacturing the same. In a semiconductor device having double insulation layers, a photosensitive material is included in an uppe... | 04/10/2012 |
| 8110507 | Method for patterning an active region in a semiconductor device using a space patterning process Disclosed here in is a method for patterning an active region in a semiconductor device using a space patterning process that includes forming a partition pattern having partition pattern elements arranged in a square shape on a semiconductor substrate; forming a sp... | 02/07/2012 |
| 8021986 | Method for producing a transistor with metallic source and drain A method for producing a transistor with metallic source and drain including the steps of: a) producing a gate stack, b) producing two portions of a material capable of being selectively etched relative to a second... | 09/20/2011 |
| 7977250 | Stripper solution and method of manufacturing liquid crystal display using the same A method for manufacturing a liquid crystal display includes simultaneously forming a gate electrode and a gate bus line on a transparent dielectric substrate, simultaneously forming a channel layer, an ohmic contact layer, and source/drain electrodes by forming a g... | 07/12/2011 |
| 7947609 | Method for etching low-k material using an oxide hard mask A method of patterning a film stack is described. The method comprises preparing a film stack on a substrate, wherein the film stack comprises a SiCOH-containing layer formed on the substrate, a silicon oxide (SiOx) layer formed on the SiCOH-containing la... | 05/24/2011 |
| 7943525 | Method of producing microelectromechanical device with isolated microstructures A microelectromechanical systems (MEMS) device (20) includes a polysilicon structural layer (46) having movable microstructures (28) formed therein and suspended above a substrate (22). Isolation trenches (56) extend through the la... | 05/17/2011 |
| 7935640 | Method for forming a damascene structure A method of forming a damascene structure comprises preparing a film stack on the substrate, wherein the film stack comprises a SiCOH-containing layer formed on the substrate, a silicon oxide (SiOx) layer formed on the SiCOH-containing layer, and a first ... | 05/03/2011 |
| 7910491 | Gapfill improvement with low etch rate dielectric liners A method of filling a trench is described and includes depositing a dielectric liner with a high ratio of silicon oxide to dielectric liner etch rate in fluorine-containing etch chemistries. Silicon oxide is deposited within the trench and etched to reopen or widen ... | 03/22/2011 |
| 7795154 | Method for manufacturing semiconductor device that uses laser ablation, to selectively remove one or more material layers To provide a manufacturing apparatus of a semiconductor device, which does not use a stepper in a manufacturing process in the case where mass production of semiconductor devices is carried out by using a large-sized substrate. A thin film formed over a substrate ha... | 09/14/2010 |
| 7745344 | Method for integrating NVM circuitry with logic circuitry A method for integrating Non-Volatile Memory (NVM) circuitry with logic circuitry is provided. The method includes depositing a first layer of gate material over the NVM area and the logic area of the substrate. The method further includes depositing multiple adjoin... | 06/29/2010 |
| 7737045 | Microfabricated micro fluid channels A fluid delivery system including a first substrate having a micro-channel and a well both formed through the first substrate. The fluid delivery system also includes a second substrate and a delivery channel. The second substrate is on the first substrate and the d... | 06/15/2010 |
| 7737044 | Solid state imaging device, manufacturing method of the same, and substrate for solid state imaging device A method of manufacturing a solid state imaging device having photoelectric conversion devices, the method including: 1) forming a plurality of color filters differing in color from each other, 2) forming a transparent resin layer on the color filters, 3) forming an... | 06/15/2010 |
| 7709397 | Method and system for etching a high-k dielectric material A method for etching a high-k dielectric layer on a substrate in a plasma processing system is described. The high-k dielectric layer can, for example, comprise HfO2. The method comprises elevating the temperature of the substrate above 200° C. (i.e., ty... | 05/04/2010 |
| 7704891 | Method of producing semiconductor device A method of producing a semiconductor device includes the steps of: preparing a base member; laminating sequentially a barrier film formed of titanium nitride, a wiring portion film formed of tungsten, and a mask film formed of titanium nitride on the base member to... | 04/27/2010 |
| 7696102 | Methods for fabrication of three-dimensional structures A multi-layer fabrication method for making three-dimensional structures is provided. In one embodiment, the formation of a multi-layer three-dimensional structure comprises: 1) fabricating a plurality of layers with each layer comprising at least two materials; 2) ... | 04/13/2010 |
| 7662724 | Method of manufacturing a ferroelectric capacitor with a hydrogen barrier layer A method for manufacturing a capacitor includes the steps of: forming a lower electrode above a base substrate; forming a dielectric film composed of ferroelectric material or piezoelectric material above the lower electrode; forming an upper electrode above the die... | 02/16/2010 |
| 7651951 | Pitch reduced patterns relative to photolithography features Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional p... | 01/26/2010 |
| 7648919 | Integrated circuit fabrication A method for defining patterns in an integrated circuit comprises defining a plurality of features in a first photoresist layer using photolithography over a first region of a substrate. The method further comprises using pitch multiplication to produce at least two... | 01/19/2010 |
| 7528076 | Method for manufacturing gate oxide layer with different thicknesses A method of manufacturing gate oxide layers with different thicknesses is disclosed. The method includes that a substrate is provided first. The substrate has a high voltage device region and a low voltage device region. Then, a high voltage gate oxide layer is form... | 05/05/2009 |
| 7510981 | Method for manufacturing semiconductor device A semiconductor device includes an element isolation film, which exhibits less variations in the height dimension from the surface of the substrate and has a desired height dimension from the surface of the substrate. A process for manufacturing a semiconductor devi... | 03/31/2009 |
| 7462567 | Method for manufacturing integrated circuit The flatness of the surface of the light-receiving portion must be increased when the upper structural layer of a light detector is etched. The present invention provides a method for manufacturing an integrated circuit in which an aperture is formed in a stack in w... | 12/09/2008 |
| 7442644 | Method for manufacturing nitride semiconductor wafer or nitride semiconductor device; nitride semiconductor wafer or nitride semiconductor device made by the same; and laser irradiating apparatus used for the same To remove the disparate substrate from nitride semiconductor layer grown over the disparate substrate, that is made of a material different from nitride semiconductor, by irradiating the disparate substrate with laser beam having a wavelength shorter than the band g... | 10/28/2008 |
| 7442319 | Poly etch without separate oxide decap The use of an ammonium hydroxide spike to a hot tetra methyl ammonium hydroxide (TMAH) solution to form an insitu poly oxide decapping step in a polysilicon (poly) etch process, results in a single step rapid poly etch process having uniform etch initiation and a hi... | 10/28/2008 |
| 7442606 | Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device includes providing a semiconductor substrate in which a floating gate pattern is formed. A dielectric layer, a conductive layer for a control gate, a tungsten silicide layer, a first silicon oxynitride layer, a hard m... | 10/28/2008 |
| 7439186 | Method for structuring a silicon layer A method for structuring a silicon layer applies lacquer mask onto the silicon layer, and the silicon layer is selectively etched relative to the lacquer mask using an etching gas mixture comprising SF6, HBr and He/O2. The openings etched into ... | 10/21/2008 |
| 7431967 | Limited thermal budget formation of PMD layers A method of filling a gap on a substrate includes providing flows of silicon-containing processing gas oxidizing processing gas, and phosphorous-containing processing gas to a chamber housing the substrate and depositing a first portion of a P-doped silicon oxide fi... | 10/07/2008 |
| 7432120 | Method for realizing a hosting structure of nanometric elements Method for manufacturing a hosting structure of nanometric elements comprising the steps of depositing on an upper surface of a substrate, of a first material, a block-seed having at least one side wall. Depositing on at least one portion of sad surface and on the b... | 10/07/2008 |
| 7429493 | Method for fabricating a magnetic head for perpendicular recording using a CMP lift-off and resistant layer A method using a CMP resistant hardmask in a process of fabricating a pole piece for a magnetic head is described. A set of layers used as the mask for milling the pole piece preferably includes a CMP resistant hardmask of silicon dioxide, a resist hardmask, an uppe... | 09/30/2008 |
| 7425512 | Method for etching a substrate and a device formed using the method The present invention provides a method for etching a substrate, a method for forming an integrated circuit, an integrated circuit formed using the method, and an integrated circuit. The method for etching a substrate includes, among other steps, providing a substra... | 09/16/2008 |
| 7425277 | Method for hard mask CD trim Broadly speaking, methods and an apparatus are provided for removing an inorganic material from a substrate. More specifically, the methods provide for removing the inorganic material from the substrate through exposure to a high density plasma generated using an in... | 09/16/2008 |
| 7419843 | Method of manufacturing semiconductor probe having resistive tip A method of manufacturing a semiconductor probe having a resistive tip. The method includes forming first and second mask films having a rectangular shape on a silicon substrate, first etching an upper surface of the silicon substrate, forming a third mask film corr... | 09/02/2008 |
| 7419917 | Ion implanted microscale and nanoscale device method A method is used for producing nanoscale and microscale devices in a variety of materials, such as silicon dioxide patterned buried films. The method is inexpensive and reliable for making small scale mechanical, optical, or electrical devices and relies upon the im... | 09/02/2008 |
| 7419915 | Laser assisted chemical etching method for release microscale and nanoscale devices A method using an etchant and a laser for localized precise heating enables precise etching and release of MEMS devices with improved process control while expanding the number of materials used to make MEMS, including silicon-dioxide patterned films buried in and s... | 09/02/2008 |
| 7413992 | Tungsten silicide etch process with reduced etch rate micro-loading The embodiments provides an improved tungsten silicide etching process with reduced etch rate micro-loading effect. In one embodiment, a method for etching a layer formed on a substrate is provided. The method includes providing a substrate into a plasma processing ... | 08/19/2008 |
| 7410906 | Functional device and method for producing the same, and image pickup device and method for producing the same A method of producing a functional device comprising an electrode layer provided as an upper layer of a layer containing an organic material, the layer being as a functional layer, wherein a step of patterning the electrode layer comprises a high speed etching step ... | 08/12/2008 |
