Bizarre Patents
Decorative Jeweled Wheel Cover
An improved wheel is provided wherein decorative items such as gem stones are embedded in either the wheel surface, a special mounting section attached to the wheel surface, or to a spoke strap that wraps around each spoke and positions embedded gem stones on the outside surface of the spoke.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8124543 | Method for manufacturing semiconductor laser diode A method for manufacturing an LD is disclosed. The LD has a striped structure including an optical active region. The striped structure is buried with resin, typically benzo-cyclo-butene (BCB). The method to form an opening in the BCB layer has tri-steps etching of ... | 02/28/2012 |
| 8088692 | Method for fabricating a multilayer microstructure with balancing residual stress capability A method for fabricating a multilayer microstructure with balancing residual stress capability includes forming a multilayer microstructure on a silicon substrate and conducting a step of isotropic plasma etching. The multilayer microstructure includes a first metal... | 01/03/2012 |
| 7989356 | Semiconductor device and method of forming enhanced UBM structure for improving solder joint reliability A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the first conductive layer. A second conductive layer is formed over first insulating layer and first conductive layer. A third insulating layer is f... | 08/02/2011 |
| 7741229 | Method for manufacturing magnetic recording medium A method for manufacturing a magnetic recording medium is provided, which can manufacture a magnetic recording medium that includes a recording layer having a concavo-convex pattern and has a sufficiently flat surface. The method includes the steps of: forming an ob... | 06/22/2010 |
| 7439184 | Method of making comb-teeth electrode pair A pair of comb-teeth electrodes are made from a material substrate including a first conduction layer, a second conduction layer and an intervening insulation layer. The paired electrodes includes first and second comb-teeth electrodes. The first comb-teeth electrod... | 10/21/2008 |
| 7432210 | Process to open carbon based hardmask A method of opening a carbon-based hardmask layer composed of amorphous carbon containing preferably at least 60% carbon and between 10 and 40% hydrogen. The hardmask is opened by plasma etching using an etching gas composed of H2, N2, and CO. ... | 10/07/2008 |
| 7429534 | Etching a nitride-based heterostructure An improved solution for producing nitride-based heterostructure(s), heterostructure device(s), integrated circuit(s) and/or Micro-Electro-Mechanical System(s) is provided. A nitride-based etch stop layer that includes Indium (In) is included in a heterostructure. A... | 09/30/2008 |
| 7419916 | Manufacturing method of semiconductor device The present invention provides a method for preventing the defect the in shape of via holes cased when an alumina mask is used for the dry etching of an interlayer insulator composed of an SiOC film in the dual damascene process in which via holes are formed prior t... | 09/02/2008 |
| 7390749 | Self-aligned pitch reduction A method for providing features in an etch layer with a memory region and a peripheral region is provided. A memory patterned mask is formed over a first sacrificial layer. A first set of sacrificial layer features is etched into the first sacrificial layer and a se... | 06/24/2008 |
| 7381655 | Mandrel/trim alignment in SIT processing Disclosed herein is an imaging method for patterning component shapes (e.g., fins, gate electrodes, etc.) into a substrate. By conducting a trim step prior to performing either an additive or subtractive sidewall image transfer process, the method avoids the formati... | 06/03/2008 |
| 7351303 | Microfluidic systems and components Microfluidic systems and components. A microfluidic system includes one or more functional units or microfluidic chips, configured to perform constituent steps in a process and interconnected to form the system. A multi-layer microfluidic system includes a separate ... | 04/01/2008 |
| 7341942 | Method for forming metal line of semiconductor device A method for forming a metal line of a semiconductor device forms an aluminum line having an excellent orientation. A specific resistance of a metal line is reduced, thereby enabling sufficient supply of a desired electric current. The method includes steps of formi... | 03/11/2008 |
| 7312158 | Method of forming pattern A method of forming a pattern, including forming first and second films, and a resist film on the second film, patterning the resist film to form a first pattern, etching the first pattern to narrow a width of the lines of the first pattern, etching the second film ... | 12/25/2007 |
| 7300879 | Methods of fabricating metal wiring in semiconductor devices Manufacturing costs may be reduced and yield may be improved when metal wiring in a semiconductor device is fabricated by a disclosed method including: sequentially forming an etch stop layer, an intermetal insulation layer, an anti-reflection coating layer, and a m... | 11/27/2007 |
| 7297627 | Multilayer substrate A multilayer substrate device formed from a base substrate and alternating metalization layers and dielectric layers. Each layer is formed without firing. Vias may extend through one of the dielectric layers such that two metalization layers surrounding the dielectr... | 11/20/2007 |
| 7294908 | Method of forming a gate pattern in a semiconductor device A gate pattern having a critical dimension after an etching process of 60-70nm may be formed using an ArF photoresist as an etching mask by a method including sequentially forming a gate oxide layer, a gate electrode layer, an anti-reflection coating layer, and an A... | 11/13/2007 |
| 7282447 | Method for an integrated circuit contact A process is provided for forming vertical contacts in the manufacture of integrated circuits and devices. The process eliminates the need for precise mask alignment and allows the etch of the contact hole to be controlled independent of the etch of the interconnect... | 10/16/2007 |
| 7282455 | Method of producing a diffraction grating In an embodiment, a method of producing a diffraction grating comprises steps of: forming, on a man surface of a first member, a first mask having a plurality of resist patterns arranged at a Bragg diffraction period; etching the first member by use of the first mas... | 10/16/2007 |
| 7265060 | Bi-level resist structure and fabrication method for contact holes on semiconductor substrates An improved method of etching very small contact holes through dielectric layers used to separate conducting layers in multilevel integrated circuits formed on semiconductor substrates has been developed. The method uses bi-level ARC coatings in the resist structure... | 09/04/2007 |
| 7261825 | Method for the production of a micromechanical device, particularly a micromechanical oscillating mirror device A method for producing a micromechanical device, e.g., a micromechanical oscillating mirror device, is provided. It is provided, starting from the front side of an SOI/EOI(epipoly on insulator) substrate, to penetrate to the desired depth of the silicon substrate la... | 08/28/2007 |
| 7262078 | Method of forming a wear-resistant dielectric layer A substrate is provided. The substrate includes a plurality of devices disposed in the substrate, a plurality of contact pads disposed on a surface of the substrate and electrically connected to the devices, and a surface dielectric layer positioned on the surface o... | 08/28/2007 |
| 7259063 | Method for forming a gate electrode in a non volatile memory device Disclosed herein is a method for forming a gate electrode of a non-volatile memory device. In an etch process of a gate electrode for defining the gate electrode, the etch process is performed by selectively adding an addition gas containing carbon. This prevents un... | 08/21/2007 |
| 7259106 | Method of making a microelectronic and/or optoelectronic circuitry sheet A circuitry sheet (322) comprising an electronic device layer stack (304) containing electronic devices, e.g., thin-film transistors, or portions thereof, formed by removing material from both sides of the device layer stack. The circuitry sheet may be... | 08/21/2007 |
| 7253113 | Methods for using a silylation technique to reduce cell pitch in semiconductor devices A method for forming a semiconductor device having a reduced pitch is provided. The method includes providing a substrate, forming a material layer over the substrate, forming a photoresist layer over the material layer, exposing a top surface of the photoresist lay... | 08/07/2007 |
| 7217619 | Method for fabricating memory components The top of the semiconductor body (1) has a sacrificial layer (4) made of nitride applied to it on a region, which is provided for the actuation circuit. A memory layer (6) provided for the memory cells is applied over the entire area and is rem... | 05/15/2007 |
| 7205668 | Multi-layer printed circuit board wiring layout A multi-layer printed circuit board (PCB) includes a first wire layer, a middle layer above the first wire layer, a second wire layer above the middle layer, and a slanting via formed in the middle layer and the second wire layer. The manufacturing method includes t... | 04/17/2007 |
| 7195927 | Process for making magnetic memory structures having different-sized memory cell layers An exemplary method for making a memory structure having different-sized memory cell layers comprises forming at least two layers of ferromagnetic materials, forming at least one mask layer above the ferromagnetic materials, patterning the at least one mask layer, e... | 03/27/2007 |
| 7196004 | Method and fabricating semiconductor device A method for fabricating a semiconductor device is capable of preventing a hard mask layer of a conductive structure from being damaged during a self-aligned contact etching process. The method includes the steps of: forming a plurality of conductive structures incl... | 03/27/2007 |
| 7172960 | Multi-layer film stack for extinction of substrate reflections during patterning A method including introducing a dielectric layer over a substrate between an interconnection line and the substrate, the dielectric layer comprising a plurality of alternating material layers; and patterning an interconnection to the substrate. An apparatus compris... | 02/06/2007 |
| 7153710 | Etching method, method of manufacturing semiconductor device, and semiconductor device In an etching method, an etching amount is controlled on the basis of the number of times an etching process is performed under the condition that an etching amount is determined independently of an etching time. Accordingly, the etching can be performed in step-by-... | 12/26/2006 |
| 7144801 | Bumping process to increase bump height A bumping process mainly comprises the steps of providing a wafer having a plurality of bonding pads, forming a patterned adhesive layer over the bonding pads, forming a barrier layer and a wetting layer on the patterned adhesive layer and the surface of the wafer, ... | 12/05/2006 |
| 7138341 | Process for making a memory structure An exemplary method for making a memory structure comprises forming a first hard mask layer, forming at least one mask layer above the first hard mask layer, patterning the at least one mask layer, etching the at least one mask layer to form an opening having a firs... | 11/21/2006 |
| 7139847 | Semiconductor memory device having externally controllable data input and output mode A semiconductor memory device having an externally controllable input and output mode is provided. The semiconductor memory device includes a first and second plurality of pads and an input and output mode set circuit electrically connected to the first plurality of... | 11/21/2006 |
| 7138340 | Method for fabricating semiconductor device without damaging hard mask during contact formation process Disclosed is a method for fabricating a semiconductor device without damaging a hard mask of a conductive structure. The method includes the steps of: forming a plurality of conductive structures on a substrate, each conductive structure including a conductive layer... | 11/21/2006 |
| 7135360 | Liquid crystal display device and method of fabricating the same A liquid crystal display device includes a plurality of gate lines and data lines on a first substrate defining a plurality of pixel regions, a thin film transistor within the pixel regions, a pixel electrode within the pixel regions, and at least one TiOx layer pro... | 11/14/2006 |
| 7125733 | Method for producing an optical emission module having at least two vertically emitting lasers A method for producing an emission module having at least two vertically emitting lasers in which an optically active laser layer is arranged on a substrate and at least one upper covering layer is arranged on said laser layer. In a first etching step, upper mesa re... | 10/24/2006 |
| 7125783 | Dielectric anti-reflective coating surface treatment to prevent defect generation in associated wet clean A method for preventing the formation of watermark defects includes the steps of forming a pad oxide, a silicon nitride layer and a silicon oxynitride layer over a semiconductor substrate. A photoresist mask is formed over the resulting structure, with the silicon o... | 10/24/2006 |
| 7126164 | Wafer-level moat structures A wafer-level CSP (200) includes at least one die (202) from a wafer. The wafer-level CSP has a plurality of solder ball pads (206), a solder ball (308) at each solder ball pad and a polymer collar (310) around each solder ball. A ... | 10/24/2006 |
| 7122482 | Methods for fabricating patterned features utilizing imprint lithography One embodiment of the present invention is a method for generating patterned features on a substrate that includes: (a) forming a first layer on at least a portion of a surface of the substrate, the first layer comprising at least one layer of a first material, whic... | 10/17/2006 |
| 7118833 | Forming partial-depth features in polymer film A photomask (1900) for producing partial-depth features (712 and 912) in a photo-imageable polymer layer (412) on a wafer of a chip scale package (200) using exposure tools capable of resolving sizes of a critical dimension or larg... | 10/10/2006 |
