"I hate what they've done to my child...I would never let my own children watch it. "
Vladimir Zworykin, television pioneer ; Talking about an invention in which he played a critical role.
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| Number | Title | Issue Date |
| 8124541 | Etchant gas and a method for removing material from a late transition metal structure An etchant gas and a method for removing at least a portion of a late transition metal structure. The etchant gas includes PF3 and at least one oxidizing agent, such as at least one of oxygen, ozone, nitrous oxide, nitric oxide and hydrogen peroxide. The ... | 02/28/2012 |
| 8101526 | Method of making diamond nanopillars A method for fabricating diamond nanopillars includes forming a diamond film on a substrate, depositing a metal mask layer on the diamond film, and etching the diamond film coated with the metal mask layer to form diamond nanopillars below the mask layer. The method... | 01/24/2012 |
| 7781348 | Method of forming an organic light-emitting display with black matrix A method of forming an organic light-emitting display (OLED) includes the steps of providing a substrate, forming a black matrix on the substrate, forming a buffer layer on the black matrix, forming an active layer on the buffer layer, simultaneously patterning the ... | 08/24/2010 |
| 7767585 | Method of cleaning and process for producing semiconductor device A method of cleaning for removing metal compounds attached to a surface of a substrate, wherein the cleaning is conducted by supplying a supercritical fluid of carbon dioxide comprising at least one of triallylamine and tris(3-aminopropyl)amine to the surface of the... | 08/03/2010 |
| 7754616 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device includes: forming a mask layer on a layer that is to be subjected to etching and contains at least one of silicon carbonate, silicon oxide, sapphire, gallium nitride, aluminum gallium nitride, indium gallium nitride, ... | 07/13/2010 |
| 7745341 | Phase-change semiconductor device and methods of manufacturing the same In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer... | 06/29/2010 |
| 7745342 | Display substrate and method of manufacturing the same A display substrate having a low-resistance metallic layer and a method of manufacturing the display substrate. The gate conductors are extended in a first direction. The source conductors are extended in a second direction crossing the first direction including a l... | 06/29/2010 |
| 7704890 | Method for fabricating thin film transistor and pixel structure A method for fabricating a TFT is provided. First, a poly-silicon layer is formed over a substrate. A photoresist layer is formed on the poly-silicon layer, wherein the photoresist layer has a pattern for exposing parts of the poly-silicon layer, and the pattern has... | 04/27/2010 |
| 7696100 | Method for manufacturing semiconductor device A manufacturing method of a semiconductor device of which cost can be suppressed by using a nanoimprinting method is provided. In the invention, a gate insulating film, a conductive film, and a resist are formed in sequence over a semiconductor film and a resist is ... | 04/13/2010 |
| 7659210 | Nano-crystal etch process A method for selectively removing nano-crystals on an insulating layer. The method includes providing an insulating layer with nano-crystals thereon; exposing the nano-crystals to a high density plasma comprising a source of free radical chlorine, ionic chlorine, or... | 02/09/2010 |
| 7629261 | Patterning metal layers A process for fabricating an electronic device comprising the step of patterning a metallic electrode to the electronic device by laser ablation followed by electroless plating, wherein the process of fabricating the electronic device comprises at least one other la... | 12/08/2009 |
| 7625825 | Method of patterning mechanical layer for MEMS structures A method of making a microelectromechanical system (MEMS) device is disclosed. The method includes forming a stationary layer over a substrate. A sacrificial layer is formed over the stationary layer. The sacrificial layer is formed of a first material. A mechanical... | 12/01/2009 |
| 7615495 | Display device and manufacturing method of the same A plurality of wires and electrodes are formed by forming a first conductive film, selectively forming a resist over the first conductive film, forming a second conductive film over the first conductive film and the resist, removing the second conductive film formed... | 11/10/2009 |
| 7538041 | Magnetic recording medium, method of manufacturing the same, and intermediate for magnetic recording medium A magnetic recording medium is provided in which a magnetic recording layer 5 is provided in a predetermined concavo-convex pattern on a substrate 1A, a concave portion in a concavo-convex pattern is filled with a non-magnetic material, and a non-magne... | 05/26/2009 |
| 7442651 | Plasma etching method An etching technique capable of applying etching at high selectivity to a transition metal element-containing electrode material layer which is formed on or above a dielectric material layer made of a high-dielectric-constant or “high-k” insulator is provided. T... | 10/28/2008 |
| 7442647 | Structure and method for formation of cladded interconnects for MRAMs A structure and method for fabricating a top strap in a magnetic random access memory, MRAM, comprising a damascene process forming a trench in a dielectric layer and resulting in a metal conductor clad on three sides by an inverted U-shape trench liner and cap made... | 10/28/2008 |
| 7439188 | Reactor with heated and textured electrodes and surfaces A reactor for processing semiconductor wafers with electrodes and other surfaces that can be one of heated, textured and/or pre-coated in order to facilitate adherence of materials deposited thereon, and eliminate the disadvantages resulting from the spaulding, flak... | 10/21/2008 |
| 7439087 | Semiconductor device and manufacturing method thereof A technology for reducing distance between adjacent pixel electrodes to smaller than the limit set by conventional process margin and also preventing adjacent pixel electrodes from being short circuited is provided. In a manufacturing method of a semiconducto... | 10/21/2008 |
| 7435681 | Methods of etching stacks having metal layers and hard mask layers Methods which comprise: providing a stack to be etched, the stack comprising a metal interconnect layer disposed above a substrate, a barrier layer disposed above the metal interconnect layer, a hard mask layer disposed on the barrier layer, and a patterning layer d... | 10/14/2008 |
| 7429535 | Use of a plasma source to form a layer during the formation of a semiconductor device A method used to form a semiconductor device having a capacitor comprises placing a semiconductor wafer assembly into a chamber of a plasma source, the wafer assembly comprising a layer of insulation having at least one contact therein and a surface, and further com... | 09/30/2008 |
| 7422984 | Method of manufacturing a semiconductor device A semiconductor device is provided which is constituted by semiconductor devices including a thin film transistor with a GOLD structure, the GOLD structure thin film transistor being such that: a semiconductor layer, a gate insulating film, and a gate electrode are ... | 09/09/2008 |
| 7422983 | Ta-TaN selective removal process for integrated device fabrication Disclosed are a method and a system for processing a semiconductor structure of the type including a substrate, a dielectric layer, and a TaN—Ta liner on the dielectric layer. The method comprises the step of using XeF2 to remove at least a portion of the TaN—Ta... | 09/09/2008 |
| 7413993 | Process for removing a residue from a metal structure on a semiconductor substrate The invention is concerned with a process for removing residue comprising a polymeric resist and metal oxide from a metal structure on a semiconductor substrate, the process comprising the steps of: (a) heating up the substrate with the metal structure in the presen... | 08/19/2008 |
| 7402522 | Hard mask structure for deep trenched super-junction device A hard mask structure is disclosed. The hard mask structure is used for manufacturing a deep trench of a super-junction device having a substrate and an epitaxial layer formed on the substrate. The hard mask structure comprises an ion barrier layer formed on the epi... | 07/22/2008 |
| 7393788 | Method and system for selectively etching a dielectric material relative to silicon A method and system for selectively and uniformly etching a dielectric layer with respect to silicon and polysilicon in a dry plasma etching system are described. The etch chemistry comprises the use of fluorohydrocarbons, such as CH2F2 and CHF... | 07/01/2008 |
| 7390752 | Self-aligning patterning method The present invention relates to a self-aligning patterning method which can be used to manufacture a plurality of multi-layer thin film transistors on a substrate. The method comprises firstly forming a patterned mask 20 on the surface of a sacrificia... | 06/24/2008 |
| 7384873 | Manufacturing process of semiconductor device A method of manufacturing a semiconductor device, includes: forming a resin layer with a resin containing an aromatic compound on a surface, where an electrode is formed, of a semiconductor substrate, by avoiding at least part of the electrode; removing an oxide fil... | 06/10/2008 |
| 7378352 | Method of fabricating semiconductor device After low dielectric constant films are formed on a wiring, hardmasks are formed on the low dielectric constant films. A resistmask is formed on the hardmasks. Via holes are formed in the low dielectric constant films using the resistmask. Ashing the resistmask is p... | 05/27/2008 |
| 7375036 | Anisotropic etch method A method to anisotropically etch an oxide/silicide/poly sandwich structure on a silicon wafer substrate in situ, is disclosed, using a single parallel plate plasma reactor chamber and a single inert cathode, with a variable gap between cathode and anode. This method... | 05/20/2008 |
| 7371692 | Method for manufacturing a semiconductor device having a W/WN/polysilicon layered film A method for manufacturing a semiconductor device includes the steps of consecutively depositing a Poly-Si layer, a WN layer and a W layer on a SiO2 layer, forming a mask pattern on the W layer, selectively etching the W layer by using plasma in a first e... | 05/13/2008 |
| 7372153 | Integrated circuit package bond pad having plurality of conductive members An integrated circuit package bond pad includes an insulating layer and an electrode located over the insulating layer. The electrode has a first surface configured to be bonded to external circuitry and a second surface opposite the first surface. A plurality of co... | 05/13/2008 |
| 7368392 | Method of fabricating a gate structure of a field effect transistor having a metal-containing gate electrode A method of etching metals and/or metal-containing compounds using a plasma comprising a bromine-containing gas. In one embodiment, the method is used during fabrication of a gate structure of a field effect transistor having a titanium nitride gate electrode, an ul... | 05/06/2008 |
| 7364665 | Selective etching processes of SiO, Ti and InOthin films for FeRAM device applications A method of selectively etching a three-layer structure consisting of SiO2, In2O3, and titanium, includes etching the SiO2, stopping at the titanium layer, using C3F8 in a range of between about 10 sc... | 04/29/2008 |
| 7361606 | Method of forming a metal line and method of manufacturing display substrate having the same A method of forming a metal line is provided. A first metal layer and a second metal layer protecting the first metal layer are formed on a base substrate. The first metal layer includes aluminum or aluminum alloy. A photoresist pattern having a linear shape is form... | 04/22/2008 |
| 7361601 | Chemical mechanical polish process and method for improving accuracy of determining polish endpoint thereof A method for improving accuracy of determining polish endpoint of chemical mechanical polish (CMP) process is provided. The method is performed before the CMP process. First, a test wafer with a to-be-polished layer and a material layer under the to-be-polished laye... | 04/22/2008 |
| 7361543 | Method of forming a nanocluster charge storage device An integrated circuit and method of forming an integrated circuit having a memory portion minimizes an amount of oxidation of nanocluster storage elements in the memory portion. A first region of the integrated circuit has non-memory devices, each having a control e... | 04/22/2008 |
| 7358192 | Method and apparatus for in-situ film stack processing Embodiments of a cluster tool, processing chamber and method for processing a film stack are provided. In one embodiment, a method for in-situ etching of silicon and metal layers of a film stack is provided that includes the steps of etching an upper metal layer of ... | 04/15/2008 |
| 7354853 | Selective dry etching of tantalum and tantalum nitride The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers (30) are often used in semiconductor manufacturing. The semiconductor substrate is exposed to a reducing plasma chemistry which pass... | 04/08/2008 |
| 7354865 | Method for removal of pattern resist over patterned metal having an underlying spacer layer A method of removing the pattern resist that remains on a microchip wafer after etching a patterned layer that is supported by a spacer layer. After the etch, the wafer is cleaned with a develop clean process that removes polymer residues from the pattern resist sur... | 04/08/2008 |
| 7351661 | Semiconductor device having trench isolation layer and a method of forming the same A semiconductor device having a trench isolation layer in a semiconductor substrate is provided, wherein the trench isolation layer includes a silicon nitride liner, a silicon oxide liner; and a buried layer, wherein the buried layer includes a first buried layer fo... | 04/01/2008 |