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| Number | Title | Issue Date |
| 8187980 | Etching method, etching apparatus and storage medium An etching method for forming a groove by etching a silicon layer of a substrate by using a mask which has a first region where an opening with a first opening width is formed and a second region where an opening with a second opening width larger than the first ope... | 05/29/2012 |
| 8178444 | Substrate processing method and substrate processing apparatus A substrate processing method that can eliminate unevenness in the distribution of plasma. The method is for a substrate processing apparatus that has a processing chamber in which a substrate is housed, a mounting stage that is disposed in the processing chamber an... | 05/15/2012 |
| 7951722 | Double exposure semiconductor process for improved process margin A double exposure semiconductor process is provided for improved process margin at reduced feature sizes. During a first processing sequence, features defining non-critical dimensions of a polysilicon interconnect structure are formed, while other portions of the po... | 05/31/2011 |
| 7928014 | Method for manufacturing a semiconductor device including a silicon film A method for manufacturing a semiconductor device includes: mounting a wafer having an exposed silicon nitride film, on an electrode received in a plasma chamber; dry-cleaning the chamber to remove reaction products accumulated on the wall and ceiling of the chamber... | 04/19/2011 |
| 7811941 | Device and method for etching a substrate using an inductively coupled plasma A method and a device suitable for implementing this method for etching a substrate (10), a silicon body in particular, using an inductively coupled plasma (14) are proposed. For this purpose, a radio-frequency electromagnetic alternating field is gene... | 10/12/2010 |
| 7682985 | Dual doped polysilicon and silicon germanium etch A method for etching a stack with at least one silicon germanium layer over a substrate in a processing chamber is provided. A silicon germanium etch is provided. An etchant gas is provided into the processing chamber, wherein the etchant gas comprises HBr, an inert... | 03/23/2010 |
| 7666796 | Substrate patterning for multi-gate transistors Some embodiments of the present invention include apparatuses and methods relating to improved substrate patterning for multi-gate transistors. ... | 02/23/2010 |
| 7662722 | Air gap under on-chip passive device A method is provided for fabricating a microelectronic chip which includes a passive device such, as an inductor, overlying an air gap. In such method, a plurality of front-end-of-line (“FEOL”) devices are formed in a semiconductor region of the microelectronic ... | 02/16/2010 |
| 7645706 | Electronic substrate manufacturing method An electronic substrate manufacturing method includes: forming a wiring pattern on a substrate; providing a mask with an opening for the substrate on which the wiring pattern has been formed; performing a specified treatment in a part area of the wiring pattern thro... | 01/12/2010 |
| 7622394 | Method of fabricating semiconductor device including forming a protective layer and removing after etching a trench The method of fabricating a semiconductor device includes subjecting a semiconductor substrate to trench etching by alternately repeating an etching step and a deposition step. The etching step creates a trench structure by dry-etching the exposed surface of the sem... | 11/24/2009 |
| 7605090 | Process for producing sublithographic structures A layer structure and process for providing sublithographic structures are provided. A first auxiliary layer is formed over a surface of a carrier layer. A lithographically patterned second auxiliary layer structure is formed on a surface of the first auxiliary laye... | 10/20/2009 |
| 7592263 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device. In this method, a concave portion is formed in one surface in the thickness direction of a primary base plate comprising a semiconductor substrate with a relatively large thickness dimension. Then, through-holes are ... | 09/22/2009 |
| 7531461 | Process and system for etching doped silicon using SF-based chemistry A process and system for anisoptropically dry etching through a doped silicon layer is described. The process chemistry comprises SF6 and a fluorocarbon gas. For example, the fluorocarbon gas can include CxFy, where x and y are integ... | 05/12/2009 |
| 7439186 | Method for structuring a silicon layer A method for structuring a silicon layer applies lacquer mask onto the silicon layer, and the silicon layer is selectively etched relative to the lacquer mask using an etching gas mixture comprising SF6, HBr and He/O2. The openings etched into ... | 10/21/2008 |
| 7435354 | Treatment method for surface of photoresist layer and method for forming patterned photoresist layer A treatment method for a surface of a photoresist layer is provided. After forming a patterned photoresist layer over a wafer, a surface treatment step is performed to the photoresist layer by using at least one reaction gas comprising hydrogen bromide or hydrogen i... | 10/14/2008 |
| 7413992 | Tungsten silicide etch process with reduced etch rate micro-loading The embodiments provides an improved tungsten silicide etching process with reduced etch rate micro-loading effect. In one embodiment, a method for etching a layer formed on a substrate is provided. The method includes providing a substrate into a plasma processing ... | 08/19/2008 |
| 7410818 | Thin film transistor, liquid crystal display using thin film transistor, and method of manufacturing thin film transistor A semiconductor film, which is located over a gate electrode for forming a channel region between a source electrode and a drain electrode, has a width greater than a width of the source electrode and a width of the drain electrode located over the gate electrode. I... | 08/12/2008 |
| 7405162 | Etching method and computer-readable storage medium An etching method forms an opening with a substantially vertical profile extending to a stopper layer by performing an etching with a plasma of an etching gas acting on an object to be processed loaded in an evacuable processing vessel, wherein the object has a mask... | 07/29/2008 |
| 7399710 | Method of controlling the pressure in a process chamber The present invention consists in a method of plasma treatment of a semiconductor substrate in a process chamber connected to a vacuum line via a valve, said treatment including a plurality of cycles comprising at least one etching step during which an etching gas i... | 07/15/2008 |
| 7396771 | Plasma etching apparatus and plasma etching method A plasma etching apparatus includes a processing chamber in which a specimen is subjected to plasma processing, a specimen holder for holding the specimen, the specimen holder including a temperature controller for controlling temperatures at at least 2 positions of... | 07/08/2008 |
| 7390750 | Method of patterning elements within a semiconductor topography A method is provided which includes forming a hardmask feature adjacent to a patterned sacrificial structure of a semiconductor topography, selectively removing the patterned sacrificial structure to expose a lower layer and etching exposed portions of the lower lay... | 06/24/2008 |
| 7390752 | Self-aligning patterning method The present invention relates to a self-aligning patterning method which can be used to manufacture a plurality of multi-layer thin film transistors on a substrate. The method comprises firstly forming a patterned mask 20 on the surface of a sacrificia... | 06/24/2008 |
| 7390745 | Pattern enhancement by crystallographic etching A method for producing predetermined shapes in a crystalline Si-containing material that have substantially uniform straight sides or edges and well-defined inside and outside corners is provided together with the structure that is formed utilizing the method of the... | 06/24/2008 |
| 7387966 | Manufacturing method for a semiconductor device A manufacturing method for a semiconductor device, includes: preparing a semiconductor wafer having an active surface and a rear surface; forming a plurality of semiconductor regions, each of which having semiconductor elements formed on the active surface of the se... | 06/17/2008 |
| 7371629 | N/PMOS saturation current, HCE, and Vt stability by contact etch stop film modifications A method is provided for improving Idsat in NMOS and PMOS transistors. A silicon nitride etch stop layer is deposited by a PECVD technique on STI and silicide regions and on sidewall spacers during a MOSFET manufacturing scheme. A dielectric layer is formed on the n... | 05/13/2008 |
| 7358194 | Sequential deposition process for forming Si-containing films A method is provided for forming a Si film in sequential deposition process. The method includes providing a substrate in a process chamber, forming a chlorinated Si film by exposing the substrate to a chlorinated silane gas, and dry etching the chlorinated Si film ... | 04/15/2008 |
| 7354834 | Semiconductor devices and methods to form trenches in semiconductor devices Semiconductor devices and methods of fabricating the same are disclosed. One example method may include forming sequentially a pad oxide film and a silicon nitride film on an entire surface of a semiconductor substrate, forming the trench by etching the silicon nitr... | 04/08/2008 |
| 7344652 | Plasma etching method An etching method for forming a recess (220) having an opening dimension (R) of millimeter order in an object (212) to be etched such as a semiconductor wafer. A mask (214) having an opening corresponding to the recess (220) is formed on ... | 03/18/2008 |
| 7341952 | Multi-layer hard mask structure for etching deep trench in substrate A method for etching a deep trench in a substrate. A multi-layer hard mask structure is formed overlying the substrate, which includes a first hard mask layer and at least one second hard mask layer disposed thereon. The first hard mask layer is composed of a first ... | 03/11/2008 |
| 7341943 | Post etch copper cleaning using dry plasma A method for post-etch copper cleaning uses a hydrogen plasma with a trace gas additive constituting about 3-10 percent of the plasma by volume to clean a copper surface exposed by etching. The trace gas may be atomic nitrogen or other species having an atomic mass ... | 03/11/2008 |
| 7337670 | Physical quantity sensor having multiple through holes A semiconductor physical quantity sensor includes: a substrate; a semiconductor layer supported on the substrate; a trench disposed in the semiconductor layer; and a movable portion disposed in the semiconductor layer and separated from the substrate by the trench. ... | 03/04/2008 |
| 7338906 | Method for fabricating semiconductor device The present invention relates to a method for fabricating a semiconductor device with a fine pattern even without decreasing a line width of a photoresist pattern. The method includes the steps of: forming a target etching layer on a substrate; forming a plurality o... | 03/04/2008 |
| 7338610 | Etching method for manufacturing semiconductor device A wafer having a dielectric layer and an electrode partially protruding from the top surface of the dielectric layer is provided. The dielectric layer is etched with a chemical solution such as LAL. Prior to etching, the protruding portion of the electrode is remove... | 03/04/2008 |
| 7332783 | Semiconductor device with a photoelectric converting portion and a light-shading means The semiconductor device according to this invention is characterized by a package structure of a semiconductor substrate 100 equipped with a photoelectric converting portion, wherein a light-shading means 104 is arranged in an area corresponding to at... | 02/19/2008 |
| 7329610 | Method of high selectivity SAC etching A method for SAC etching is provided involving a) etching a Si wafer having a nitride present thereon with a first etching gas containing a first perfluorocarbon and carbon monoxide, and b) etching the resultant Si wafer having an initially etched nitride photoresis... | 02/12/2008 |
| 7326523 | Low refractive index polymers as underlayers for silicon-containing photoresists A new underlayer composition that exhibits high etch resistance and improved optical properties is disclosed. The underlayer composition comprises a vinyl or acrylate polymer, such as a methacrylate polymer, the polymer comprising at least one substituted or unsubst... | 02/05/2008 |
| 7323115 | Substrate processing method and ink jet recording head substrate manufacturing method A substrate (wafer) processing method for producing an ink jet recording head substrate in which the reverse surface thereof, that is, the surface having the larger of the two openings of the ink supply hole, is precisely covered by a protective film to the very edg... | 01/29/2008 |
| RE40028 | Liquid crystal display device and method of manufacturing the same The present invention discloses a method of manufacturing a liquid crystal display device including a first photolithography process forming a gate electrode on a substrate; a second photolithography process including: a) depositing sequentially a gate insulating la... | 01/22/2008 |
| RE40007 | In-situ strip process for polysilicon etching in deep sub-micron technology A new method of patterning the polysilicon layer in the manufacture of an integrated circuit device has been achieved. A polysilicon layer is provided overlying a semiconductor substrate. The polysilicon layer may overlie a gate oxide layer and thereby comprise the ... | 01/22/2008 |
| 7319074 | Method of defining polysilicon patterns The present invention provides a method of defining polysilicon patterns. The method forms a polysilicon layer on a substrate, and a patterned mask on the polysilicon layer. Then, a first etching process is performed to remove a portion of the polysilicon layer not ... | 01/15/2008 |
