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| Number | Title | Issue Date |
| 8093155 | Method of controlling striations and CD loss in contact oxide etch A method for controlling striations and CD loss in a plasma etching method is disclosed. During the etching process, the substrate of semiconductor material to be etched is exposed first to plasma under a low power strike and subsequently to a conventional high powe... | 01/10/2012 |
| 8039402 | Methods for forming a gate and a shallow trench isolation region and for planarizating an etched surface of silicon substrate There is provide a method for forming a gate, which can improve the etching uniformity of the sidewalls of the gate, including the following steps: forming a dielectric layer on a semiconductor substrate; forming a polysilicon layer on the dielectric layer; etching ... | 10/18/2011 |
| 8030216 | Method of making semiconductor device A plasma processing method, which enables the etching controllability for a high-dielectric-constant insulating film to be improved. A substrate having a high-dielectric-constant gate insulating film and a hard mask formed thereon is subjected to etching processing ... | 10/04/2011 |
| 8008208 | Method of cleaning and forming a negatively charged passivation layer over a doped region The present invention generally provides a method of forming a high efficiency solar cell device by preparing a surface and/or forming at least a part of a high quality passivation layer on a silicon containing substrate. Embodiments of the present invention may be ... | 08/30/2011 |
| 7972968 | High density plasma gapfill deposition-etch-deposition process etchant A high density plasma dep/etch/dep method of depositing a dielectric film into a gap between adjacent raised structures on a substrate disposed in a substrate processing chamber. The method deposits a first portion of the dielectric film within the gap by forming a ... | 07/05/2011 |
| 7943522 | Manufacturing method of semiconductor device A manufacturing method of a semiconductor device using a semiconductor manufacturing unit comprising a reaction chamber, a substrate mounting stage, and a high frequency power supply coupled to the substrate mounting stage, a blocking capacitor interposed between th... | 05/17/2011 |
| 7820553 | Prevention of trench photoresist scum Methods of preventing photoresist scum formation for etch processes for patterning material layers of semiconductor device material layers are disclosed. A treatment of N2 and O2 is used to prevent the formation of photoresist scum. The treatme... | 10/26/2010 |
| 7670958 | Etching methods An etching method includes applying a photoresist over a substrate, forming an opening in the photoresist, and etching the substrate under the opening using a plasma generated with a gas composition containing argon and an amount of higher atomic mass inert gas. The... | 03/02/2010 |
| 7585778 | Method of etching an organic low-k dielectric material A method of etching organic low-k dielectric materials is provided herein. In one embodiment, a method of etching organic low-k dielectric materials includes placing a substrate comprising an exposed organic low-k dielectric material in an etch reactor; supplying a ... | 09/08/2009 |
| 7524769 | Method and system for removing an oxide from a substrate A method and system for processing a substrate includes providing the substrate in a process chamber, where the substrate contains an oxide layer formed thereon, exciting a hydrogen-containing gas in a remote plasma source coupled to the process chamber, and exposin... | 04/28/2009 |
| 7476623 | Method for microstructuring flat glass substrates In the method for microstructuring flat glass substrates a substrate surface of a glass substrate is coated with at least one structured mask layer and subsequently exposed to a chemically reactive ion etching process (RIE) with at least one chemical etching gas. In... | 01/13/2009 |
| 7429534 | Etching a nitride-based heterostructure An improved solution for producing nitride-based heterostructure(s), heterostructure device(s), integrated circuit(s) and/or Micro-Electro-Mechanical System(s) is provided. A nitride-based etch stop layer that includes Indium (In) is included in a heterostructure. A... | 09/30/2008 |
| 7416973 | Method of increasing the etch selectivity in a contact structure of semiconductor devices By providing an additional silicon dioxide based etch stop layer, a corresponding etch process for forming contact openings for directly connecting polysilicon lines and active areas may be controlled in a highly reliable manner. In another aspect, the etch selectiv... | 08/26/2008 |
| 7390755 | Methods for post etch cleans The current invention provides methods for performing a cleaning process that provides greater cleaning efficiency with less damage to device structures. After etching and photoresist stripping, a first plasma clean is performed. The first plasma clean may comprise ... | 06/24/2008 |
| 7384876 | Method and apparatus for determining consumable lifetime A plasma processing device comprising a gas injection system is described, wherein the gas injection system comprises a gas injection assembly body, a consumable gas inject plate coupled to the gas injection assembly body, and a pressure sensor coupled to a gas inje... | 06/10/2008 |
| 7365017 | Method for finishing metal line for semiconductor device A method for finishing a metal line for a semiconductor device is disclosed, in which polymer generated when forming the metal line including aluminum and its alloy is effectively removed and the metal line is prevented from being eroded. A chlorine radical and a ch... | 04/29/2008 |
| 7352064 | Multiple layer resist scheme implementing etch recipe particular to each layer Methods of forming a metal line and/or via critical dimension (CD) in a single or dual damascene process on a semiconductor substrate, and the resist scheme implemented, are disclosed. The method includes forming a multiple layer resist scheme including a first plan... | 04/01/2008 |
| 7341922 | Dry etching method, fabrication method for semiconductor device, and dry etching apparatus When etching is performed with respect to a silicon-containing material by using a dry etching apparatus having a dual power source, the application of bias power is initiated before oxidization proceeds at a surface of the silicon-containing material. Specifically,... | 03/11/2008 |
| 7314526 | Reaction chamber for an epitaxial reactor Reaction chamer (10) for an epitaxial reactor comprising a belljar (14) made of insulating, transparent and chemically resistant material, a susceptor (24) provided with disk-shaped cavities (34a-n) for receiving wafers (... | 01/01/2008 |
| 7312156 | Method and apparatus for supporting a semiconductor wafer during processing A semiconductor wafer is processed while being supported without mechanical contact. Instead, the wafer is supported by gas streams emanating from a large number of passages in side sections positioned very close to the upper and lower surface of the wafer. The gas ... | 12/25/2007 |
| 7307025 | Lag control A method for etching features in a silicon oxide based dielectric layer over a substrate, comprising performing an etch cycle. A lag etch partially etching features in the silicon oxide based dielectric layer is performed, comprising providing a lag etchant gas, for... | 12/11/2007 |
| 7303995 | Method for reducing dimensions between patterns on a photoresist A semiconductor manufacturing method that includes providing a substrate, providing a layer of material over the substrate, providing a layer of photoresist over the material layer, patterning and defining the photoresist layer, depositing a layer of polymer over th... | 12/04/2007 |
| 7291286 | Methods for removing black silicon and black silicon carbide from surfaces of silicon and silicon carbide electrodes for plasma processing apparatuses Methods for removing black silicon or black silicon carbide from a plasma-exposed surface of an upper electrode of a plasma processing chamber are provided. The methods include forming a plasma using a gas composition containing a fluorine-containing gas, and removi... | 11/06/2007 |
| 7288284 | Post-cleaning chamber seasoning method A method for seasoning a process chamber is disclosed. The seasoning method includes providing a seasoning film on the interior surfaces of a process chamber, typically after cleaning of the chamber. ... | 10/30/2007 |
| 7288484 | Photoresist strip method for low-k dielectrics The present invention pertains to methods for removing unwanted material from a semiconductor wafer during wafer manufacturing. More specifically, the invention pertains to stripping photo-resist material and removing etch-related residues from a semiconductor wafer... | 10/30/2007 |
| 7288485 | Device and method for anisotropic plasma etching of a substrate, particularly a silicon element A method and a device suitable for its execution are provided for the anisotropic plasma etching of a substrate, especially a silicon element. The device has a chamber and a plasma source for generating a high-frequency electromagnetic alternating field and a reacti... | 10/30/2007 |
| RE39895 | Semiconductor integrated circuit arrangement fabrication method To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited t... | 10/23/2007 |
| 7279427 | Damage-free ashing process and system for post low-k etch A process is provided for substrate ashing following the etching of features in a low dielectric constant (low-k) layer. The low-k layer can include ultra-low-k material, or a porous low-k material. The process may be configured to remove etch byproducts while prese... | 10/09/2007 |
| 7268080 | Method for printing contacts on a substrate A method for printing contacts utilizes photolithographic pattern reversal. A negative of the contact is printed on a resist layer. Unexposed portions of the resist layer are stripped to expose a first layer. The first layer is etched to remove exposed portions of t... | 09/11/2007 |
| 7250373 | Method and apparatus for etching material layers with high uniformity of a lateral etch rate across a substrate A method and apparatus for etching material layers with high uniformity of a lateral etch rate across a substrate using a gas mixture that includes a passivation gas. The passivation gas is provided to a peripheral region of the substrate to passivate sidewalls of t... | 07/31/2007 |
| 7229915 | Method for manufacturing semiconductor device A first insulating film, a second insulating film, a third insulating film, an antireflective film, and a resist film are formed in this order on a lower-layer wiring. After dry etching the third insulating film and the second insulating film, using the resist film ... | 06/12/2007 |
| 7226869 | Methods for protecting silicon or silicon carbide electrode surfaces from morphological modification during plasma etch processing Methods for forming a protective polymeric coating on a silicon or silicon-carbide electrode of a plasma processing chamber are provided. The polymeric coating provides protection to the underlying surface of the electrode with respect to exposure to constituents of... | 06/05/2007 |
| 7224027 | High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching and diffusion from regions of oppositely doped polysilicon A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first or second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an e... | 05/29/2007 |
| 7220678 | Method for etching of a silicon substrate and etching apparatus A method for etching a silicon substrate is presented in which fast etching speed and etching structures with smooth and perpendicular wall surfaces are achieved. In the etching step, a constant electric power is applied to the silicon substrate to provide a bias po... | 05/22/2007 |
| 7221463 | Positioning apparatus, exposure apparatus, and method for producing device The present invention provides a positioning apparatus capable of performing six-axis micro adjustment of an optical element in an exposure apparatus with high accuracy, and the exposure apparatus. The positioning apparatus of the present invention includes a first ... | 05/22/2007 |
| 7217665 | Method of plasma etching high-K dielectric materials with high selectivity to underlying layers A method of plasma etching a layer of dielectric material having a dielectric constant that is greater than four (4). The method includes exposing the dielectric material layer to a plasma comprising a hydrocarbon gas and a halogen containing gas. ... | 05/15/2007 |
| 7212878 | Wafer-to-wafer control using virtual modules The invention relates to controlling a semiconductor processing system. Among other things, the invention relates to a run-to-run controller to create virtual modules to control a multi-pass process performed by a multi-chamber tool during the processing of a semico... | 05/01/2007 |
| 7204913 | In-situ pre-coating of plasma etch chamber for improved productivity and chamber condition control A semiconductor processing chamber having a silicon containing pre-coat is provided. The chamber includes a top electrode in communication with a power supply and a processing chamber defined within a base, a sidewall extending from the base, and a top disposed on t... | 04/17/2007 |
| 7205235 | Method for reducing corrosion of metal surfaces during semiconductor processing A semiconductor process exposes metal in anticipation of an additional processing step that includes a deposition of a layer. Between the two processing steps, the exposed metal is exposed to ambient conditions that may include humidity. The effect of the humidity i... | 04/17/2007 |
| 7201647 | Subpad having robust, sealed edges Provided are encapsulated belts and encapsulated pads for use in a variety of polishing application, including the chemical-mechanical polishing and planarization of semiconductor wafers and other workpieces. The encapsulated belts and pads are characterized by a ro... | 04/10/2007 |
